8.1. aarch64 (AArch64)

8.1.1. Qemu A53

This BSP supports two variants, qemu_a53_ilp32 and qemu_a53_lp64. The basic hardware initialization is performed by the BSP. These BSPs support the GICv3 interrupt controller.

8.1.1.1. Boot via ELF

The executable image is booted by Qemu in ELF format.

8.1.1.2. Clock Driver

The clock driver uses the ARM Generic Timer.

8.1.1.3. Console Driver

The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.

8.1.1.4. Running Executables

Executables generated by these BSPs can be run using the following command:

qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
 -machine virt,gic-version=3 -cpu cortex-a53 -m 4096 -kernel example.exe

8.1.2. Qemu A72

This BSP supports two variants, qemu_a72_ilp32 and qemu_a72_lp64. The basic hardware initialization is performed by the BSP. These BSPs support the GICv3 interrupt controller.

8.1.2.1. Boot via ELF

The executable image is booted by Qemu in ELF format.

8.1.2.2. Clock Driver

The clock driver uses the ARM Generic Timer.

8.1.2.3. Console Driver

The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.

8.1.2.4. Running Executables

Executables generated by these BSPs can be run using the following command:

qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio

-machine virt,gic-version=3 -cpu cortex-a72 -m 4096 -kernel example.exe

8.1.3. Qemu Xilinx Versal

This BSP supports two variants, xilinx-versal-ilp32-qemu and xilinx-versal-lp64-qemu. The basic hardware initialization is performed by the BSP. These BSPs support the GICv3 interrupt controller present in the Xilinx Versal Adaptive Compute Acceleration Platform (ACAP) systems. The BSPs currently only work when started in the secure mode.

8.1.3.1. Boot via ELF

The executable image is booted by Qemu in ELF format.

8.1.3.2. Clock Driver

The clock driver uses the ARM Generic Timer.

8.1.3.3. Console Driver

The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART. There are some differences between the PL011 and the UART used by actual Versal ACAP hardware systems.

8.1.3.4. Running Executables

Executables generated by these BSPs can be run using the following command:

qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio

-machine xlnx-versal-virt -m 4096 -kernel example.exe

8.1.4. Qemu Xilinx ZynqMP

This BSP supports four variants: xilinx-zynqmp-ilp32-qemu, xilinx-zynqmp-lp64-qemu, xilinx-zynqmp-ilp32-zu3eg, and xilinx-zynqmp-lp64-zu3eg. Platform-specific hardware initialization is performed by ARM Trusted Firmware (ATF). Other basic hardware initialization is performed by the BSP. These BSPs support the GICv2 interrupt controller present in all ZynqMP systems. The zu3eg BSPs have also been tested to be fully functional on zu2cg boards and should also work on any other ZynqMP chip variant since the Processing Subsystem (PS) does not vary among chip variants other than the number of CPU cores available.

8.1.4.1. Boot on QEMU

The executable image is booted by Qemu in ELF format.

8.1.4.2. Boot on ZynqMP Hardware

On ZynqMP hardware, RTEMS can be started at EL1, EL2, or EL3 by u-boot or directly as part of BOOT.bin. Regardless of the exception level at boot, RTEMS will drop to EL1 for execution. For quick turnaround during testing, it is recommended to use the u-boot BOOT.bin that comes with the PetaLinux prebuilts for the board in question.

8.1.4.3. Hardware Boot Image Generation

RTEMS expects some hardware initialization to be performed by ATF and expects the services it provides to be present, so this must be included when generating a direct-boot RTEMS BOOT.bin.

When booting via u-boot, RTEMS must be packaged into a u-boot image or booted as a raw binary since u-boot does not currently support ELF64 which is required for AArch64 ELF binaries.

8.1.4.4. Clock Driver

The clock driver uses the ARM Generic Timer.

8.1.4.5. Console Driver

The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART as well as the physical ARM PL011 PrimeCell UART in the ZynqMP hardware.

8.1.4.6. SDHCI Driver

The ZynqMP bsp has an SDHCI driver which allows reading to and writing from SD cards. These can be tested in qemu using the “-sd” option. For example:

qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
 -machine xlnx-zcu102 -m 4096 -kernel media01.exe -sd example.img

The SD card image should have an MSDOS partition table with a single partition containing a FAT file system.

8.1.4.7. Network Configuration

When used with LibBSD, these BSP variants support networking via the four Cadence GEM instances present on all ZynqMP hardware variants. All interfaces are enabled by default, but only interfaces with operational MII busses will be recognized and usable in RTEMS. Most ZynqMP dev boards use CGEM3.

8.1.4.8. Running Executables on QEMU

Executables generated by these BSPs can be run using the following command:

qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
 -machine xlnx-zcu102 -m 4096 -kernel example.exe