RTEMS CPU Kit with SuperCore  4.11.2
Data Structures | Macros | Typedefs | Functions | Variables
cpu.h File Reference
#include <rtems/score/types.h>
#include <rtems/score/moxie.h>
#include <rtems/bspIo.h>
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Data Structures

struct  Context_Control
 This defines the minimal set of integer and processor state registers that must be saved during a voluntary context switch from one thread to another. More...
 
struct  Context_Control_fp
 This defines the complete set of floating point registers that must be saved during any context switch from one thread to another. More...
 
struct  CPU_Interrupt_frame
 This defines the set of integer and processor state registers that must be saved during an interrupt. More...
 
struct  CPU_Exception_frame
 The set of registers that specifies the complete processor state. More...
 

Macros

#define CPU_INLINE_ENABLE_DISPATCH   FALSE
 
#define RTEMS_USE_32_BIT_OBJECT
 
#define CPU_HAS_SOFTWARE_INTERRUPT_STACK   TRUE
 
#define CPU_SIMPLE_VECTORED_INTERRUPTS   TRUE
 
#define CPU_HAS_HARDWARE_INTERRUPT_STACK   FALSE
 
#define CPU_ALLOCATE_INTERRUPT_STACK   TRUE
 
#define CPU_HARDWARE_FP   FALSE
 
#define CPU_ALL_TASKS_ARE_FP   FALSE
 
#define CPU_IDLE_TASK_IS_FP   FALSE
 
#define CPU_USE_DEFERRED_FP_SWITCH   TRUE
 
#define CPU_PROVIDES_IDLE_THREAD_BODY   FALSE
 
#define CPU_STACK_GROWS_UP   FALSE
 
#define CPU_STRUCTURE_ALIGNMENT
 
#define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC   TRUE
 
#define CPU_TIMESTAMP_USE_INT64   FALSE
 
#define CPU_TIMESTAMP_USE_INT64_INLINE   FALSE
 
#define CPU_BIG_ENDIAN   TRUE
 
#define CPU_LITTLE_ENDIAN   FALSE
 
#define CPU_MODES_INTERRUPT_MASK   0x00000001
 
#define CPU_PER_CPU_CONTROL_SIZE   0
 
#define nogap   __attribute__ ((packed))
 
#define _CPU_Context_Get_SP(_context)   (_context)->sp
 
#define CPU_CONTEXT_FP_SIZE   sizeof( Context_Control_fp )
 
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK   0
 
#define CPU_INTERRUPT_NUMBER_OF_VECTORS   64
 
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER   (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
 
#define CPU_PROVIDES_ISR_IS_IN_PROGRESS   FALSE
 
#define CPU_STACK_MINIMUM_SIZE   (1536)
 
#define CPU_SIZEOF_POINTER   4
 Size of a pointer. More...
 
#define CPU_ALIGNMENT   8
 
#define CPU_HEAP_ALIGNMENT   CPU_ALIGNMENT
 
#define CPU_PARTITION_ALIGNMENT   CPU_ALIGNMENT
 
#define CPU_STACK_ALIGNMENT   0
 
#define _CPU_Initialize_vectors()
 
#define _CPU_ISR_Disable(_isr_cookie)
 
#define _CPU_ISR_Enable(_isr_cookie)
 
#define _CPU_ISR_Flash(_isr_cookie)
 
#define _CPU_ISR_Set_level(_new_level)
 
#define CPU_CCR_INTERRUPTS_ON   0x80
 
#define CPU_CCR_INTERRUPTS_OFF   0x00
 
#define _CPU_Context_Initialize(_the_context, _stack_base, _size, _isr, _entry_point, _is_fp, _tls_area)
 
#define _CPU_Context_Restart_self(_the_context)   _CPU_Context_restore( (_the_context) );
 
#define _CPU_Context_Fp_start(_base, _offset)   ( (void *) (_base) + (_offset) )
 
#define _CPU_Context_Initialize_fp(_destination)
 
#define _CPU_Fatal_halt(_source, _error)
 
#define CPU_USE_GENERIC_BITFIELD_CODE   TRUE
 
#define CPU_USE_GENERIC_BITFIELD_DATA   TRUE
 
#define _CPU_Bitfield_Find_first_bit(_value, _output)
 
#define _CPU_Priority_Mask(_bit_number)   ( 1 << (_bit_number) )
 
#define _CPU_Priority_bits_index(_priority)   (_priority)
 
#define CPU_swap_u16(value)   (((value&0xff) << 8) | ((value >> 8)&0xff))
 

Typedefs

typedef uint32_t CPU_Counter_ticks
 

Functions

uint32_t _CPU_ISR_Get_level (void)
 Return the current interrupt disable level for this task in the format used by the interrupt level portion of the task mode. More...
 
void _CPU_Initialize (void)
 CPU initialization. More...
 
void _CPU_ISR_install_raw_handler (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
 This routine installs a "raw" interrupt handler directly into the processor's vector table. More...
 
void _CPU_ISR_install_vector (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
 This routine installs an interrupt vector. More...
 
void _CPU_Install_interrupt_stack (void)
 This routine installs the hardware interrupt stack pointer. More...
 
void * _CPU_Thread_Idle_body (uint32_t)
 
void _CPU_Context_switch (Context_Control *run, Context_Control *heir)
 CPU switch context. More...
 
void _CPU_Context_restore (Context_Control *new_context)
 This routine is generally used only to restart self in an efficient manner. More...
 
void _CPU_Context_save_fp (Context_Control_fp **fp_context_ptr)
 This routine saves the floating point context passed to it. More...
 
void _CPU_Context_restore_fp (Context_Control_fp **fp_context_ptr)
 This routine restores the floating point context passed to it. More...
 
void _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
 Prints the exception frame via printk(). More...
 
CPU_Counter_ticks _CPU_Counter_read (void)
 

Variables

SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context
 

Macro Definition Documentation

◆ _CPU_Bitfield_Find_first_bit

#define _CPU_Bitfield_Find_first_bit (   _value,
  _output 
)
Value:
{ \
(_output) = 0; /* do something to prevent warnings */ \
}

◆ _CPU_Context_Initialize

#define _CPU_Context_Initialize (   _the_context,
  _stack_base,
  _size,
  _isr,
  _entry_point,
  _is_fp,
  _tls_area 
)
Value:
/* Locate Me */ \
do { \
uintptr_t _stack; \
\
(void) _is_fp; /* avoid warning for being unused */ \
(void) _isr; /* avoid warning for being unused */ \
_stack = ((uintptr_t)(_stack_base)) + (_size) - 8; \
*((proc_ptr *)(_stack)) = (_entry_point); \
_stack -= 4; \
(_the_context)->fp = (void *)_stack; \
(_the_context)->sp = (void *)_stack; \
} while (0)
void * proc_ptr
XXX: Eventually proc_ptr needs to disappear!!!
Definition: basedefs.h:329

◆ _CPU_Context_Initialize_fp

#define _CPU_Context_Initialize_fp (   _destination)
Value:
{ \
*(*(_destination)) = _CPU_Null_fp_context; \
}
SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context
This variable is optional.
Definition: cpu.h:494

◆ _CPU_Fatal_halt

#define _CPU_Fatal_halt (   _source,
  _error 
)
Value:
printk("Fatal Error %d.%d Halted\n",_source,_error); \
for(;;)
void printk(const char *fmt,...)
Kernel Print.
Definition: printk.c:35

◆ _CPU_ISR_Disable

#define _CPU_ISR_Disable (   _isr_cookie)
Value:
do { \
(_isr_cookie) = 0; \
} while (0)

◆ _CPU_ISR_Enable

#define _CPU_ISR_Enable (   _isr_cookie)
Value:
do { \
(_isr_cookie) = (_isr_cookie); \
} while (0)

◆ _CPU_ISR_Flash

#define _CPU_ISR_Flash (   _isr_cookie)
Value:
do { \
_CPU_ISR_Enable( _isr_cookie ); \
_CPU_ISR_Disable( _isr_cookie ); \
} while (0)

◆ _CPU_ISR_Set_level

#define _CPU_ISR_Set_level (   _new_level)
Value:
{ \
if (_new_level) asm volatile ( "nop\n" ); \
else asm volatile ( "nop\n" ); \
}

◆ CPU_SIZEOF_POINTER

#define CPU_SIZEOF_POINTER   4

Size of a pointer.

This must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code.