20 #ifndef _RTEMS_SCORE_CPU_H 21 #define _RTEMS_SCORE_CPU_H 27 #include <rtems/score/types.h> 54 #define CPU_INLINE_ENABLE_DISPATCH FALSE 60 #define RTEMS_USE_32_BIT_OBJECT 89 #define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE 102 #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE 122 #define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE 136 #define CPU_ALLOCATE_INTERRUPT_STACK TRUE 157 #define CPU_HARDWARE_FP FALSE 171 #define CPU_ALL_TASKS_ARE_FP FALSE 188 #define CPU_IDLE_TASK_IS_FP FALSE 219 #define CPU_USE_DEFERRED_FP_SWITCH TRUE 248 #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE 261 #define CPU_STACK_GROWS_UP FALSE 286 #define CPU_STRUCTURE_ALIGNMENT 288 #define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE 289 #define CPU_TIMESTAMP_USE_INT64 FALSE 290 #define CPU_TIMESTAMP_USE_INT64_INLINE FALSE 296 #define CPU_BIG_ENDIAN TRUE 297 #define CPU_LITTLE_ENDIAN FALSE 308 #define CPU_MODES_INTERRUPT_MASK 0x00000001 310 #define CPU_PER_CPU_CONTROL_SIZE 0 361 #define nogap __attribute__ ((packed)) 382 #define _CPU_Context_Get_SP( _context ) \ 386 double some_float_register[2];
390 uint32_t special_interrupt_register;
423 #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) 434 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 444 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 64 445 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER \ 446 (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) 452 #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE 462 #define CPU_STACK_MINIMUM_SIZE (1536) 471 #define CPU_SIZEOF_POINTER 4 481 #define CPU_ALIGNMENT 8 498 #define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT 515 #define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT 529 #define CPU_STACK_ALIGNMENT 0 538 #define _CPU_Initialize_vectors() 548 #define _CPU_ISR_Disable( _isr_cookie ) \ 562 #define _CPU_ISR_Enable( _isr_cookie ) \ 564 (_isr_cookie) = (_isr_cookie); \ 577 #define _CPU_ISR_Flash( _isr_cookie ) \ 579 _CPU_ISR_Enable( _isr_cookie ); \ 580 _CPU_ISR_Disable( _isr_cookie ); \ 597 #define _CPU_ISR_Set_level( _new_level ) \ 599 if (_new_level) asm volatile ( "nop\n" ); \ 600 else asm volatile ( "nop\n" ); \ 634 #define CPU_CCR_INTERRUPTS_ON 0x80 635 #define CPU_CCR_INTERRUPTS_OFF 0x00 637 #define _CPU_Context_Initialize( _the_context, _stack_base, _size, \ 638 _isr, _entry_point, _is_fp, _tls_area ) \ 645 _stack = ((uintptr_t)(_stack_base)) + (_size) - 8; \ 646 *((proc_ptr *)(_stack)) = (_entry_point); \ 648 (_the_context)->fp = (void *)_stack; \ 649 (_the_context)->sp = (void *)_stack; \ 666 #define _CPU_Context_Restart_self( _the_context ) \ 667 _CPU_Context_restore( (_the_context) ); 686 #define _CPU_Context_Fp_start( _base, _offset ) \ 687 ( (void *) (_base) + (_offset) ) 704 #define _CPU_Context_Initialize_fp( _destination ) \ 706 *(*(_destination)) = _CPU_Null_fp_context; \ 722 #define _CPU_Fatal_halt( _source, _error ) \ 723 printk("Fatal Error %d.%d Halted\n",_source,_error); \ 788 #define CPU_USE_GENERIC_BITFIELD_CODE TRUE 789 #define CPU_USE_GENERIC_BITFIELD_DATA TRUE 791 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 793 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \ 811 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 813 #define _CPU_Priority_Mask( _bit_number ) \ 814 ( 1 << (_bit_number) ) 828 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 830 #define _CPU_Priority_bits_index( _priority ) \ 987 uint32_t integer_registers [16];
1020 static inline uint32_t CPU_swap_u32(
1024 uint32_t byte1, byte2, byte3, byte4, swapped;
1026 byte4 = (value >> 24) & 0xff;
1027 byte3 = (value >> 16) & 0xff;
1028 byte2 = (value >> 8) & 0xff;
1029 byte1 = value & 0xff;
1031 swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
1035 #define CPU_swap_u16( value ) \ 1036 (((value&0xff) << 8) | ((value >> 8)&0xff)) 1043 CPU_Counter_ticks second,
1044 CPU_Counter_ticks first
1047 return second - first;
void _CPU_ISR_install_vector(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs an interrupt vector.
Definition: cpu.c:69
void _CPU_Context_validate(uintptr_t pattern)
Initializes and validates the CPU context with values derived from the pattern parameter.
Definition: cpu.h:1109
uint32_t _CPU_ISR_Get_level(void)
Return the current interrupt disable level for this task in the format used by the interrupt level po...
Definition: cpu.c:39
void _CPU_Context_restore(Context_Control *new_context)
This routine is generally used only to restart self in an efficient manner.
Definition: cpu_asm.c:112
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:92
void _CPU_Context_volatile_clobber(uintptr_t pattern)
Clobbers all volatile registers with values derived from the pattern parameter.
Definition: cpu.h:1104
This defines the minimal set of integer and processor state registers that must be saved during a vol...
Definition: cpu.h:248
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:26
void _CPU_Install_interrupt_stack(void)
This routine installs the hardware interrupt stack pointer.
Definition: cpu.c:101
SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context
This variable is optional.
Definition: cpu.h:494
uint32_t CPU_Counter_ticks
Unsigned integer type for CPU counter values.
Definition: cpu.h:1461
This defines the set of integer and processor state registers that must be saved during an interrupt...
Definition: cpu.h:425
void _CPU_ISR_install_raw_handler(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs a "raw" interrupt handler directly into the processor's vector table...
Definition: cpu.c:57
void _CPU_Context_restore_fp(Context_Control_fp **fp_context_ptr)
This routine restores the floating point context passed to it.
Definition: cpu.c:176
CPU_Counter_ticks _CPU_Counter_read(void)
Returns the current CPU counter value.
Definition: cpu.c:96
CPU_Counter_ticks _CPU_Counter_difference(CPU_Counter_ticks second, CPU_Counter_ticks first)
Returns the difference between the second and first CPU counter value.
Definition: cpu.h:1160
This defines the complete set of floating point registers that must be saved during any context switc...
Definition: cpu.h:294
Interface to Kernel Print Methods.
void _CPU_Context_save_fp(Context_Control_fp **fp_context_ptr)
This routine saves the floating point context passed to it.
Definition: cpu.c:167
#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
The following macro is a compiler specific way to indicate that the method will NOT return to the cal...
Definition: basedefs.h:162
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: arm-exception-frame-print.c:46
void * _CPU_Thread_Idle_body(uintptr_t ignored)
This routine is the CPU dependent IDLE thread body.
Definition: cpu.c:125
The set of registers that specifies the complete processor state.
Definition: cpu.h:671
#define SCORE_EXTERN
The following ensures that all data is declared in the space of the initialization routine for either...
Definition: basedefs.h:81
void * proc_ptr
XXX: Eventually proc_ptr needs to disappear!!!
Definition: basedefs.h:329