cpu.h File Reference

#include <rtems/score/epiphany.h>
#include <rtems/score/types.h>
#include <rtems/bspIo.h>
#include <stdint.h>
#include <stdio.h>

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Data Structures
struct	Context_Control
	This defines the minimal set of integer and processor state registers that must be saved during a voluntary context switch from one thread to another. More...
struct	Context_Control_fp
	This defines the complete set of floating point registers that must be saved during any context switch from one thread to another. More...
struct	CPU_Exception_frame
	The set of registers that specifies the complete processor state. More...

Macros
#define	CPU_INLINE_ENABLE_DISPATCH   FALSE
#define	CPU_UNROLL_ENQUEUE_PRIORITY   TRUE
#define	CPU_HAS_SOFTWARE_INTERRUPT_STACK   TRUE
#define	CPU_HAS_HARDWARE_INTERRUPT_STACK   FALSE
#define	CPU_ALLOCATE_INTERRUPT_STACK   TRUE
#define	CPU_ISR_PASSES_FRAME_POINTER   1
#define	CPU_HARDWARE_FP   FALSE
#define	CPU_SOFTWARE_FP   FALSE
#define	CPU_ALL_TASKS_ARE_FP   FALSE
#define	CPU_IDLE_TASK_IS_FP   FALSE
#define	CPU_USE_DEFERRED_FP_SWITCH   FALSE
#define	CPU_PROVIDES_IDLE_THREAD_BODY   TRUE
#define	CPU_STACK_GROWS_UP   FALSE
#define	CPU_STRUCTURE_ALIGNMENT   __attribute__ ((aligned (64)))
#define	CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES   FALSE
#define	CPU_BIG_ENDIAN   FALSE
#define	CPU_LITTLE_ENDIAN   TRUE
#define	CPU_MODES_INTERRUPT_MASK   0x00000001
#define	_CPU_Context_Get_SP(_context)   (_context)->r[13]
#define	CPU_CONTEXT_FP_SIZE   0
#define	CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK   0
#define	CPU_STACK_MINIMUM_SIZE   4096
#define	CPU_ALIGNMENT   8
#define	CPU_PROVIDES_ISR_IS_IN_PROGRESS   FALSE
#define	CPU_HEAP_ALIGNMENT   CPU_ALIGNMENT
#define	CPU_PARTITION_ALIGNMENT   CPU_ALIGNMENT
#define	CPU_STACK_ALIGNMENT   8
#define	_CPU_Initialize_vectors()
#define	_CPU_ISR_Disable(_level)   _level = epiphany_interrupt_disable()
#define	_CPU_ISR_Enable(_level)   epiphany_interrupt_enable( _level )
#define	_CPU_ISR_Flash(_level)
#define	EPIPHANY_GCC_RED_ZONE_SIZE   128
	Account for GCC red-zone. More...
#define	_CPU_Context_Restart_self(_the_context)   _CPU_Context_restore( (_the_context) )
#define	_CPU_Context_Fp_start(_base, _offset)   ( (void *) _Addresses_Add_offset( (_base), (_offset) ) )
#define	_CPU_Context_Initialize_fp(_destination)
#define	_CPU_Fatal_halt(_source, _error)
#define	CPU_USE_GENERIC_BITFIELD_CODE   TRUE
#define	CPU_USE_GENERIC_BITFIELD_DATA   TRUE
#define	_CPU_Bitfield_Find_first_bit(_value, _output)
#define	_CPU_Priority_Mask(_bit_number)   (1 << _bit_number)
#define	_CPU_Priority_bits_index(_priority)   (_priority)
#define	CPU_TIMESTAMP_USE_STRUCT_TIMESPEC   FALSE
#define	CPU_TIMESTAMP_USE_INT64   TRUE
#define	CPU_TIMESTAMP_USE_INT64_INLINE   FALSE
#define	CPU_SIZEOF_POINTER   4
	Size of a pointer. More...
#define	CPU_EXCEPTION_FRAME_SIZE   260
#define	CPU_PER_CPU_CONTROL_SIZE   0
#define	CPU_swap_u16(value)   (((value&0xff) << 8) | ((value >> 8)&0xff))

Typedefs
typedef Context_Control	CPU_Interrupt_frame
typedef uint16_t	Priority_bit_map_Word
typedef uint32_t	CPU_Counter_ticks

Functions
void	_CPU_ISR_Set_level (uint32_t level)
	Sets the hardware interrupt level by the level value. More...
uint32_t	_CPU_ISR_Get_level (void)
	Return the current interrupt disable level for this task in the format used by the interrupt level portion of the task mode. More...
void	_CPU_Context_Initialize (Context_Control *context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area)
	Initializes the CPU context. More...
void	_CPU_Exception_frame_print (const CPU_Exception_frame *frame)
	Prints the exception frame via printk(). More...
void	_CPU_Initialize (void)
	CPU initialization. More...
void	_CPU_ISR_install_raw_handler (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
	This routine installs a "raw" interrupt handler directly into the processor's vector table. More...
void	_CPU_ISR_install_vector (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
	This routine installs an interrupt vector. More...
void	_CPU_Install_interrupt_stack (void)
	This routine installs the hardware interrupt stack pointer. More...
void *	_CPU_Thread_Idle_body (uintptr_t ignored)
	This routine is the CPU dependent IDLE thread body. More...
void	_CPU_Context_switch (Context_Control *run, Context_Control *heir)
	CPU switch context. More...
void	_CPU_Context_restore (Context_Control *new_context)
	This routine is generally used only to restart self in an efficient manner. More...
void	_CPU_Context_save_fp (void **fp_context_ptr)
void	_CPU_Context_restore_fp (void **fp_context_ptr)
CPU_Counter_ticks	_CPU_Counter_read (void)

Variables
SCORE_EXTERN Context_Control_fp	_CPU_Null_fp_context

Macro Definition Documentation

_CPU_Bitfield_Find_first_bit

#define _CPU_Bitfield_Find_first_bit	(		_value,
			_output
	)

Value:

{ \
    (_output) = 0;   /* do something to prevent warnings */ \
  }

_CPU_Context_Initialize_fp

#define _CPU_Context_Initialize_fp

(

_destination

)

Value:

{ \
   *(*(_destination)) = _CPU_Null_fp_context; \
  }

_CPU_Fatal_halt

#define _CPU_Fatal_halt	(		_source,
			_error
	)

Value:

printk("Fatal Error %d.%d Halted\n",_source, _error); \
          asm("trap 3" :: "r" (_error)); \
          for(;;)

_CPU_ISR_Flash

#define _CPU_ISR_Flash

(

_level

)

Value:

do{ \
      if ( (_level & 0x2) != 0 ) \
        _CPU_ISR_Enable( _level ); \
      epiphany_interrupt_disable(); \
    } while(0)

CPU_SIZEOF_POINTER

#define CPU_SIZEOF_POINTER   4

Size of a pointer.

This must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code.

EPIPHANY_GCC_RED_ZONE_SIZE

#define EPIPHANY_GCC_RED_ZONE_SIZE   128

Account for GCC red-zone.

The following macro is used when initializing task's stack to account for GCC red-zone.