22.1. Introduction

The Cache Manager provides functions to perform maintenance operations for data and instruction caches.

The actual actions of the Cache Manager operations depend on the hardware and the implementation provided by the CPU architecture port or a board support package. Cache implementations tend to be highly hardware dependent. The directives provided by the Cache Manager are:

• rtems_cache_flush_multiple_data_lines() - Flushes the data cache lines covering the memory area.

• rtems_cache_invalidate_multiple_data_lines() - Invalidates the data cache lines covering the memory area.

• rtems_cache_invalidate_multiple_instruction_lines() - Invalidates the instruction cache lines covering the memory area.

• rtems_cache_instruction_sync_after_code_change() - Ensures necessary synchronization required after code changes.

• rtems_cache_get_maximal_line_size() - Gets the maximal cache line size in bytes of all caches (data, instruction, or unified).

• rtems_cache_get_data_line_size() - Gets the data cache line size in bytes.

• rtems_cache_get_instruction_line_size() - Gets the instruction cache line size in bytes.

• rtems_cache_get_data_cache_size() - Gets the data cache size in bytes for the cache level.

• rtems_cache_get_instruction_cache_size() - Gets the instruction cache size in bytes for the cache level.

• rtems_cache_flush_entire_data() - Flushes the entire data cache.

• rtems_cache_invalidate_entire_data() - Invalidates the entire data cache.

• rtems_cache_invalidate_entire_instruction() - Invalidates the entire instruction cache.

• rtems_cache_enable_data() - Enables the data cache.

• rtems_cache_disable_data() - Disables the data cache.

• rtems_cache_enable_instruction() - Enables the instruction cache.

• rtems_cache_disable_instruction() - Disables the instruction cache.

• rtems_cache_aligned_malloc() - Allocates memory from the C Program Heap which begins at a cache line boundary.