19#ifndef LIBBSP_BFIN_TLL6527M_BSP_H
20#define LIBBSP_BFIN_TLL6527M_BSP_H
65#define PLL_CSEL 0x0000
66#define PLL_SSEL 0x0003
67#define PLL_MSEL 0x3A00
77#define CLKIN (25000000)
78#define CCLK (600000000)
79#define SCLK (100000000)
89#define WORD_5BITS 0x00
90#define WORD_6BITS 0x01
91#define WORD_7BITS 0x02
92#define WORD_8BITS 0x03
93#define EVEN_PARITY 0x18
94#define ODD_PARITY 0x08
95#define TWO_STP_BIT 0x04
111 rtems_isr_entry handler,
124void bfin_null_isr(
void);
Basic MMR for the Blackfin 52x CPU.
DEFAULT_INITIAL_EXTENSION Support.
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
rtems_isr_entry set_vector(rtems_isr_entry handler, rtems_vector_number vector, int type)
Install an interrupt handler.
Definition: setvec.c:28
Blackfin Set up Basic CPU Dependency Settings Based on Compiler Settings.