39#ifndef LIBBSP_ARM_XILINX_ZYNQMP_BSP_H
40#define LIBBSP_ARM_XILINX_ZYNQMP_BSP_H
54#define BSP_FEATURE_IRQ_EXTENSION
67#define BSP_ARM_GIC_CPUIF_BASE 0xf9020000
69#define BSP_ARM_GIC_DIST_BASE 0xf9010000
71#define BSP_ARM_A9MPCORE_SCU_BASE 0
73#define BSP_ARM_A9MPCORE_GT_BASE 0
82void arm_generic_timer_get_config(uint32_t *frequency, uint32_t *irq);
84void zynqmp_debug_console_flush(
void);
DEFAULT_INITIAL_EXTENSION Support.
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU.
Definition: bspstartmmu.c:64