27#ifndef LIBBSP_ARM_BEAGLE_BSP_H
28#define LIBBSP_ARM_BEAGLE_BSP_H
49#include <libcpu/omap3.h>
50#include <libcpu/am335x.h>
52#define BSP_FEATURE_IRQ_EXTENSION
55#define UART_CLOCK 48000000
58#define mmio_read(a) (*(volatile uint32_t *)(a))
59#define mmio_write(a,v) (*(volatile uint32_t *)(a) = (v))
60#define mmio_set(a,v) mmio_write((a), mmio_read((a)) | (v))
61#define mmio_clear(a,v) mmio_write((a), mmio_read((a)) & ~(v))
63#define REG16(x)(*((volatile uint16_t *)(x)))
64#define REG(x)(*((volatile uint32_t *)(x)))
65#define BIT(x)(0x1 << (x))
67#define BITS(Start, End) (((1 << (End+1)) - 1) & ~((1 << (Start)) - 1))
69#define udelay(u) rtems_task_wake_after(1 + ((u)/rtems_configuration_get_microseconds_per_tick()))
73write32(uint32_t address, uint32_t value)
80read32(uint32_t address)
87set32(uint32_t address, uint32_t mask, uint32_t value)
90 val = read32(address);
94 val |= (value & mask);
95 write32(address, val);
100write16(uint32_t address, uint16_t value)
102 REG16(address) = value;
106static inline uint16_t
107read16(uint32_t address)
109 return REG16(address);
113static inline void dsb(
void)
115 asm volatile(
"dsb" : : :
"memory");
119static inline void isb(
void)
121 asm volatile(
"isb" : : :
"memory");
125static inline void flush_data_cache(
void)
129 "mcr p15, #0, r0, c7, c10, #4\n"
136#define __arch_getb(a) (*(volatile unsigned char *)(a))
137#define __arch_getw(a) (*(volatile unsigned short *)(a))
138#define __arch_getl(a) (*(volatile unsigned int *)(a))
140#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
141#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
142#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
144#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; })
145#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; })
146#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; })
148#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; })
149#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; })
150#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; })
152#define SYSTEM_CLOCK_12 12000000
153#define SYSTEM_CLOCK_13 13000000
154#define SYSTEM_CLOCK_192 19200000
155#define SYSTEM_CLOCK_96 96000000
157#if !defined(IS_DM3730) && !defined(IS_AM335X)
158#error Unrecognized BSP configured.
162#define BSP_DEVICEMEM_START 0x48000000
163#define BSP_DEVICEMEM_END 0x5F000000
167#define BSP_DEVICEMEM_START 0x44000000
168#define BSP_DEVICEMEM_END 0x57000000
173#define BSP_CONSOLE_UART 1
174#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_1
175#define BSP_CONSOLE_UART_IRQ OMAP3_UART1_IRQ
176#define BEAGLE_BASE_UART_1 0x44E09000
177#define BEAGLE_BASE_UART_2 0x48022000
178#define BEAGLE_BASE_UART_3 0x48024000
183#define BSP_CONSOLE_UART 3
184#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_3
185#define BSP_CONSOLE_UART_IRQ OMAP3_UART3_IRQ
186#define BEAGLE_BASE_UART_1 0x4806A000
187#define BEAGLE_BASE_UART_2 0x4806C000
188#define BEAGLE_BASE_UART_3 0x49020000
193#define BSP_GPIO_PIN_COUNT 128
194#define BSP_GPIO_PINS_PER_BANK 32
198#define BSP_GPIO_PIN_COUNT 192
199#define BSP_GPIO_PINS_PER_BANK 32
202#if BSP_START_COPY_FDT_FROM_U_BOOT
203#define BSP_FDT_IS_SUPPORTED
224static inline uint32_t read_sctlr(
void)
228 asm volatile(
"mrc p15, 0, %[ctl], c1, c0, 0 @ Read SCTLR\n\t"
234static inline void write_sctlr(uint32_t ctl)
236 asm volatile(
"mcr p15, 0, %[ctl], c1, c0, 0 @ Write SCTLR\n\t"
237 : : [ctl]
"r" (ctl));
242static inline uint32_t read_actlr(
void)
246 asm volatile(
"mrc p15, 0, %[ctl], c1, c0, 1 @ Read ACTLR\n\t"
252static inline void write_actlr(uint32_t ctl)
254 asm volatile(
"mcr p15, 0, %[ctl], c1, c0, 1 @ Write ACTLR\n\t"
255 : : [ctl]
"r" (ctl));
260static inline void write_ttbcr(uint32_t bcr)
262 asm volatile(
"mcr p15, 0, %[bcr], c2, c0, 2 @ Write TTBCR\n\t"
263 : : [bcr]
"r" (bcr));
269static inline uint32_t read_dacr(
void)
273 asm volatile(
"mrc p15, 0, %[dacr], c3, c0, 0 @ Read DACR\n\t"
274 : [dacr]
"=r" (dacr));
281static inline void write_dacr(uint32_t dacr)
283 asm volatile(
"mcr p15, 0, %[dacr], c3, c0, 0 @ Write DACR\n\t"
284 : : [dacr]
"r" (dacr));
289static inline void refresh_tlb(
void)
294 asm volatile(
"mcr p15, 0, %[zero], c8, c7, 0 @ TLBIALL\n\t"
299 asm volatile(
"mcr p15, 0, %[zero], c7, c5, 0"
303 asm volatile(
"mcr p15, 0, %[zero], c7, c5, 6"
311static inline uint32_t read_ttbr0(
void)
315 asm volatile(
"mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t"
318 return bar & ARM_TTBR_ADDR_MASK;
323static inline uint32_t read_ttbr0_unmasked(
void)
327 asm volatile(
"mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t"
334static inline void write_ttbr0(uint32_t bar)
342 uint32_t
v = (bar & ARM_TTBR_ADDR_MASK ) | ARM_TTBR_FLAGS_CACHED;
343 asm volatile(
"mcr p15, 0, %[bar], c2, c0, 0 @ Write TTBR0\n\t"
354#define BSP_PRINT_EXCEPTION_CONTEXT 1
356#define BSP_RESET_BOARD_AT_EXIT 1
BeagleBone Black BSP definitions.
DEFAULT_INITIAL_EXTENSION Support.
BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void)
Beagleboard specific set up of the MMU.
Definition: bspstartmmu.c:39
Header file for the Interrupt Manager Extension.
unsigned v
Definition: tte.h:0