14 #ifndef _RTEMS_SCORE_THREADDISPATCH_H 15 #define _RTEMS_SCORE_THREADDISPATCH_H 25 #if defined(RTEMS_HEAVY_STACK_DEBUG) || \ 26 defined(RTEMS_HEAVY_MALLOC_DEBUG) 27 #define __THREAD_DO_NOT_INLINE_DISABLE_DISPATCH__ 30 #if defined(RTEMS_SMP) || \ 31 (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \ 32 (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1) 33 #define __THREAD_DO_NOT_INLINE_ENABLE_DISPATCH__ 54 #if defined(RTEMS_SMP) 57 _ISR_Disable_without_giant( level );
60 enabled = _Thread_Dispatch_disable_level == 0;
62 #if defined(RTEMS_SMP) 63 _ISR_Enable_without_giant( level );
76 return _Thread_Dispatch_disable_level;
86 _Thread_Dispatch_disable_level = 1;
89 #if defined(RTEMS_SMP) 151 uint32_t disable_level = _Thread_Dispatch_disable_level;
152 #if defined( RTEMS_PROFILING ) 156 _Profiling_Thread_dispatch_disable( _Per_CPU_Get(), disable_level );
160 _Thread_Dispatch_disable_level = disable_level;
162 #if defined( RTEMS_PROFILING ) 166 return disable_level;
176 uint32_t disable_level = _Thread_Dispatch_disable_level;
177 #if defined( RTEMS_PROFILING ) 184 _Thread_Dispatch_disable_level = disable_level;
186 #if defined( RTEMS_PROFILING ) 187 _Profiling_Thread_dispatch_enable( _Per_CPU_Get(), disable_level );
191 return disable_level;
255 uint32_t disable_level;
257 cpu_self = _Per_CPU_Get();
259 _Profiling_Thread_dispatch_disable_critical(
281 #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) 287 #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) 307 if ( disable_level == 1 ) {
310 _ISR_Disable_without_giant( level );
316 _Profiling_Thread_dispatch_enable( cpu_self, 0 );
319 _ISR_Enable_without_giant( level );
328 #if defined ( __THREAD_DO_NOT_INLINE_DISABLE_DISPATCH__ ) 342 _Giant_Release( cpu_self );
351 #if defined ( __THREAD_DO_NOT_INLINE_ENABLE_DISPATCH__ ) 358 _Thread_Enable_dispatch_body();
RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_get_disable_level(void)
Gets thread dispatch disable level.
Definition: threaddispatch.h:75
RTEMS_INLINE_ROUTINE bool _Thread_Dispatch_is_enabled(void)
Indicates if the executing thread is inside a thread dispatch critical section.
Definition: threaddispatch.h:51
#define RTEMS_INLINE_ROUTINE
The following (in conjunction with compiler arguments) are used to choose between the use of static i...
Definition: basedefs.h:135
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable(Per_CPU_Control *cpu_self)
Enables thread dispatching.
Definition: threaddispatch.h:304
RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_decrement_disable_level(void)
Decrease thread dispatch disable level.
Definition: threaddispatch.h:175
void _Thread_Dispatch(void)
Performs a thread dispatch if necessary.
Definition: threaddispatch.c:152
RTEMS_INLINE_ROUTINE Per_CPU_Control * _Thread_Dispatch_disable(void)
Disables thread dispatching.
Definition: threaddispatch.h:277
void _Thread_Enable_dispatch(void)
Enables thread dispatching and releases the Giant lock.
RTEMS_INLINE_ROUTINE void _Thread_Disable_dispatch(void)
Disables thread dispatching and acquires the Giant lock.
Definition: threaddispatch.h:332
This include file defines the per CPU information required by RTEMS.
#define _ISR_lock_ISR_disable(_context)
Disables interrupts and saves the previous interrupt state in the ISR lock context.
Definition: isrlock.h:337
uint32_t ISR_Level
The following type defines the control block used to manage the interrupt level portion of the status...
Definition: isrlevel.h:42
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_initialization(void)
Thread dispatch initialization.
Definition: threaddispatch.h:85
#define _ISR_lock_ISR_enable(_context)
Restores the saved interrupt state of the ISR lock context.
Definition: isrlock.h:358
Per CPU Core Structure.
Definition: percpu.h:233
RTEMS_INLINE_ROUTINE void _Thread_Unnest_dispatch(void)
Enables thread dispatching and releases the Giant lock.
Definition: threaddispatch.h:369
RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_increment_disable_level(void)
Increase thread dispatch disable level.
Definition: threaddispatch.h:150
volatile bool dispatch_necessary
This is set to true when this processor needs to run the dispatcher.
Definition: percpu.h:308
#define _ISR_Enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:76
volatile uint32_t thread_dispatch_disable_level
The thread dispatch critical section nesting counter which is used to prevent context switches at ino...
Definition: percpu.h:266
RTEMS_INLINE_ROUTINE Per_CPU_Control * _Thread_Dispatch_disable_critical(const ISR_lock_Context *lock_context)
Disables thread dispatching inside a critical section (interrupts disabled).
Definition: threaddispatch.h:251
Local ISR lock context for acquire and release pairs.
Definition: isrlock.h:65
void _Thread_Do_dispatch(Per_CPU_Control *cpu_self, ISR_Level level)
Performs a thread dispatch on the current processor.
Definition: threaddispatch.c:63
#define _ISR_Disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:58
#define RTEMS_COMPILER_MEMORY_BARRIER()
The following macro is a compiler specific way to ensure that memory writes are not reordered around ...
Definition: basedefs.h:146