17#ifndef __GRPCI2DMA_H__
18#define __GRPCI2DMA_H__
28#define GRPCI2DMA_ERR_OK 0
29#define GRPCI2DMA_ERR_WRONGPTR -1
30#define GRPCI2DMA_ERR_NOINIT -2
31#define GRPCI2DMA_ERR_TOOMANY -3
32#define GRPCI2DMA_ERR_ERROR -4
33#define GRPCI2DMA_ERR_STOPDMA -5
34#define GRPCI2DMA_ERR_NOTFOUND -6
37#define GRPCI2DMA_BD_CHAN_SIZE 0x10
38#define GRPCI2DMA_BD_DATA_SIZE 0x10
41#define GRPCI2DMA_BD_CHAN_ALIGN 0x10
42#define GRPCI2DMA_BD_DATA_ALIGN 0x10
47extern void * grpci2dma_channel_new(
int number);
48extern void grpci2dma_channel_delete(
void * chanbd);
49extern void * grpci2dma_data_new(
int number);
50extern void grpci2dma_data_delete(
void * databd);
75#define GRPCI2DMA_AHBTOPCI 1
76#define GRPCI2DMA_PCITOAHB 0
77#define GRPCI2DMA_LITTLEENDIAN 1
78#define GRPCI2DMA_BIGENDIAN 0
79extern int grpci2dma_prepare(
80 uint32_t pci_start, uint32_t ahb_start,
int dir,
int endianness,
81 int size,
void * databd,
int bdindex,
int bdmax,
int block_size);
100#define GRPCI2DMA_BD_STATUS_DISABLED 0
101#define GRPCI2DMA_BD_STATUS_ENABLED 1
102#define GRPCI2DMA_BD_STATUS_ERR 2
103extern int grpci2dma_status(
void *databd,
int bdindex,
int bdsize);
110typedef void (*grpci2dma_isr_t)(
void *arg,
int cid,
unsigned int status);
125extern int grpci2dma_isr_register(
126 int chan_no, grpci2dma_isr_t dmaisr,
void *arg);
139extern int grpci2dma_isr_unregister(
int chan_no);
155extern int grpci2dma_open(
void * chan);
171extern int grpci2dma_close(
int chan_no);
187extern int grpci2dma_start(
int chan_no,
int options);
201extern int grpci2dma_stop(
int chan_no);
218extern int grpci2dma_push(
int chan_no,
void *databd,
int bdindex,
int bdsize);
229extern int grpci2dma_active(
void);
249#define GRPCI2DMA_OPTIONS_ALL 1
250#define GRPCI2DMA_OPTIONS_ONE 0
251extern int grpci2dma_interrupt_enable(
252 void *databd,
int bdindex,
int bdmax,
int options);
256extern int grpci2dma_print(
int chan_no);
257extern int grpci2dma_print_bd(
void * data);
unsigned size
Definition: tte.h:1