RTEMS CPU Kit with SuperCore
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Intel AVR CPU Department Source. More...
Go to the source code of this file.
Data Structures | |
struct | CPU_Per_CPU_control |
The CPU specific per-CPU control. More... | |
struct | Context_Control |
This defines the minimal set of integer and processor state registers that must be saved during a voluntary context switch from one thread to another. More... | |
struct | Context_Control_fp |
This defines the complete set of floating point registers that must be saved during any context switch from one thread to another. More... | |
struct | CPU_Interrupt_frame |
This defines the set of integer and processor state registers that must be saved during an interrupt. More... | |
Macros | |
#define | RTEMS_USE_16_BIT_OBJECT |
#define | CPU_INLINE_ENABLE_DISPATCH FALSE |
#define | CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE |
#define | CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE |
#define | CPU_ALLOCATE_INTERRUPT_STACK TRUE |
#define | CPU_ISR_PASSES_FRAME_POINTER 0 |
#define | CPU_SIMPLE_VECTORED_INTERRUPTS TRUE |
#define | CPU_HARDWARE_FP FALSE |
#define | CPU_SOFTWARE_FP FALSE |
#define | CPU_ALL_TASKS_ARE_FP TRUE |
#define | CPU_IDLE_TASK_IS_FP FALSE |
#define | CPU_USE_DEFERRED_FP_SWITCH TRUE |
#define | CPU_PROVIDES_IDLE_THREAD_BODY TRUE |
#define | CPU_STACK_GROWS_UP FALSE |
#define | CPU_STRUCTURE_ALIGNMENT |
#define | CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE |
#define | CPU_BIG_ENDIAN TRUE |
#define | CPU_LITTLE_ENDIAN FALSE |
#define | CPU_MODES_INTERRUPT_MASK 0x00000001 |
#define | CPU_PER_CPU_CONTROL_SIZE 0 |
#define | _CPU_Context_Get_SP(_context) (_context)->stack_pointer |
#define | CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) |
#define | CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 |
#define | CPU_INTERRUPT_NUMBER_OF_VECTORS 32 |
#define | CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) |
#define | CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE |
#define | CPU_STACK_MINIMUM_SIZE 512 |
#define | CPU_PRIORITY_MAXIMUM 15 |
#define | CPU_SIZEOF_POINTER 2 |
#define | CPU_ALIGNMENT 4 |
#define | CPU_HEAP_ALIGNMENT CPU_ALIGNMENT |
#define | CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT |
#define | CPU_STACK_ALIGNMENT 0 |
#define | _CPU_Initialize_vectors() |
#define | _CPU_ISR_Disable(_isr_cookie) |
#define | _CPU_ISR_Enable(_isr_cookie) |
#define | _CPU_ISR_Flash(_isr_cookie) |
#define | _CPU_Context_Restart_self(_the_context) _CPU_Context_restore( _the_context ); |
#define | _CPU_Context_Fp_start(_base, _offset) ( (void *) _Addresses_Add_offset( (_base), (_offset) ) ) |
#define | _CPU_Context_Initialize_fp(_destination) |
#define | _CPU_Fatal_halt(_source, _error) |
#define | CPU_USE_GENERIC_BITFIELD_CODE TRUE |
#define | CPU_USE_GENERIC_BITFIELD_DATA TRUE |
#define | _CPU_Bitfield_Find_first_bit(_value, _output) |
#define | _CPU_Priority_Mask(_bit_number) ( 1 << (_bit_number) ) |
#define | _CPU_Priority_bits_index(_priority) (_priority) |
#define | CPU_swap_u16(value) (((value&0xff) << 8) | ((value >> 8)&0xff)) |
Typedefs | |
typedef CPU_Interrupt_frame | CPU_Exception_frame |
typedef uint32_t | CPU_Counter_ticks |
Functions | |
uint32_t | _CPU_ISR_Get_level (void) |
Return the current interrupt disable level for this task in the format used by the interrupt level portion of the task mode. More... | |
void | context_initialize (unsigned short *context, unsigned short stack_add, unsigned short entry_point) |
void | _CPU_Context_Initialize (Context_Control *the_context, uint32_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area) |
Initialize the context to a state suitable for starting a task after a context restore operation. More... | |
void | _CPU_Push (uint16_t _SP_, uint16_t entry_point) |
void | _CPU_Initialize (void) |
CPU initialization. More... | |
void | _CPU_ISR_install_raw_handler (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler) |
This routine installs a "raw" interrupt handler directly into the processor's vector table. More... | |
void | _CPU_ISR_install_vector (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler) |
This routine installs an interrupt vector. More... | |
void | _CPU_Install_interrupt_stack (void) |
This routine installs the hardware interrupt stack pointer. More... | |
void * | _CPU_Thread_Idle_body (uintptr_t ignored) |
void | _CPU_Context_switch (Context_Control *run, Context_Control *heir) |
CPU switch context. More... | |
void | _CPU_Context_restore (Context_Control *new_context) |
This routine is generally used only to restart self in an efficient manner. More... | |
void | _CPU_Context_save_fp (Context_Control_fp **fp_context_ptr) |
This routine saves the floating point context passed to it. More... | |
void | _CPU_Context_restore_fp (Context_Control_fp **fp_context_ptr) |
This routine restores the floating point context passed to it. More... | |
void | _CPU_Exception_frame_print (const CPU_Exception_frame *frame) |
CPU_Counter_ticks | _CPU_Counter_read (void) |
Variables | |
SCORE_EXTERN Context_Control_fp | _CPU_Null_fp_context |
Intel AVR CPU Department Source.
This include file contains information pertaining to the AVR processor.
#define _CPU_Bitfield_Find_first_bit | ( | _value, | |
_output | |||
) |
#define _CPU_Context_Initialize_fp | ( | _destination | ) |
#define _CPU_Fatal_halt | ( | _source, | |
_error | |||
) |
#define _CPU_ISR_Disable | ( | _isr_cookie | ) |
#define _CPU_ISR_Enable | ( | _isr_cookie | ) |
#define _CPU_ISR_Flash | ( | _isr_cookie | ) |
void _CPU_Context_Initialize | ( | Context_Control * | the_context, |
uint32_t * | stack_base, | ||
uint32_t | size, | ||
uint32_t | new_level, | ||
void * | entry_point, | ||
bool | is_fp, | ||
void * | tls_area | ||
) |
Initialize the context to a state suitable for starting a task after a context restore operation.
Generally, this involves:
This routine generally does not set any unnecessary register in the context. The state of the "general data" registers is undefined at task start time.
[in] | _the_context | is the context structure to be initialized |
[in] | _stack_base | is the lowest physical address of this task's stack |
[in] | _size | is the size of this task's stack |
[in] | _isr | is the interrupt disable level |
[in] | _entry_point | is the thread's entry point. This is always _Thread_Handler |
[in] | _is_fp | is TRUE if the thread is to be a floating point thread. This is typically only used on CPUs where the FPU may be easily disabled by software such as on the SPARC where the PSR contains an enable FPU bit. |
[in] | tls_area | is the thread-local storage (TLS) area |
Port Specific Information:
This method is implemented in C on the v850.
void _CPU_Context_restore_fp | ( | Context_Control_fp ** | fp_context_ptr | ) |
This routine restores the floating point context passed to it.
[in] | fp_context_ptr | is a pointer to a pointer to a floating point context area to restore |
Port Specific Information:
XXX document implementation including references if appropriate
void _CPU_Context_save_fp | ( | Context_Control_fp ** | fp_context_ptr | ) |
This routine saves the floating point context passed to it.
[in] | fp_context_ptr | is a pointer to a pointer to a floating point context area |
Port Specific Information:
XXX document implementation including references if appropriate
void _CPU_Install_interrupt_stack | ( | void | ) |
This routine installs the hardware interrupt stack pointer.
NOTE: It need only be provided if CPU_HAS_HARDWARE_INTERRUPT_STACK is TRUE.
Port Specific Information:
XXX document implementation including references if appropriate
This routine installs a "raw" interrupt handler directly into the processor's vector table.
[in] | vector | is the vector number |
[in] | new_handler | is the raw ISR handler to install |
[in] | old_handler | is the previously installed ISR Handler |
Port Specific Information:
XXX document implementation including references if appropriate