19 #ifndef _RTEMS_SCORE_CPU_H 20 #define _RTEMS_SCORE_CPU_H 26 #include <rtems/score/types.h> 53 #define CPU_INLINE_ENABLE_DISPATCH TRUE 82 #define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE 95 #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE 115 #define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE 129 #define CPU_ALLOCATE_INTERRUPT_STACK TRUE 171 #define CPU_HARDWARE_FP FALSE 172 #define CPU_SOFTWARE_FP FALSE 202 #define CPU_ALL_TASKS_ARE_FP FALSE 219 #define CPU_IDLE_TASK_IS_FP FALSE 250 #define CPU_USE_DEFERRED_FP_SWITCH TRUE 277 #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE 290 #define CPU_STACK_GROWS_UP FALSE 315 #define CPU_STRUCTURE_ALIGNMENT 320 #define CPU_TIMESTAMP_USE_INT64_INLINE TRUE 343 #define CPU_BIG_ENDIAN FALSE 358 #define CPU_LITTLE_ENDIAN TRUE 372 #define CPU_MODES_INTERRUPT_MASK 0x00000001 374 #define CPU_PER_CPU_CONTROL_SIZE 0 450 #define _CPU_Context_Get_SP( _context ) \ 451 (_context)->r3_stack_pointer 459 double some_float_register;
472 uint32_t special_interrupt_register;
510 #define CPU_CONTEXT_FP_SIZE 0 522 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 528 #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE 541 #define CPU_STACK_MINIMUM_SIZE (1024*4) 543 #define CPU_SIZEOF_POINTER 4 553 #define CPU_ALIGNMENT 8 578 #define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT 596 #define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT 612 #define CPU_STACK_ALIGNMENT 4 633 #define _CPU_ISR_Disable( _isr_cookie ) \ 637 v850_get_psw( _psw ); \ 638 __asm__ __volatile__( "di" ); \ 639 _isr_cookie = _psw; \ 653 #define _CPU_ISR_Enable( _isr_cookie ) \ 655 unsigned int _psw = (_isr_cookie); \ 657 v850_set_psw( _psw ); \ 672 #define _CPU_ISR_Flash( _isr_cookie ) \ 674 unsigned int _psw = (_isr_cookie); \ 675 v850_set_psw( _psw ); \ 676 __asm__ __volatile__( "di" ); \ 694 #define _CPU_ISR_Set_level( new_level ) \ 697 __asm__ __volatile__( "di" ); \ 699 __asm__ __volatile__( "ei" ); \ 754 uint32_t *stack_base,
777 #define _CPU_Context_Restart_self( _the_context ) \ 778 _CPU_Context_restore( (_the_context) ); 804 #define _CPU_Context_Fp_start( _base, _offset ) \ 805 ( (void *) _Addresses_Add_offset( (_base), (_offset) ) ) 828 #define _CPU_Context_Initialize_fp( _destination ) \ 846 #define _CPU_Fatal_halt( _source, _error ) \ 848 __asm__ __volatile__ ( "di" ); \ 849 __asm__ __volatile__ ( "mov %0, r10; " : "=r" ((_error)) ); \ 850 __asm__ __volatile__ ( "halt" ); \ 869 #define CPU_USE_GENERIC_BITFIELD_CODE TRUE 886 #define CPU_USE_GENERIC_BITFIELD_DATA TRUE 952 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 953 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \ 971 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 973 #define _CPU_Priority_Mask( _bit_number ) \ 974 ( 1 << (_bit_number) ) 991 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 993 #define _CPU_Priority_bits_index( _priority ) \ 1139 static inline uint32_t CPU_swap_u32(
1143 unsigned int swapped;
1145 #if (V850_HAS_BYTE_SWAP_INSTRUCTION == 1) 1149 __asm__ __volatile__ (
"bsw %0, %1" :
"=r" (v),
"=&r" (swapped) );
1151 uint32_t byte1, byte2, byte3, byte4;
1153 byte4 = (value >> 24) & 0xff;
1154 byte3 = (value >> 16) & 0xff;
1155 byte2 = (value >> 8) & 0xff;
1156 byte1 = value & 0xff;
1158 swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
1176 unsigned int swapped;
1178 #if (V850_HAS_BYTE_SWAP_INSTRUCTION == 1) 1182 __asm__ __volatile__ (
"bsh %0, %1" :
"=r" (v),
"=&r" (swapped) );
1184 swapped = ((value & 0xff) << 8) | ((value >> 8) & 0xff);
1194 CPU_Counter_ticks second,
1195 CPU_Counter_ticks first
1198 return second - first;
void _CPU_Context_validate(uintptr_t pattern)
Initializes and validates the CPU context with values derived from the pattern parameter.
Definition: cpu.h:1109
uint32_t _CPU_ISR_Get_level(void)
Return the current interrupt disable level for this task in the format used by the interrupt level po...
Definition: cpu.c:39
void _CPU_Context_restore(Context_Control *new_context)
This routine is generally used only to restart self in an efficient manner.
Definition: cpu_asm.c:112
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:92
uint32_t r3_stack_pointer
This field is the stack pointer (e.g.
Definition: cpu.h:428
void _CPU_Context_volatile_clobber(uintptr_t pattern)
Clobbers all volatile registers with values derived from the pattern parameter.
Definition: cpu.h:1104
This defines the minimal set of integer and processor state registers that must be saved during a vol...
Definition: cpu.h:248
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:26
uint32_t CPU_Counter_ticks
Unsigned integer type for CPU counter values.
Definition: cpu.h:1461
This defines the set of integer and processor state registers that must be saved during an interrupt...
Definition: cpu.h:425
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
void _CPU_Context_restore_fp(Context_Control_fp **fp_context_ptr)
This routine restores the floating point context passed to it.
Definition: cpu.c:176
void _CPU_Context_Initialize(Context_Control *the_context, uint32_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
Initialize the context to a state suitable for starting a task after a context restore operation...
Definition: cpu.c:183
CPU_Counter_ticks _CPU_Counter_read(void)
Returns the current CPU counter value.
Definition: cpu.c:96
CPU_Counter_ticks _CPU_Counter_difference(CPU_Counter_ticks second, CPU_Counter_ticks first)
Returns the difference between the second and first CPU counter value.
Definition: cpu.h:1160
This defines the complete set of floating point registers that must be saved during any context switc...
Definition: cpu.h:294
void _CPU_Context_save_fp(Context_Control_fp **fp_context_ptr)
This routine saves the floating point context passed to it.
Definition: cpu.c:167
#define CPU_swap_u16(value)
This routine swaps a 16 bir quantity.
Definition: cpu.h:1253
V850 Set up Basic CPU Dependency Settings Based on Compiler Settings.
#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
The following macro is a compiler specific way to indicate that the method will NOT return to the cal...
Definition: basedefs.h:162
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: arm-exception-frame-print.c:46