31 #ifndef _RTEMS_SCORE_CPU_H 32 #define _RTEMS_SCORE_CPU_H 38 #include <rtems/score/types.h> 64 #define CPU_INLINE_ENABLE_DISPATCH FALSE 93 #define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE 106 #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE 126 #define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE 140 #define CPU_ALLOCATE_INTERRUPT_STACK TRUE 151 #define CPU_ISR_PASSES_FRAME_POINTER 0 188 #if ( M32R_HAS_FPU == 1 ) 189 #define CPU_HARDWARE_FP TRUE 191 #define CPU_HARDWARE_FP FALSE 193 #define CPU_SOFTWARE_FP FALSE 219 #define CPU_ALL_TASKS_ARE_FP TRUE 236 #define CPU_IDLE_TASK_IS_FP FALSE 267 #define CPU_USE_DEFERRED_FP_SWITCH TRUE 293 #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE 306 #define CPU_STACK_GROWS_UP TRUE 331 #define CPU_STRUCTURE_ALIGNMENT 333 #define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE 356 #define CPU_BIG_ENDIAN TRUE 371 #define CPU_LITTLE_ENDIAN FALSE 385 #define CPU_MODES_INTERRUPT_MASK 0x00000001 387 #define CPU_PER_CPU_CONTROL_SIZE 0 401 } CPU_Per_CPU_control;
481 #define _CPU_Context_Get_SP( _context ) \ 490 double some_float_register;
503 uint32_t special_interrupt_register;
561 #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) 572 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 582 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 32 587 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) 593 #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE 606 #define CPU_STACK_MINIMUM_SIZE (1024) 608 #define CPU_SIZEOF_POINTER 4 618 #define CPU_ALIGNMENT 8 643 #define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT 661 #define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT 676 #define CPU_STACK_ALIGNMENT 0 694 #define _CPU_Initialize_vectors() 706 #define _CPU_ISR_Disable( _isr_cookie ) \ 722 #define _CPU_ISR_Enable( _isr_cookie ) \ 724 (_isr_cookie) = (_isr_cookie); \ 739 #define _CPU_ISR_Flash( _isr_cookie ) \ 741 _CPU_ISR_Enable( _isr_cookie ); \ 742 _CPU_ISR_Disable( _isr_cookie ); \ 818 uint32_t *stack_base,
867 #define _CPU_Context_Fp_start( _base, _offset ) \ 868 ( (void *) _Addresses_Add_offset( (_base), (_offset) ) ) 888 #define _CPU_Context_Initialize_fp( _destination ) \ 890 *(*(_destination)) = _CPU_Null_fp_context; \ 906 #define _CPU_Fatal_halt( _source, _error ) \ 926 #define CPU_USE_GENERIC_BITFIELD_CODE TRUE 936 #define CPU_USE_GENERIC_BITFIELD_DATA TRUE 1002 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 1003 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \ 1020 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 1022 #define _CPU_Priority_Mask( _bit_number ) \ 1023 ( 1 << (_bit_number) ) 1039 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE) 1041 #define _CPU_Priority_bits_index( _priority ) \ 1231 static inline uint32_t CPU_swap_u32(
1235 uint32_t byte1, byte2, byte3, byte4, swapped;
1237 byte4 = (value >> 24) & 0xff;
1238 byte3 = (value >> 16) & 0xff;
1239 byte2 = (value >> 8) & 0xff;
1240 byte1 = value & 0xff;
1242 swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
1253 #define CPU_swap_u16( value ) \ 1254 (((value&0xff) << 8) | ((value >> 8)&0xff)) 1261 CPU_Counter_ticks second,
1262 CPU_Counter_ticks first
1265 return second - first;
uint32_t r9
r9 – temporary register
Definition: cpu.h:455
uint32_t r13_fp
r13 – frame pointer
Definition: cpu.h:463
void _CPU_ISR_install_vector(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs an interrupt vector.
Definition: cpu.c:69
void _CPU_Context_validate(uintptr_t pattern)
Initializes and validates the CPU context with values derived from the pattern parameter.
Definition: cpu.h:1109
uint32_t _CPU_ISR_Get_level(void)
Return the current interrupt disable level for this task in the format used by the interrupt level po...
Definition: cpu.c:39
void _CPU_Context_restore(Context_Control *new_context)
This routine is generally used only to restart self in an efficient manner.
Definition: cpu_asm.c:112
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:92
Set up Basic CPU Dependency Settings Based on Compiler Settings.
uint32_t r14_lr
r14 – link register (aka return pointer
Definition: cpu.h:465
void _CPU_Context_volatile_clobber(uintptr_t pattern)
Clobbers all volatile registers with values derived from the pattern parameter.
Definition: cpu.h:1104
This defines the minimal set of integer and processor state registers that must be saved during a vol...
Definition: cpu.h:248
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:26
void _CPU_Install_interrupt_stack(void)
This routine installs the hardware interrupt stack pointer.
Definition: cpu.c:101
SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context
This variable is optional.
Definition: cpu.h:494
uint32_t CPU_Counter_ticks
Unsigned integer type for CPU counter values.
Definition: cpu.h:1461
This defines the set of integer and processor state registers that must be saved during an interrupt...
Definition: cpu.h:425
void _CPU_ISR_install_raw_handler(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs a "raw" interrupt handler directly into the processor's vector table...
Definition: cpu.c:57
void _CPU_Context_Restart_self(Context_Control *the_context)
This routine is responsible for somehow restarting the currently executing task.
void _CPU_ISR_Set_level(uint32_t level)
Sets the hardware interrupt level by the level value.
Definition: cpu.c:62
void _CPU_Context_restore_fp(Context_Control_fp **fp_context_ptr)
This routine restores the floating point context passed to it.
Definition: cpu.c:176
void _CPU_Context_Initialize(Context_Control *the_context, uint32_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
Initialize the context to a state suitable for starting a task after a context restore operation...
Definition: cpu.c:183
CPU_Counter_ticks _CPU_Counter_read(void)
Returns the current CPU counter value.
Definition: cpu.c:96
CPU_Counter_ticks _CPU_Counter_difference(CPU_Counter_ticks second, CPU_Counter_ticks first)
Returns the difference between the second and first CPU counter value.
Definition: cpu.h:1160
uint32_t r8
r8 – temporary register
Definition: cpu.h:453
This defines the complete set of floating point registers that must be saved during any context switc...
Definition: cpu.h:294
uint32_t acc_low
dsp accumulator low order 32-bits
Definition: cpu.h:469
void _CPU_Context_save_fp(Context_Control_fp **fp_context_ptr)
This routine saves the floating point context passed to it.
Definition: cpu.c:167
#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
The following macro is a compiler specific way to indicate that the method will NOT return to the cal...
Definition: basedefs.h:162
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: arm-exception-frame-print.c:46
uint32_t r10
r10 – temporary register
Definition: cpu.h:457
#define SCORE_EXTERN
The following ensures that all data is declared in the space of the initialization routine for either...
Definition: basedefs.h:81
void * proc_ptr
XXX: Eventually proc_ptr needs to disappear!!!
Definition: basedefs.h:329
uint32_t acc_high
dsp accumulator high order 32-bits
Definition: cpu.h:471
uint32_t r15_sp
r15 – stack pointer
Definition: cpu.h:467