RTEMS CPU Kit with SuperCore  4.11.3
cpu.h
Go to the documentation of this file.
1 
22 /*
23  * COPYRIGHT (c) 1989-2008.
24  * On-Line Applications Research Corporation (OAR).
25  *
26  * The license and distribution terms for this file may be
27  * found in the file LICENSE in this distribution or at
28  * http://www.rtems.org/license/LICENSE.
29  */
30 
31 #ifndef _RTEMS_SCORE_CPU_H
32 #define _RTEMS_SCORE_CPU_H
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 #include <rtems/score/types.h>
39 #include <rtems/score/m32r.h>
40 
41 /* conditional compilation parameters */
42 
64 #define CPU_INLINE_ENABLE_DISPATCH FALSE
65 
93 #define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
94 
106 #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
107 
126 #define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE
127 
140 #define CPU_ALLOCATE_INTERRUPT_STACK TRUE
141 
151 #define CPU_ISR_PASSES_FRAME_POINTER 0
152 
188 #if ( M32R_HAS_FPU == 1 )
189 #define CPU_HARDWARE_FP TRUE
190 #else
191 #define CPU_HARDWARE_FP FALSE
192 #endif
193 #define CPU_SOFTWARE_FP FALSE
194 
219 #define CPU_ALL_TASKS_ARE_FP TRUE
220 
236 #define CPU_IDLE_TASK_IS_FP FALSE
237 
267 #define CPU_USE_DEFERRED_FP_SWITCH TRUE
268 
293 #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE
294 
306 #define CPU_STACK_GROWS_UP TRUE
307 
331 #define CPU_STRUCTURE_ALIGNMENT
332 
333 #define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE
334 
356 #define CPU_BIG_ENDIAN TRUE
357 
371 #define CPU_LITTLE_ENDIAN FALSE
372 
385 #define CPU_MODES_INTERRUPT_MASK 0x00000001
386 
387 #define CPU_PER_CPU_CONTROL_SIZE 0
388 
389 /*
390  * Processor defined structures required for cpukit/score.
391  *
392  * Port Specific Information:
393  *
394  * XXX document implementation including references if appropriate
395  */
396 
397 /* may need to put some structures here. */
398 
399 typedef struct {
400  /* There is no CPU specific per-CPU state */
401 } CPU_Per_CPU_control;
402 
451 typedef struct {
453  uint32_t r8;
455  uint32_t r9;
457  uint32_t r10;
459  uint32_t r11;
461  uint32_t r12;
463  uint32_t r13_fp;
465  uint32_t r14_lr;
467  uint32_t r15_sp;
469  uint32_t acc_low;
471  uint32_t acc_high;
473 
481 #define _CPU_Context_Get_SP( _context ) \
482  (_context)->r15_sp
483 
488 typedef struct {
490  double some_float_register;
492 
498 typedef struct {
503  uint32_t special_interrupt_register;
505 
517 
540 /*
541  * Nothing prevents the porter from declaring more CPU specific variables.
542  *
543  * Port Specific Information:
544  *
545  * XXX document implementation including references if appropriate
546  */
547 
548 /* XXX: if needed, put more variables here */
549 
561 #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
562 
572 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
573 
582 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
583 
587 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
588 
593 #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
594 
606 #define CPU_STACK_MINIMUM_SIZE (1024)
607 
608 #define CPU_SIZEOF_POINTER 4
609 
618 #define CPU_ALIGNMENT 8
619 
643 #define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
644 
661 #define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT
662 
676 #define CPU_STACK_ALIGNMENT 0
677 
678 /*
679  * ISR handler macros
680  */
681 
694 #define _CPU_Initialize_vectors()
695 
706 #define _CPU_ISR_Disable( _isr_cookie ) \
707  do { \
708  (_isr_cookie) = 0; \
709  } while (0)
710 
722 #define _CPU_ISR_Enable( _isr_cookie ) \
723  do { \
724  (_isr_cookie) = (_isr_cookie); \
725  } while (0)
726 
739 #define _CPU_ISR_Flash( _isr_cookie ) \
740  do { \
741  _CPU_ISR_Enable( _isr_cookie ); \
742  _CPU_ISR_Disable( _isr_cookie ); \
743  } while (0)
744 
760 static inline void _CPU_ISR_Set_level( unsigned int new_level )
761 {
762 }
763 
774 uint32_t _CPU_ISR_Get_level( void );
775 
776 /* end of ISR handler macros */
777 
780 /* Context handler macros */
781 
817  Context_Control *the_context,
818  uint32_t *stack_base,
819  size_t size,
820  uint32_t new_level,
821  void *entry_point,
822  bool is_fp,
823  void *tls_area
824 );
825 
842  Context_Control *the_context
844 
867 #define _CPU_Context_Fp_start( _base, _offset ) \
868  ( (void *) _Addresses_Add_offset( (_base), (_offset) ) )
869 
888 #define _CPU_Context_Initialize_fp( _destination ) \
889  { \
890  *(*(_destination)) = _CPU_Null_fp_context; \
891  }
892 
893 /* end of Context handler macros */
894 
895 /* Fatal Error manager macros */
896 
906 #define _CPU_Fatal_halt( _source, _error ) \
907  { \
908  }
909 
910 /* end of Fatal Error manager macros */
911 
912 /* Bitfield handler macros */
913 
926 #define CPU_USE_GENERIC_BITFIELD_CODE TRUE
927 
936 #define CPU_USE_GENERIC_BITFIELD_DATA TRUE
937 
1002 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
1003 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \
1004  { \
1005  (_output) = 0; /* do something to prevent warnings */ \
1006  }
1007 #endif
1008 
1009 /* end of Bitfield handler macros */
1010 
1020 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
1021 
1022 #define _CPU_Priority_Mask( _bit_number ) \
1023  ( 1 << (_bit_number) )
1024 
1025 #endif
1026 
1039 #if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
1040 
1041 #define _CPU_Priority_bits_index( _priority ) \
1042  (_priority)
1043 
1044 #endif
1045 
1046 /* end of Priority handler macros */
1047 
1050 /* functions */
1051 
1061 void _CPU_Initialize(void);
1062 
1077  uint32_t vector,
1078  proc_ptr new_handler,
1079  proc_ptr *old_handler
1080 );
1081 
1095  uint32_t vector,
1096  proc_ptr new_handler,
1097  proc_ptr *old_handler
1098 );
1099 
1111 void _CPU_Install_interrupt_stack( void );
1112 
1124 void _CPU_Context_switch(
1125  Context_Control *run,
1126  Context_Control *heir
1127 );
1128 
1147  Context_Control *new_context
1149 
1164  Context_Control_fp **fp_context_ptr
1165 );
1166 
1181  Context_Control_fp **fp_context_ptr
1182 );
1183 
1184 static inline void _CPU_Context_volatile_clobber( uintptr_t pattern )
1185 {
1186  /* TODO */
1187 }
1188 
1189 static inline void _CPU_Context_validate( uintptr_t pattern )
1190 {
1191  while (1) {
1192  /* TODO */
1193  }
1194 }
1195 
1198 /* FIXME */
1199 typedef CPU_Interrupt_frame CPU_Exception_frame;
1200 
1201 void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
1202 
1231 static inline uint32_t CPU_swap_u32(
1232  uint32_t value
1233 )
1234 {
1235  uint32_t byte1, byte2, byte3, byte4, swapped;
1236 
1237  byte4 = (value >> 24) & 0xff;
1238  byte3 = (value >> 16) & 0xff;
1239  byte2 = (value >> 8) & 0xff;
1240  byte1 = value & 0xff;
1241 
1242  swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
1243  return swapped;
1244 }
1245 
1253 #define CPU_swap_u16( value ) \
1254  (((value&0xff) << 8) | ((value >> 8)&0xff))
1255 
1256 typedef uint32_t CPU_Counter_ticks;
1257 
1258 CPU_Counter_ticks _CPU_Counter_read( void );
1259 
1260 static inline CPU_Counter_ticks _CPU_Counter_difference(
1261  CPU_Counter_ticks second,
1262  CPU_Counter_ticks first
1263 )
1264 {
1265  return second - first;
1266 }
1267 
1268 #ifdef __cplusplus
1269 }
1270 #endif
1271 
1272 #endif
uint32_t r9
r9 – temporary register
Definition: cpu.h:455
uint32_t r13_fp
r13 – frame pointer
Definition: cpu.h:463
void _CPU_ISR_install_vector(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs an interrupt vector.
Definition: cpu.c:69
void _CPU_Context_validate(uintptr_t pattern)
Initializes and validates the CPU context with values derived from the pattern parameter.
Definition: cpu.h:1109
uint32_t _CPU_ISR_Get_level(void)
Return the current interrupt disable level for this task in the format used by the interrupt level po...
Definition: cpu.c:39
void _CPU_Context_restore(Context_Control *new_context)
This routine is generally used only to restart self in an efficient manner.
Definition: cpu_asm.c:112
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:92
Set up Basic CPU Dependency Settings Based on Compiler Settings.
uint32_t r14_lr
r14 – link register (aka return pointer
Definition: cpu.h:465
void _CPU_Context_volatile_clobber(uintptr_t pattern)
Clobbers all volatile registers with values derived from the pattern parameter.
Definition: cpu.h:1104
This defines the minimal set of integer and processor state registers that must be saved during a vol...
Definition: cpu.h:248
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:26
void _CPU_Install_interrupt_stack(void)
This routine installs the hardware interrupt stack pointer.
Definition: cpu.c:101
SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context
This variable is optional.
Definition: cpu.h:494
uint32_t CPU_Counter_ticks
Unsigned integer type for CPU counter values.
Definition: cpu.h:1461
This defines the set of integer and processor state registers that must be saved during an interrupt...
Definition: cpu.h:425
void _CPU_ISR_install_raw_handler(uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler)
This routine installs a "raw" interrupt handler directly into the processor&#39;s vector table...
Definition: cpu.c:57
void _CPU_Context_Restart_self(Context_Control *the_context)
This routine is responsible for somehow restarting the currently executing task.
void _CPU_ISR_Set_level(uint32_t level)
Sets the hardware interrupt level by the level value.
Definition: cpu.c:62
void _CPU_Context_restore_fp(Context_Control_fp **fp_context_ptr)
This routine restores the floating point context passed to it.
Definition: cpu.c:176
void _CPU_Context_Initialize(Context_Control *the_context, uint32_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
Initialize the context to a state suitable for starting a task after a context restore operation...
Definition: cpu.c:183
CPU_Counter_ticks _CPU_Counter_read(void)
Returns the current CPU counter value.
Definition: cpu.c:96
CPU_Counter_ticks _CPU_Counter_difference(CPU_Counter_ticks second, CPU_Counter_ticks first)
Returns the difference between the second and first CPU counter value.
Definition: cpu.h:1160
uint32_t r8
r8 – temporary register
Definition: cpu.h:453
This defines the complete set of floating point registers that must be saved during any context switc...
Definition: cpu.h:294
uint32_t acc_low
dsp accumulator low order 32-bits
Definition: cpu.h:469
void _CPU_Context_save_fp(Context_Control_fp **fp_context_ptr)
This routine saves the floating point context passed to it.
Definition: cpu.c:167
#define RTEMS_COMPILER_NO_RETURN_ATTRIBUTE
The following macro is a compiler specific way to indicate that the method will NOT return to the cal...
Definition: basedefs.h:162
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: arm-exception-frame-print.c:46
uint32_t r10
r10 – temporary register
Definition: cpu.h:457
#define SCORE_EXTERN
The following ensures that all data is declared in the space of the initialization routine for either...
Definition: basedefs.h:81
void * proc_ptr
XXX: Eventually proc_ptr needs to disappear!!!
Definition: basedefs.h:329
uint32_t acc_high
dsp accumulator high order 32-bits
Definition: cpu.h:471
uint32_t r15_sp
r15 – stack pointer
Definition: cpu.h:467