RTEMS  5.0.0
Data Structures | Macros | Typedefs | Functions
cpu.h File Reference
#include <rtems/score/basedefs.h>
#include <rtems/score/powerpc.h>
#include <rtems/powerpc/registers.h>
#include <string.h>

Go to the source code of this file.

Data Structures

struct  ppc_context
 
struct  Context_Control
 Thread register context. More...
 
struct  Context_Control_fp
 SPARC basic context. More...
 
struct  CPU_Exception_frame
 The set of registers that specifies the complete processor state. More...
 

Macros

#define CPU_STACK_GROWS_UP   FALSE
 
#define CPU_CACHE_LINE_BYTES   PPC_STRUCTURE_ALIGNMENT
 
#define CPU_STRUCTURE_ALIGNMENT   RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
 
#define CPU_HARDWARE_FP   FALSE
 
#define CPU_SOFTWARE_FP   FALSE
 
#define CPU_ALL_TASKS_ARE_FP   CPU_HARDWARE_FP
 
#define CPU_IDLE_TASK_IS_FP   FALSE
 
#define CPU_MAXIMUM_PROCESSORS   32
 
#define PPC_GPR_TYPE   uintptr_t
 
#define PPC_GPR_SIZE   4
 
#define PPC_GPR_LOAD   lwz
 
#define PPC_GPR_STORE   stw
 
#define PPC_REG_SIZE   4
 
#define PPC_REG_LOAD   lwz
 
#define PPC_REG_STORE   stw
 
#define PPC_REG_STORE_UPDATE   stwu
 
#define PPC_REG_CMP   cmpw
 
#define _CPU_Context_Get_SP(_context)   ppc_get_context(_context)->gpr1
 
#define PPC_CONTEXT_OFFSET_MSR   (PPC_DEFAULT_CACHE_LINE_SIZE)
 
#define PPC_CONTEXT_OFFSET_CR   (PPC_DEFAULT_CACHE_LINE_SIZE + 4)
 
#define PPC_CONTEXT_OFFSET_GPR1   (PPC_DEFAULT_CACHE_LINE_SIZE + 8)
 
#define PPC_CONTEXT_OFFSET_LR   (PPC_DEFAULT_CACHE_LINE_SIZE + PPC_REG_SIZE + 8)
 
#define PPC_CONTEXT_GPR_OFFSET(gpr)
 
#define PPC_CONTEXT_OFFSET_GPR14   PPC_CONTEXT_GPR_OFFSET( 14 )
 
#define PPC_CONTEXT_OFFSET_GPR15   PPC_CONTEXT_GPR_OFFSET( 15 )
 
#define PPC_CONTEXT_OFFSET_GPR16   PPC_CONTEXT_GPR_OFFSET( 16 )
 
#define PPC_CONTEXT_OFFSET_GPR17   PPC_CONTEXT_GPR_OFFSET( 17 )
 
#define PPC_CONTEXT_OFFSET_GPR18   PPC_CONTEXT_GPR_OFFSET( 18 )
 
#define PPC_CONTEXT_OFFSET_GPR19   PPC_CONTEXT_GPR_OFFSET( 19 )
 
#define PPC_CONTEXT_OFFSET_GPR20   PPC_CONTEXT_GPR_OFFSET( 20 )
 
#define PPC_CONTEXT_OFFSET_GPR21   PPC_CONTEXT_GPR_OFFSET( 21 )
 
#define PPC_CONTEXT_OFFSET_GPR22   PPC_CONTEXT_GPR_OFFSET( 22 )
 
#define PPC_CONTEXT_OFFSET_GPR23   PPC_CONTEXT_GPR_OFFSET( 23 )
 
#define PPC_CONTEXT_OFFSET_GPR24   PPC_CONTEXT_GPR_OFFSET( 24 )
 
#define PPC_CONTEXT_OFFSET_GPR25   PPC_CONTEXT_GPR_OFFSET( 25 )
 
#define PPC_CONTEXT_OFFSET_GPR26   PPC_CONTEXT_GPR_OFFSET( 26 )
 
#define PPC_CONTEXT_OFFSET_GPR27   PPC_CONTEXT_GPR_OFFSET( 27 )
 
#define PPC_CONTEXT_OFFSET_GPR28   PPC_CONTEXT_GPR_OFFSET( 28 )
 
#define PPC_CONTEXT_OFFSET_GPR29   PPC_CONTEXT_GPR_OFFSET( 29 )
 
#define PPC_CONTEXT_OFFSET_GPR30   PPC_CONTEXT_GPR_OFFSET( 30 )
 
#define PPC_CONTEXT_OFFSET_GPR31   PPC_CONTEXT_GPR_OFFSET( 31 )
 
#define PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE   PPC_CONTEXT_GPR_OFFSET( 32 )
 
#define PPC_CONTEXT_OFFSET_F(f)   ( ( ( f ) - 14 ) * 8 + PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE + 8 )
 
#define PPC_CONTEXT_VOLATILE_SIZE   (PPC_CONTEXT_GPR_OFFSET( 32 ) + 8)
 
#define PPC_CONTEXT_OFFSET_TP   PPC_CONTEXT_VOLATILE_SIZE
 
#define CPU_SIMPLE_VECTORED_INTERRUPTS   FALSE
 
#define CPU_ISR_PASSES_FRAME_POINTER   FALSE
 
#define CPU_USE_DEFERRED_FP_SWITCH   FALSE
 
#define CPU_ENABLE_ROBUST_THREAD_DISPATCH   FALSE
 
#define CPU_MODES_INTERRUPT_MASK   0x00000001 /* interrupt level in mode */
 
#define CPU_CONTEXT_FP_SIZE   sizeof( Context_Control_fp )
 
#define CPU_STACK_CHECK_PATTERN_INITIALIZER
 
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK   0
 
#define CPU_PROVIDES_ISR_IS_IN_PROGRESS   FALSE
 
#define _CPU_Fatal_halt(_source, _error)
 
#define CPU_STACK_MINIMUM_SIZE   (1024*8)
 
#define CPU_SIZEOF_POINTER   4
 
#define CPU_ALIGNMENT   (PPC_ALIGNMENT)
 
#define CPU_HEAP_ALIGNMENT   (PPC_ALIGNMENT)
 
#define CPU_STACK_ALIGNMENT   (PPC_STACK_ALIGNMENT)
 
#define CPU_INTERRUPT_STACK_ALIGNMENT   CPU_CACHE_LINE_BYTES
 
#define CPU_swap_u16(value)   (((value&0xff) << 8) | ((value >> 8)&0xff))
 
#define _CPU_Context_Restart_self(_the_context)   _CPU_Context_restore( (_the_context) );
 
#define _CPU_Context_Initialize_fp(_destination)   memset( *(_destination), 0, sizeof( **(_destination) ) )
 
#define CPU_USE_GENERIC_BITFIELD_CODE   FALSE
 
#define _CPU_Bitfield_Find_first_bit(_value, _output)
 
#define _CPU_Priority_Mask(_bit_number)   ( 0x8000u >> (_bit_number) )
 
#define _CPU_Priority_bits_index(_priority)   (_priority)
 

Typedefs

typedef uint32_t CPU_Counter_ticks
 
typedef uintptr_t CPU_Uint32ptr
 

Functions

RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled (uint32_t level)
 Returns true if interrupts are enabled in the specified ISR level, otherwise returns false. More...
 
uint32_t _CPU_Counter_frequency (void)
 Returns the current CPU counter frequency in Hz. More...
 
void _CPU_Context_Initialize (Context_Control *the_context, void *stack_base, size_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
 
void _CPU_Initialize (void)
 CPU initialization. More...
 
void * _CPU_Thread_Idle_body (uintptr_t ignored)
 
void _CPU_Context_switch (Context_Control *run, Context_Control *heir)
 CPU switch context. More...
 
void _CPU_Context_restore (Context_Control *new_context) RTEMS_NO_RETURN
 
void _CPU_Context_save_fp (Context_Control_fp **fp_context_ptr)
 
void _CPU_Context_restore_fp (Context_Control_fp **fp_context_ptr)
 
void _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
 Prints the exception frame via printk(). More...
 
void _CPU_Initialize_altivec (void)
 
void _CPU_Context_switch_altivec (ppc_context *from, ppc_context *to)
 
void _CPU_Context_restore_altivec (ppc_context *ctxt)
 
void _CPU_Context_initialize_altivec (ppc_context *ctxt)
 
void _CPU_Fatal_error (uint32_t _error)
 

Macro Definition Documentation

◆ _CPU_Bitfield_Find_first_bit

#define _CPU_Bitfield_Find_first_bit (   _value,
  _output 
)
Value:
{ \
__asm__ volatile ("cntlzw %0, %1" : "=r" ((_output)), "=r" ((_value)) : \
"1" ((_value))); \
(_output) = (_output) - 16; \
}

◆ _CPU_Fatal_halt

#define _CPU_Fatal_halt (   _source,
  _error 
)
Value:
do { \
ppc_interrupt_disable(); \
__asm__ volatile ( \
"mr 3, %0\n" \
"mr 4, %1\n" \
"1:\n" \
"b 1b\n" \
: \
: "r" (_source), "r" (_error) \
: "memory" \
); \
} while ( 0 )

◆ CPU_STACK_CHECK_PATTERN_INITIALIZER

#define CPU_STACK_CHECK_PATTERN_INITIALIZER
Value:
{ 0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06, \
0xFEEDF00D, 0x0BAD0D06, 0xDEADF00D, 0x600D0D06 }

◆ PPC_CONTEXT_GPR_OFFSET

#define PPC_CONTEXT_GPR_OFFSET (   gpr)
Value:
(((gpr) - 14) * PPC_GPR_SIZE + \
PPC_DEFAULT_CACHE_LINE_SIZE + 8 + 2 * PPC_REG_SIZE)

Typedef Documentation

◆ CPU_Uint32ptr

typedef uintptr_t CPU_Uint32ptr

Type that can store a 32-bit integer or a pointer.