 |
RTEMS
5.0.0
|
|
RTEMS
5.0.0
|
The set of registers that specifies the complete processor state. More...
#include <cpu.h>
Data Fields | |
| uint32_t | register_r0 |
| uint32_t | register_r1 |
| uint32_t | register_r2 |
| uint32_t | register_r3 |
| uint32_t | register_r4 |
| uint32_t | register_r5 |
| uint32_t | register_r6 |
| uint32_t | register_r7 |
| uint32_t | register_r8 |
| uint32_t | register_r9 |
| uint32_t | register_r10 |
| uint32_t | register_r11 |
| uint32_t | register_r12 |
| uint32_t | register_sp |
| void * | register_lr |
| void * | register_pc |
| const ARM_VFP_context * | vfp_context |
| uint32_t | reserved_for_stack_alignment |
| uint32_t | r [62] |
| uint32_t | status |
| uint32_t | config |
| uint32_t | iret |
| struct Context_Control_sse * | fp_ctxt |
| uint32_t | edi |
| uint32_t | esi |
| uint32_t | ebp |
| uint32_t | esp0 |
| uint32_t | ebx |
| uint32_t | edx |
| uint32_t | ecx |
| uint32_t | eax |
| uint32_t | idtIndex |
| uint32_t | faultCode |
| uint32_t | eip |
| uint32_t | cs |
| uint32_t | eflags |
| uint32_t | vecnum |
| uint32_t | sr |
| uint32_t | pc |
| uint32_t | d0 |
| uint32_t | d1 |
| uint32_t | d2 |
| uint32_t | d3 |
| uint32_t | d4 |
| uint32_t | d5 |
| uint32_t | d6 |
| uint32_t | d7 |
| uint32_t | a0 |
| uint32_t | a1 |
| uint32_t | a2 |
| uint32_t | a3 |
| uint32_t | a4 |
| uint32_t | a5 |
| uint32_t | a6 |
| uint32_t | a7 |
| uint32_t | integer_registers [16] |
| uint32_t | r1 |
| uint32_t | r2 |
| uint32_t | r3 |
| uint32_t | r4 |
| uint32_t | r5 |
| uint32_t | r6 |
| uint32_t | r7 |
| uint32_t | r8 |
| uint32_t | r9 |
| uint32_t | r10 |
| uint32_t | r11 |
| uint32_t | r12 |
| uint32_t | r13 |
| uint32_t | r14 |
| uint32_t | r15 |
| uint32_t | r16 |
| uint32_t | r17 |
| uint32_t | r18 |
| uint32_t | r19 |
| uint32_t | r20 |
| uint32_t | r21 |
| uint32_t | r22 |
| uint32_t | r23 |
| uint32_t | gp |
| uint32_t | fp |
| uint32_t | sp |
| uint32_t | ra |
| uint32_t | et |
| uint32_t | ea |
| uint32_t | ienable |
| uint32_t | ipending |
| uint32_t | processor_state_register |
| double | float_registers [1] |
| uint32_t | epcr |
| uint32_t | eear |
| uint32_t | esr |
| uintptr_t | EXC_SRR0 |
| uintptr_t | EXC_SRR1 |
| uint32_t | _EXC_number |
| uint32_t | RESERVED_FOR_ALIGNMENT_0 |
| uint32_t | EXC_CR |
| uint32_t | EXC_XER |
| uintptr_t | EXC_CTR |
| uintptr_t | EXC_LR |
| uintptr_t | RESERVED_FOR_ALIGNMENT_1 |
| PPC_GPR_TYPE | GPR0 |
| PPC_GPR_TYPE | GPR1 |
| PPC_GPR_TYPE | GPR2 |
| PPC_GPR_TYPE | GPR3 |
| PPC_GPR_TYPE | GPR4 |
| PPC_GPR_TYPE | GPR5 |
| PPC_GPR_TYPE | GPR6 |
| PPC_GPR_TYPE | GPR7 |
| PPC_GPR_TYPE | GPR8 |
| PPC_GPR_TYPE | GPR9 |
| PPC_GPR_TYPE | GPR10 |
| PPC_GPR_TYPE | GPR11 |
| PPC_GPR_TYPE | GPR12 |
| PPC_GPR_TYPE | GPR13 |
| PPC_GPR_TYPE | GPR14 |
| PPC_GPR_TYPE | GPR15 |
| PPC_GPR_TYPE | GPR16 |
| PPC_GPR_TYPE | GPR17 |
| PPC_GPR_TYPE | GPR18 |
| PPC_GPR_TYPE | GPR19 |
| PPC_GPR_TYPE | GPR20 |
| PPC_GPR_TYPE | GPR21 |
| PPC_GPR_TYPE | GPR22 |
| PPC_GPR_TYPE | GPR23 |
| PPC_GPR_TYPE | GPR24 |
| PPC_GPR_TYPE | GPR25 |
| PPC_GPR_TYPE | GPR26 |
| PPC_GPR_TYPE | GPR27 |
| PPC_GPR_TYPE | GPR28 |
| PPC_GPR_TYPE | GPR29 |
| PPC_GPR_TYPE | GPR30 |
| PPC_GPR_TYPE | GPR31 |
| uintptr_t | RESERVED_FOR_ALIGNMENT_2 |
| CPU_Interrupt_frame | Interrupt_frame |
| uintptr_t | mcause |
| uintptr_t | sp |
| uintptr_t | gp |
| uintptr_t | tp |
| uintptr_t | s2 |
| uintptr_t | s3 |
| uintptr_t | s4 |
| uintptr_t | s5 |
| uintptr_t | s6 |
| uintptr_t | s7 |
| uintptr_t | s8 |
| uintptr_t | s9 |
| uintptr_t | s10 |
| uintptr_t | s11 |
| uint32_t | trap |
| CPU_Interrupt_frame * | isf |
The set of registers that specifies the complete processor state.
The CPU exception frame may be available in fatal error conditions like for example illegal opcodes, instruction fetch errors, or data access errors.
1.8.13