cpu.c File Reference

SPARC CPU Dependent Source. More...

#include <rtems/score/isr.h>
#include <rtems/score/percpu.h>
#include <rtems/score/tls.h>
#include <rtems/score/thread.h>
#include <rtems/rtems/cache.h>

Macros
#define	SPARC_ASSERT_OFFSET(field, off)
#define	SPARC_ASSERT_ISF_OFFSET(field, off)
#define	SPARC_ASSERT_FP_OFFSET(field, off)
#define	HIGH_BITS_MASK   0xFFFFFC00
#define	HIGH_BITS_SHIFT   10
#define	LOW_BITS_MASK   0x000003FF

Functions
	SPARC_ASSERT_OFFSET (g5, G5)
	SPARC_ASSERT_OFFSET (g7, G7)
	RTEMS_STATIC_ASSERT (offsetof(Context_Control, l0_and_l1)==L0_OFFSET, Context_Control_offset_L0)
	RTEMS_STATIC_ASSERT (offsetof(Context_Control, l0_and_l1)+4==L1_OFFSET, Context_Control_offset_L1)
	SPARC_ASSERT_OFFSET (l2, L2)
	SPARC_ASSERT_OFFSET (l3, L3)
	SPARC_ASSERT_OFFSET (l4, L4)
	SPARC_ASSERT_OFFSET (l5, L5)
	SPARC_ASSERT_OFFSET (l6, L6)
	SPARC_ASSERT_OFFSET (l7, L7)
	SPARC_ASSERT_OFFSET (i0, I0)
	SPARC_ASSERT_OFFSET (i1, I1)
	SPARC_ASSERT_OFFSET (i2, I2)
	SPARC_ASSERT_OFFSET (i3, I3)
	SPARC_ASSERT_OFFSET (i4, I4)
	SPARC_ASSERT_OFFSET (i5, I5)
	SPARC_ASSERT_OFFSET (i6_fp, I6_FP)
	SPARC_ASSERT_OFFSET (i7, I7)
	SPARC_ASSERT_OFFSET (o6_sp, O6_SP)
	SPARC_ASSERT_OFFSET (o7, O7)
	SPARC_ASSERT_OFFSET (psr, PSR)
	SPARC_ASSERT_OFFSET (isr_dispatch_disable, ISR_DISPATCH_DISABLE_STACK)
	SPARC_ASSERT_ISF_OFFSET (psr, PSR)
	SPARC_ASSERT_ISF_OFFSET (pc, PC)
	SPARC_ASSERT_ISF_OFFSET (npc, NPC)
	SPARC_ASSERT_ISF_OFFSET (g1, G1)
	SPARC_ASSERT_ISF_OFFSET (g2, G2)
	SPARC_ASSERT_ISF_OFFSET (g3, G3)
	SPARC_ASSERT_ISF_OFFSET (g4, G4)
	SPARC_ASSERT_ISF_OFFSET (g5, G5)
	SPARC_ASSERT_ISF_OFFSET (g7, G7)
	SPARC_ASSERT_ISF_OFFSET (i0, I0)
	SPARC_ASSERT_ISF_OFFSET (i1, I1)
	SPARC_ASSERT_ISF_OFFSET (i2, I2)
	SPARC_ASSERT_ISF_OFFSET (i3, I3)
	SPARC_ASSERT_ISF_OFFSET (i4, I4)
	SPARC_ASSERT_ISF_OFFSET (i5, I5)
	SPARC_ASSERT_ISF_OFFSET (i6_fp, I6_FP)
	SPARC_ASSERT_ISF_OFFSET (i7, I7)
	SPARC_ASSERT_ISF_OFFSET (y, Y)
	SPARC_ASSERT_ISF_OFFSET (tpc, TPC)
	SPARC_ASSERT_FP_OFFSET (f0_f1, F0_F1)
	SPARC_ASSERT_FP_OFFSET (f2_f3, F2_F3)
	SPARC_ASSERT_FP_OFFSET (f4_f5, F4_F5)
	SPARC_ASSERT_FP_OFFSET (f6_f7, F6_F7)
	SPARC_ASSERT_FP_OFFSET (f8_f9, F8_F9)
	SPARC_ASSERT_FP_OFFSET (f10_f11, F10_F11)
	SPARC_ASSERT_FP_OFFSET (f12_f13, F12_F13)
	SPARC_ASSERT_FP_OFFSET (f14_f15, F14_F15)
	SPARC_ASSERT_FP_OFFSET (f16_f17, F16_F17)
	SPARC_ASSERT_FP_OFFSET (f18_f19, F18_F19)
	SPARC_ASSERT_FP_OFFSET (f20_f21, F20_F21)
	SPARC_ASSERT_FP_OFFSET (f22_f23, F22_F23)
	SPARC_ASSERT_FP_OFFSET (f24_f25, F24_F25)
	SPARC_ASSERT_FP_OFFSET (f26_f27, F26_F27)
	SPARC_ASSERT_FP_OFFSET (f28_f29, F28_F29)
	SPARC_ASSERT_FP_OFFSET (f30_f31, F30_F31)
	SPARC_ASSERT_FP_OFFSET (fsr, FSR)
	RTEMS_STATIC_ASSERT (sizeof(SPARC_Minimum_stack_frame)==SPARC_MINIMUM_STACK_FRAME_SIZE, SPARC_MINIMUM_STACK_FRAME_SIZE)
	RTEMS_STATIC_ASSERT (sizeof(CPU_Interrupt_frame) % CPU_ALIGNMENT==0, CPU_Interrupt_frame_alignment)
void	_CPU_Initialize (void)
	CPU initialization. More...
uint32_t	_CPU_ISR_Get_level (void)
	Returns the interrupt level of the executing thread. More...
void	_CPU_ISR_install_raw_handler (uint32_t vector, CPU_ISR_raw_handler new_handler, CPU_ISR_raw_handler *old_handler)
	SPARC specific raw ISR installer. More...
void	_CPU_ISR_install_vector (uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler)
	SPARC specific RTEMS ISR installer. More...
void	_CPU_Context_Initialize (Context_Control *the_context, uint32_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)

Variables
const CPU_Trap_table_entry	_CPU_Trap_slot_template

Detailed Description

SPARC CPU Dependent Source.

Macro Definition Documentation

SPARC_ASSERT_FP_OFFSET

#define SPARC_ASSERT_FP_OFFSET	(		field,
			off
	)

Value:

RTEMS_STATIC_ASSERT( \
    offsetof(Context_Control_fp, field) == SPARC_FP_CONTEXT_OFFSET_ ## off, \
    Context_Control_fp_offset_ ## field \
  )

SPARC_ASSERT_ISF_OFFSET

#define SPARC_ASSERT_ISF_OFFSET	(		field,
			off
	)

Value:

RTEMS_STATIC_ASSERT( \
    offsetof(CPU_Interrupt_frame, field) == ISF_ ## off ## _OFFSET, \
    CPU_Interrupt_frame_offset_ ## field \
  )

SPARC_ASSERT_OFFSET

#define SPARC_ASSERT_OFFSET	(		field,
			off
	)

Value:

RTEMS_STATIC_ASSERT( \
    offsetof(Context_Control, field) == off ## _OFFSET, \
    Context_Control_offset_ ## field \
  )

Function Documentation

_CPU_Context_Initialize()

void _CPU_Context_Initialize	(	Context_Control *	the_context,
		uint32_t *	stack_base,
		uint32_t	size,
		uint32_t	new_level,
		void *	entry_point,
		bool	is_fp,
		void *	tls_area
	)

Initialize the context to a state suitable for starting a task after a context restore operation. Generally, this involves:

• setting a starting address
• preparing the stack
• preparing the stack and frame pointers
• setting the proper interrupt level in the context
• initializing the floating point context

Parameters

[in]	the_context	points to the context area
[in]	stack_base	is the low address of the allocated stack area
[in]	size	is the size of the stack area in bytes
[in]	new_level	is the interrupt level for the task
[in]	entry_point	is the task's entry point
[in]	is_fp	is set to TRUE if the task is a floating point task
[in]	tls_area	is the thread-local storage (TLS) area

NOTE: Implemented as a subroutine for the SPARC port.

Variable Documentation

_CPU_Trap_slot_template

const CPU_Trap_table_entry _CPU_Trap_slot_template

Initial value:

= {
  0xa1480000,      
  0x29000000,      
  0x81c52000,      
  0xa6102000       
}

This is the set of opcodes for the instructions loaded into a trap table entry. The routine which installs a handler is responsible for filling in the fields for the _handler address and the _vector trap type.

The constants following this structure are masks for the fields which must be filled in when the handler is installed.