RTEMS
5.0.0
|
Data Structures | |
struct | Context_Control |
Thread register context. More... | |
struct | Context_Control_fp |
SPARC basic context. More... | |
Macros | |
#define | _CPU_Context_Get_SP(_context) (_context)->o6_sp |
#define | G5_OFFSET 0x00 |
#define | G7_OFFSET 0x04 |
#define | L0_OFFSET 0x08 |
#define | L1_OFFSET 0x0C |
#define | L2_OFFSET 0x10 |
#define | L3_OFFSET 0x14 |
#define | L4_OFFSET 0x18 |
#define | L5_OFFSET 0x1C |
#define | L6_OFFSET 0x20 |
#define | L7_OFFSET 0x24 |
#define | I0_OFFSET 0x28 |
#define | I1_OFFSET 0x2C |
#define | I2_OFFSET 0x30 |
#define | I3_OFFSET 0x34 |
#define | I4_OFFSET 0x38 |
#define | I5_OFFSET 0x3C |
#define | I6_FP_OFFSET 0x40 |
#define | I7_OFFSET 0x44 |
#define | O6_SP_OFFSET 0x48 |
#define | O7_OFFSET 0x4C |
#define | PSR_OFFSET 0x50 |
#define | ISR_DISPATCH_DISABLE_STACK_OFFSET 0x54 |
#define | FO_F1_OFFSET 0x00 |
#define | F2_F3_OFFSET 0x08 |
#define | F4_F5_OFFSET 0x10 |
#define | F6_F7_OFFSET 0x18 |
#define | F8_F9_OFFSET 0x20 |
#define | F1O_F11_OFFSET 0x28 |
#define | F12_F13_OFFSET 0x30 |
#define | F14_F15_OFFSET 0x38 |
#define | F16_F17_OFFSET 0x40 |
#define | F18_F19_OFFSET 0x48 |
#define | F2O_F21_OFFSET 0x50 |
#define | F22_F23_OFFSET 0x58 |
#define | F24_F25_OFFSET 0x60 |
#define | F26_F27_OFFSET 0x68 |
#define | F28_F29_OFFSET 0x70 |
#define | F3O_F31_OFFSET 0x78 |
#define | FSR_OFFSET 0x80 |
#define | CONTEXT_CONTROL_FP_SIZE 0x84 |
Typedefs | |
typedef struct Context_Control_fp | Context_Control_fp |
Generally there are 2 types of context to save.
This means we have the following 3 context items:
On the SPARC, we are relatively conservative in that we save most of the CPU state in the context area. The ET (enable trap) bit and the CWP (current window pointer) fields of the PSR are considered system wide resources and are not maintained on a per-thread basis.
#define _CPU_Context_Get_SP | ( | _context | ) | (_context)->o6_sp |
This macro provides a CPU independent way for RTEMS to access the stack pointer in a context structure. The actual name and offset is CPU architecture dependent.
#define CONTEXT_CONTROL_FP_SIZE 0x84 |
This defines the size of the FPU context area for use in assembly.
#define F12_F13_OFFSET 0x30 |
This macro defines an offset into the FPU context for use in assembly.
#define F14_F15_OFFSET 0x38 |
This macro defines an offset into the FPU context for use in assembly.
#define F16_F17_OFFSET 0x40 |
This macro defines an offset into the FPU context for use in assembly.
#define F18_F19_OFFSET 0x48 |
This macro defines an offset into the FPU context for use in assembly.
#define F1O_F11_OFFSET 0x28 |
This macro defines an offset into the FPU context for use in assembly.
#define F22_F23_OFFSET 0x58 |
This macro defines an offset into the FPU context for use in assembly.
#define F24_F25_OFFSET 0x60 |
This macro defines an offset into the FPU context for use in assembly.
#define F26_F27_OFFSET 0x68 |
This macro defines an offset into the FPU context for use in assembly.
#define F28_F29_OFFSET 0x70 |
This macro defines an offset into the FPU context for use in assembly.
#define F2_F3_OFFSET 0x08 |
This macro defines an offset into the FPU context for use in assembly.
#define F2O_F21_OFFSET 0x50 |
This macro defines an offset into the FPU context for use in assembly.
#define F3O_F31_OFFSET 0x78 |
This macro defines an offset into the FPU context for use in assembly.
#define F4_F5_OFFSET 0x10 |
This macro defines an offset into the FPU context for use in assembly.
#define F6_F7_OFFSET 0x18 |
This macro defines an offset into the FPU context for use in assembly.
#define F8_F9_OFFSET 0x20 |
This macro defines an offset into the FPU context for use in assembly.
#define FO_F1_OFFSET 0x00 |
This macro defines an offset into the FPU context for use in assembly.
#define FSR_OFFSET 0x80 |
This macro defines an offset into the FPU context for use in assembly.
#define G5_OFFSET 0x00 |
This macro defines an offset into the context for use in assembly.
#define G7_OFFSET 0x04 |
This macro defines an offset into the context for use in assembly.
#define I0_OFFSET 0x28 |
This macro defines an offset into the context for use in assembly.
#define I1_OFFSET 0x2C |
This macro defines an offset into the context for use in assembly.
#define I2_OFFSET 0x30 |
This macro defines an offset into the context for use in assembly.
#define I3_OFFSET 0x34 |
This macro defines an offset into the context for use in assembly.
#define I4_OFFSET 0x38 |
This macro defines an offset into the context for use in assembly.
#define I5_OFFSET 0x3C |
This macro defines an offset into the context for use in assembly.
#define I6_FP_OFFSET 0x40 |
This macro defines an offset into the context for use in assembly.
#define I7_OFFSET 0x44 |
This macro defines an offset into the context for use in assembly.
#define ISR_DISPATCH_DISABLE_STACK_OFFSET 0x54 |
This macro defines an offset into the context for use in assembly.
#define L0_OFFSET 0x08 |
This macro defines an offset into the context for use in assembly.
#define L1_OFFSET 0x0C |
This macro defines an offset into the context for use in assembly.
#define L2_OFFSET 0x10 |
This macro defines an offset into the context for use in assembly.
#define L3_OFFSET 0x14 |
This macro defines an offset into the context for use in assembly.
#define L4_OFFSET 0x18 |
This macro defines an offset into the context for use in assembly.
#define L5_OFFSET 0x1C |
This macro defines an offset into the context for use in assembly.
#define L6_OFFSET 0x20 |
This macro defines an offset into the context for use in assembly.
#define L7_OFFSET 0x24 |
This macro defines an offset into the context for use in assembly.
#define O6_SP_OFFSET 0x48 |
This macro defines an offset into the context for use in assembly.
#define O7_OFFSET 0x4C |
This macro defines an offset into the context for use in assembly.
#define PSR_OFFSET 0x50 |
This macro defines an offset into the context for use in assembly.