RTEMS
5.0.0
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NIOS II Specific Thread Dispatch Disabled Indicator. More...
Macros | |
#define | NIOS2_ASSERT_OFFSET(field, off) |
Functions | |
NIOS2_ASSERT_OFFSET (r16, R16) | |
NIOS2_ASSERT_OFFSET (r17, R17) | |
NIOS2_ASSERT_OFFSET (r18, R18) | |
NIOS2_ASSERT_OFFSET (r19, R19) | |
NIOS2_ASSERT_OFFSET (r20, R20) | |
NIOS2_ASSERT_OFFSET (r21, R21) | |
NIOS2_ASSERT_OFFSET (r22, R22) | |
NIOS2_ASSERT_OFFSET (r23, R23) | |
NIOS2_ASSERT_OFFSET (fp, FP) | |
NIOS2_ASSERT_OFFSET (status, STATUS) | |
NIOS2_ASSERT_OFFSET (sp, SP) | |
NIOS2_ASSERT_OFFSET (ra, RA) | |
NIOS2_ASSERT_OFFSET (thread_dispatch_disabled, THREAD_DISPATCH_DISABLED) | |
NIOS2_ASSERT_OFFSET (stack_mpubase, STACK_MPUBASE) | |
NIOS2_ASSERT_OFFSET (stack_mpuacc, STACK_MPUACC) | |
Variables | |
uint32_t | _Nios2_Thread_dispatch_disabled |
Nios II specific thread dispatch disabled indicator. More... | |
NIOS II Specific Thread Dispatch Disabled Indicator.
#define NIOS2_ASSERT_OFFSET | ( | field, | |
off | |||
) |
uint32_t _Nios2_Thread_dispatch_disabled |
Nios II specific thread dispatch disabled indicator.
This global variable is used by the interrupt dispatch support for the external interrupt controller (EIC) with shadow registers. This makes it possible to do the thread dispatch after an interrupt without disabled interrupts and thus probably reduce the maximum interrupt latency. Its purpose is to prevent unbounded stack usage of the interrupted thread.