RTEMS  5.0.0
Data Structures | Macros | Typedefs | Functions | Variables
cpu.h File Reference

Mips CPU Dependent Header File. More...

#include <rtems/score/basedefs.h>
#include <rtems/score/mips.h>

Go to the source code of this file.

Data Structures

struct  Context_Control
 Thread register context. More...
 
struct  Context_Control_fp
 SPARC basic context. More...
 
struct  CPU_Interrupt_frame
 Interrupt stack frame (ISF). More...
 

Macros

#define CPU_SIMPLE_VECTORED_INTERRUPTS   FALSE
 
#define CPU_ISR_PASSES_FRAME_POINTER   TRUE
 
#define CPU_HARDWARE_FP   FALSE
 
#define CPU_ALL_TASKS_ARE_FP   CPU_HARDWARE_FP
 
#define CPU_IDLE_TASK_IS_FP   FALSE
 
#define CPU_USE_DEFERRED_FP_SWITCH   TRUE
 
#define CPU_ENABLE_ROBUST_THREAD_DISPATCH   FALSE
 
#define CPU_STACK_GROWS_UP   FALSE
 
#define CPU_CACHE_LINE_BYTES   16
 
#define CPU_STRUCTURE_ALIGNMENT   RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
 
#define CPU_MODES_INTERRUPT_MASK   0x000000ff
 
#define CPU_SIZEOF_POINTER   4
 
#define CPU_MAXIMUM_PROCESSORS   32
 
#define _CPU_Context_Get_SP(_context)   (uintptr_t) (_context)->sp
 
#define CPU_CONTEXT_FP_SIZE   sizeof( Context_Control_fp )
 
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK   0
 
#define CPU_STACK_MINIMUM_SIZE   (8 * 1024)
 
#define CPU_ALIGNMENT   8
 
#define CPU_HEAP_ALIGNMENT   CPU_ALIGNMENT
 
#define CPU_STACK_ALIGNMENT   CPU_ALIGNMENT
 
#define CPU_INTERRUPT_STACK_ALIGNMENT   CPU_CACHE_LINE_BYTES
 
#define _CPU_ISR_Disable(_level)
 
#define _CPU_ISR_Enable(_level)
 
#define _CPU_ISR_Flash(_xlevel)
 
#define _CPU_Context_Restart_self(_the_context)   _CPU_Context_restore( (_the_context) );
 
#define _CPU_Context_Initialize_fp(_destination)
 
#define _CPU_Fatal_halt(_source, _error)
 
#define CPU_USE_GENERIC_BITFIELD_CODE   TRUE
 
#define CPU_swap_u16(value)   (((value&0xff) << 8) | ((value >> 8)&0xff))
 

Typedefs

typedef CPU_Interrupt_frame CPU_Exception_frame
 
typedef uint32_t CPU_Counter_ticks
 
typedef uintptr_t CPU_Uint32ptr
 

Functions

void mips_vector_exceptions (CPU_Interrupt_frame *frame)
 
uint32_t mips_interrupt_mask (void)
 
RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled (uint32_t level)
 
uint32_t _CPU_ISR_Get_level (void)
 
void _CPU_ISR_Set_level (uint32_t)
 Sets the hardware interrupt level by the level value. More...
 
void _CPU_Context_Initialize (Context_Control *the_context, uintptr_t *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
 
void mips_break (int error)
 
void _CPU_Initialize (void)
 CPU initialization. More...
 
void * _CPU_Thread_Idle_body (uintptr_t ignored)
 
void _CPU_Context_switch (Context_Control *run, Context_Control *heir)
 CPU switch context. More...
 
void _CPU_Context_restore (Context_Control *new_context) RTEMS_NO_RETURN
 
void _CPU_Context_save_fp (Context_Control_fp **fp_context_ptr)
 
void _CPU_Context_restore_fp (Context_Control_fp **fp_context_ptr)
 
void _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
 Prints the exception frame via printk(). More...
 
uint32_t _CPU_Counter_frequency (void)
 
CPU_Counter_ticks _CPU_Counter_read (void)
 

Variables

Context_Control_fp _CPU_Null_fp_context
 

Detailed Description

Mips CPU Dependent Header File.