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#define | CPU_INLINE_ENABLE_DISPATCH FALSE |
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#define | CPU_UNROLL_ENQUEUE_PRIORITY TRUE |
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#define | CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE |
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#define | CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE |
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#define | CPU_ALLOCATE_INTERRUPT_STACK TRUE |
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#define | CPU_ISR_PASSES_FRAME_POINTER 1 |
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#define | CPU_HARDWARE_FP FALSE |
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#define | CPU_SOFTWARE_FP FALSE |
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#define | CPU_ALL_TASKS_ARE_FP FALSE |
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#define | CPU_IDLE_TASK_IS_FP FALSE |
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#define | CPU_USE_DEFERRED_FP_SWITCH FALSE |
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#define | CPU_PROVIDES_IDLE_THREAD_BODY TRUE |
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#define | CPU_STACK_GROWS_UP FALSE |
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#define | CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (64))) |
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#define | CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE |
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#define | CPU_BIG_ENDIAN FALSE |
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#define | CPU_LITTLE_ENDIAN TRUE |
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#define | CPU_MODES_INTERRUPT_MASK 0x00000001 |
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#define | _CPU_Context_Get_SP(_context) (_context)->r[13] |
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#define | CPU_CONTEXT_FP_SIZE 0 |
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#define | CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 |
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#define | CPU_STACK_MINIMUM_SIZE 4096 |
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#define | CPU_ALIGNMENT 8 |
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#define | CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE |
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#define | CPU_HEAP_ALIGNMENT CPU_ALIGNMENT |
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#define | CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT |
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#define | CPU_STACK_ALIGNMENT 8 |
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#define | _CPU_Initialize_vectors() |
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#define | _CPU_ISR_Disable(_level) _level = epiphany_interrupt_disable() |
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#define | _CPU_ISR_Enable(_level) epiphany_interrupt_enable( _level ) |
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#define | _CPU_ISR_Flash(_level) |
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#define | EPIPHANY_GCC_RED_ZONE_SIZE 128 |
| Account for GCC red-zone. More...
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#define | _CPU_Context_Restart_self(_the_context) _CPU_Context_restore( (_the_context) ) |
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#define | _CPU_Context_Fp_start(_base, _offset) ( (void *) _Addresses_Add_offset( (_base), (_offset) ) ) |
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#define | _CPU_Context_Initialize_fp(_destination) |
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#define | _CPU_Fatal_halt(_source, _error) |
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#define | CPU_USE_GENERIC_BITFIELD_CODE TRUE |
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#define | CPU_USE_GENERIC_BITFIELD_DATA TRUE |
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#define | _CPU_Bitfield_Find_first_bit(_value, _output) |
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#define | _CPU_Priority_Mask(_bit_number) (1 << _bit_number) |
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#define | _CPU_Priority_bits_index(_priority) (_priority) |
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#define | CPU_TIMESTAMP_USE_STRUCT_TIMESPEC FALSE |
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#define | CPU_TIMESTAMP_USE_INT64 TRUE |
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#define | CPU_TIMESTAMP_USE_INT64_INLINE FALSE |
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#define | CPU_SIZEOF_POINTER 4 |
| Size of a pointer. More...
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#define | CPU_EXCEPTION_FRAME_SIZE 260 |
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#define | CPU_PER_CPU_CONTROL_SIZE 0 |
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#define | CPU_swap_u16(value) (((value&0xff) << 8) | ((value >> 8)&0xff)) |
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void | _CPU_ISR_Set_level (uint32_t level) |
| Sets the hardware interrupt level by the level value. More...
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uint32_t | _CPU_ISR_Get_level (void) |
| Return the current interrupt disable level for this task in the format used by the interrupt level portion of the task mode. More...
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void | _CPU_Context_Initialize (Context_Control *context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area) |
| Initializes the CPU context. More...
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void | _CPU_Exception_frame_print (const CPU_Exception_frame *frame) |
| Prints the exception frame via printk(). More...
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void | _CPU_Initialize (void) |
| CPU initialization. More...
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void | _CPU_ISR_install_raw_handler (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler) |
| This routine installs a "raw" interrupt handler directly into the processor's vector table. More...
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void | _CPU_ISR_install_vector (uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler) |
| This routine installs an interrupt vector. More...
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void | _CPU_Install_interrupt_stack (void) |
| This routine installs the hardware interrupt stack pointer. More...
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void * | _CPU_Thread_Idle_body (uintptr_t ignored) |
| This routine is the CPU dependent IDLE thread body. More...
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void | _CPU_Context_switch (Context_Control *run, Context_Control *heir) |
| CPU switch context. More...
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void | _CPU_Context_restore (Context_Control *new_context) |
| This routine is generally used only to restart self in an efficient manner. More...
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void | _CPU_Context_save_fp (void **fp_context_ptr) |
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void | _CPU_Context_restore_fp (void **fp_context_ptr) |
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CPU_Counter_ticks | _CPU_Counter_read (void) |
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