|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:18 |
|
uint32_t VTES_PRC1:1 |
|
uint32_t __pad1__:4 |
|
uint32_t HVEN_PRC1:1 |
|
uint32_t __pad2__:2 |
|
uint32_t VTES:1 |
|
uint32_t __pad3__:4 |
|
uint32_t HVEN:1 |
|
} B |
|
} | MCR |
|
int32_t | INTC_reserved1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR_PRC1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA:21 |
|
uint32_t INTVEC:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA_PRC1:21 |
|
uint32_t INTVEC_PRC1:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR_PRC1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR_PRC1 |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:6 |
|
uint8_t SET:1 |
|
uint8_t CLR:1 |
|
} B |
|
} | SSCIR [8] |
|
uint32_t | intc_reserved2 [6] |
|
union { |
uint8_t R |
|
struct { |
uint8_t PRC_SEL:2 |
|
uint8_t __pad0__:2 |
|
uint8_t PRI:4 |
|
} B |
|
} | PSR [294] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:26 |
|
uint32_t VTES:1 |
|
uint32_t __pad1__:4 |
|
uint32_t HVEN:1 |
|
} B |
|
} | MCR |
|
int32_t | INTC_reserved00 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR |
|
uint32_t | intc_reserved1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA:21 |
|
uint32_t INTVEC:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR |
|
uint32_t | intc_reserved3 |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:6 |
|
uint8_t SET:1 |
|
uint8_t CLR:1 |
|
} B |
|
} | SSCIR [8] |
|
uint32_t | intc_reserved4 [6] |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:4 |
|
uint8_t PRI:4 |
|
} B |
|
} | PSR [358] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:26 |
|
uint32_t VTES:1 |
|
uint32_t __pad1__:4 |
|
uint32_t HVEN:1 |
|
} B |
|
} | MCR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA:21 |
|
uint32_t INTVEC:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:6 |
|
uint8_t SET:1 |
|
uint8_t CLR:1 |
|
} B |
|
} | SSCIR [8] |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:4 |
|
uint8_t PRI:4 |
|
} B |
|
} | PSR [358] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:18 |
|
uint32_t VTES_PRC1:1 |
|
uint32_t __pad1__:4 |
|
uint32_t HVEN_PRC1:1 |
|
uint32_t __pad2__:2 |
|
uint32_t VTES:1 |
|
uint32_t __pad3__:4 |
|
uint32_t HVEN:1 |
|
} B |
|
} | MCR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR_PRC1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA:21 |
|
uint32_t INTVEC:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA_PRC1:21 |
|
uint32_t INTVEC_PRC1:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR_PRC1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:32 |
|
} B |
|
} | EOIR_PRC1 |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:6 |
|
uint8_t SET:1 |
|
uint8_t CLR:1 |
|
} B |
|
} | SSCIR [8] |
|
union { |
uint8_t R |
|
struct { |
uint8_t PRC_SEL:2 |
|
uint8_t __pad0__:2 |
|
uint8_t PRI:4 |
|
} B |
|
} | PSR [316] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:26 |
|
uint32_t VTES:1 |
|
uint32_t __pad1__:4 |
|
uint32_t HVEN:1 |
|
} B |
|
} | MCR |
|
uint32_t | INTC_reserved0004 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:28 |
|
uint32_t PRI:4 |
|
} B |
|
} | CPR |
|
uint32_t | INTC_reserved000C |
|
union { |
uint32_t R |
|
struct { |
uint32_t VTBA:21 |
|
uint32_t INTVEC:9 |
|
uint32_t __pad0__:2 |
|
} B |
|
} | IACKR |
|
uint32_t | INTC_reserved0014 |
|
union { |
uint32_t R |
|
struct { |
uint32_t EOIR:32 |
|
} B |
|
} | EOIR |
|
uint32_t | INTC_reserved001C |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:6 |
|
uint8_t SET:1 |
|
uint8_t CLR:1 |
|
} B |
|
} | SSCIR [8] |
|
uint32_t | INTC_reserved0028 [6] |
|
union { |
uint8_t R |
|
struct { |
uint8_t __pad0__:4 |
|
uint8_t PRI:4 |
|
} B |
|
} | PSR [480] |
|
uint16_t | INTC_reserved0220 [7920] |
|
The documentation for this struct was generated from the following files: