RTEMS
5.0.0
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NXP MPC55XX and MPC56XX Board Support Package. More...
Modules | |
Configuration files | |
Deserial Serial Peripheral Interface (DSPI) | |
Files | |
file | clock-config.c |
Clock driver configuration. | |
file | irq.h |
IRQ. | |
file | mpc55xx-config.h |
Low-level configuration. | |
file | smsc9218i.h |
SMSC - LAN9218i. | |
file | bsp.h |
Global BSP definitions. | |
file | edma.h |
Enhanced Direct Memory Access (eDMA). | |
file | emios.h |
Enhanced Modular Input Output Subsystem (eMIOS). | |
file | mpc55xx.h |
Documentation for this file. | |
file | reg-defs.h |
Register definitions. | |
file | regs-edma.h |
file | regs-mmu.h |
file | regs.h |
Register definitions for the MPC55xx and MPC56xx microcontroller family. | |
file | siu.h |
System Integration Unit Access (SIU). | |
file | watchdog.h |
Header file for the watchdog timer. | |
file | smsc9218i.c |
SMSC - LAN9218i. | |
file | bspgetworkarea.c |
file | bspreset.c |
BSP reset. | |
file | bspstart.c |
BSP startup code. | |
file | edma.c |
Enhanced Direct Memory Access (eDMA). | |
file | emios.c |
Enhanced Modular Input Output Subsystem (eMIOS). | |
file | flash_support.c |
MPC55XX flash memory support. | |
file | get-system-clock.c |
System clock calculation. | |
file | idle-thread.c |
bsp_idle_thread() implementation. | |
file | irq.c |
Source file for MPC55XX interrupt support. | |
file | sd-card-init.c |
SD Card initialization code. | |
file | siu.c |
System Integration Unit Access (SIU). | |
file | start-clock.c |
Clock and FMPLL initialization code. | |
file | start-config-clock.c |
Clock and FMPLL configuration. | |
file | start-config-ebi-cs-cal.c |
EBI calibration chip-select configuration. | |
file | start-config-ebi-cs.c |
EBI chip-select configuration. | |
file | start-config-ebi.c |
EBI configuration. | |
file | start-config-mmu-early.c |
MMU early configuration. | |
file | start-config-mmu.c |
MMU configuration. | |
file | start-config-siu-pcr.c |
SIU PCR configuration. | |
file | start-early.c |
Early initialization code. | |
file | start-prologue.c |
Start prologue. | |
file | start-watchdog.c |
Watchdog initialization code. | |
Macros | |
#define | BSP_FEATURE_IRQ_EXTENSION |
#define | MPC55XX_PERIPHERAL_CLOCK (MPC55XX_SYSTEM_CLOCK / MPC55XX_SYSTEM_CLOCK_DIVIDER) |
#define | BSP_Convert_decrementer(_value) (((unsigned long long) (_value)) / ((unsigned long long)bsp_clicks_per_usec)) |
Convert Decrementer ticks to microseconds. | |
#define | RTEMS_BSP_NETWORK_DRIVER_ATTACH smsc9218i_attach_detach |
#define | RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" |
#define | BSP_IDLE_TASK_BODY bsp_idle_thread |
#define | BSP_DSRAM_SECTION __attribute__((section(".bsp_dsram"))) |
#define | BSP_SYSRAM_SECTION __attribute__((section(".bsp_sysram"))) |
Functions | |
rtems_status_code | mpc55xx_sd_card_init (bool mount) |
int | smsc9218i_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching) |
rtems_status_code | bsp_register_i2c (void) |
void | bsp_restart (void *addr) |
void * | bsp_idle_thread (uintptr_t arg) |
Optimized idle task. More... | |
Variables | |
unsigned int | bsp_clock_speed |
System clock frequency. | |
uint32_t | bsp_clicks_per_usec |
Time base clicks per micro second. | |
NXP MPC55XX and MPC56XX Board Support Package.
void* bsp_idle_thread | ( | uintptr_t | ignored | ) |
Optimized idle task.
This BSP provides its own IDLE thread to override the RTEMS one.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
This BSP provides its own IDLE thread to override the RTEMS one.
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.
This BSP provides its own IDLE thread to override the RTEMS one.
This idle task sets the power mode to idle. This causes the processor clock to be stopped, while on-chip peripherals remain active. Any enabled interrupt from a peripheral or an external interrupt source will cause the processor to resume execution.
To enable the idle task use the following in the system configuration:
Optimized idle task.
The MSR[POW] bit is set to put the CPU into the low power mode defined in HID0. HID0 is set during starup in start.S.