Enhanced Direct Memory Access (eDMA). More...

#include <mpc55xx/regs.h>
#include <rtems.h>
#include <rtems/chain.h>

Data Structures
struct	edma_channel_context

Macros
#define	EDMA_CHANNEL_COUNT 64U

#define	EDMA_MODULE_COUNT ((EDMA_CHANNEL_COUNT + 63U) / 64U)

#define	EDMA_CHANNELS_PER_MODULE 64U

#define	EDMA_TCD_BY_CHANNEL_INDEX(channel_index) (&EDMA.TCD[(channel_index)])

Typedefs
typedef struct edma_channel_context	edma_channel_context

Enumerations
enum	edma_channel { EDMA_EQADC_A_FISR0_CFFF0 = 0, EDMA_EQADC_A_FISR0_RFDF0 = 1, EDMA_EQADC_A_FISR1_CFFF1 = 2, EDMA_EQADC_A_FISR1_RFDF1 = 3, EDMA_EQADC_A_FISR2_CFFF2 = 4, EDMA_EQADC_A_FISR2_RFDF2 = 5, EDMA_EQADC_A_FISR3_CFFF3 = 6, EDMA_EQADC_A_FISR3_RFDF3 = 7, EDMA_EQADC_A_FISR4_CFFF4 = 8, EDMA_EQADC_A_FISR4_RFDF4 = 9, EDMA_EQADC_A_FISR5_CFFF5 = 10, EDMA_EQADC_A_FISR5_RFDF5 = 11, EDMA_DSPI_B_SR_TFFF = 12, EDMA_DSPI_B_SR_RFDF = 13, EDMA_DSPI_C_SR_TFFF = 14, EDMA_DSPI_C_SR_RFDF = 15, EDMA_DSPI_D_SR_TFFF = 16, EDMA_DSPI_D_SR_RFDF = 17, EDMA_ESCI_A_COMBTX = 18, EDMA_ESCI_A_COMBRX = 19, EDMA_EMIOS_GFR_F0 = 20, EDMA_EMIOS_GFR_F1 = 21, EDMA_EMIOS_GFR_F2 = 22, EDMA_EMIOS_GFR_F3 = 23, EDMA_EMIOS_GFR_F4 = 24, EDMA_EMIOS_GFR_F8 = 25, EDMA_EMIOS_GFR_F9 = 26, EDMA_ETPU_CDTRSR_A_DTRS0 = 27, EDMA_ETPU_CDTRSR_A_DTRS1 = 28, EDMA_ETPU_CDTRSR_A_DTRS2 = 29, EDMA_ETPU_CDTRSR_A_DTRS14 = 30, EDMA_ETPU_CDTRSR_A_DTRS15 = 31, EDMA_DSPI_A_SR_TFFF = 32, EDMA_DSPI_A_SR_RFDF = 33, EDMA_ESCI_B_COMBTX = 34, EDMA_ESCI_B_COMBRX = 35, EDMA_EMIOS_GFR_F6 = 36, EDMA_EMIOS_GFR_F7 = 37, EDMA_EMIOS_GFR_F10 = 38, EDMA_EMIOS_GFR_F11 = 39, EDMA_EMIOS_GFR_F16 = 40, EDMA_EMIOS_GFR_F17 = 41, EDMA_EMIOS_GFR_F18 = 42, EDMA_EMIOS_GFR_F19 = 43, EDMA_ETPU_CDTRSR_A_DTRS12 = 44, EDMA_ETPU_CDTRSR_A_DTRS13 = 45, EDMA_ETPU_CDTRSR_A_DTRS28 = 46, EDMA_ETPU_CDTRSR_A_DTRS29 = 47, EDMA_SIU_EISR_EIF0 = 48, EDMA_SIU_EISR_EIF1 = 49, EDMA_SIU_EISR_EIF2 = 50, EDMA_SIU_EISR_EIF3 = 51, EDMA_ETPU_CDTRSR_B_DTRS0 = 52, EDMA_ETPU_CDTRSR_B_DTRS1 = 53, EDMA_ETPU_CDTRSR_B_DTRS2 = 54, EDMA_ETPU_CDTRSR_B_DTRS3 = 55, EDMA_ETPU_CDTRSR_B_DTRS12 = 56, EDMA_ETPU_CDTRSR_B_DTRS13 = 57, EDMA_ETPU_CDTRSR_B_DTRS14 = 58, EDMA_ETPU_CDTRSR_B_DTRS15 = 59, EDMA_ETPU_CDTRSR_B_DTRS28 = 60, EDMA_ETPU_CDTRSR_B_DTRS29 = 61, EDMA_ETPU_CDTRSR_B_DTRS30 = 62, EDMA_ETPU_CDTRSR_B_DTRS31 = 63 }

Functions
void	mpc55xx_edma_init (void)

rtems_status_code	mpc55xx_edma_obtain_channel_by_tcd (volatile struct tcd_t *edma_tcd)
	Obtains an eDMA channel. More...

void	mpc55xx_edma_release_channel_by_tcd (volatile struct tcd_t *edma_tcd)

rtems_status_code	mpc55xx_edma_obtain_channel (edma_channel_context *ctx, unsigned irq_priority)
	Obtains an eDMA channel and registers the channel context. More...

void	mpc55xx_edma_release_channel (edma_channel_context *ctx)

void	mpc55xx_edma_copy (volatile struct tcd_t edma_tcd, const struct tcd_t source_tcd)
	Copies a source TCD to an eDMA TCD. More...

void	mpc55xx_edma_copy_and_enable_hardware_requests (volatile struct tcd_t edma_tcd, const struct tcd_t source_tcd)
	Copies a source TCD to an eDMA TCD and enables hardware requests. More...

void	mpc55xx_edma_sg_link (volatile struct tcd_t edma_tcd, const struct tcd_t source_tcd)

Detailed Description

Enhanced Direct Memory Access (eDMA).

Function Documentation

◆ mpc55xx_edma_copy()

void mpc55xx_edma_copy	(	volatile struct tcd_t *	edma_tcd,
		const struct tcd_t *	source_tcd
	)

Copies a source TCD to an eDMA TCD.

The DONE flag of the eDMA TCD is cleared before the actual copy operation. This enables the setting of channel link or scatter/gather options.

This function can be used to start the channel if the START flags is set in the source TCD.

◆ mpc55xx_edma_copy_and_enable_hardware_requests()

void mpc55xx_edma_copy_and_enable_hardware_requests	(	volatile struct tcd_t *	edma_tcd,
		const struct tcd_t *	source_tcd
	)

Copies a source TCD to an eDMA TCD and enables hardware requests.

The DONE flag of the eDMA TCD is cleared before the actual copy operation. This enables the setting of channel link or scatter/gather options.

◆ mpc55xx_edma_obtain_channel()

rtems_status_code mpc55xx_edma_obtain_channel	(	edma_channel_context *	ctx,
		unsigned	irq_priority
	)

Obtains an eDMA channel and registers the channel context.

The done handler of the channel context will be called

during minor or major loop completions if interrupts are enabled in the corresponding TCD, or
in case a channel error occurs.

An error status value not equal to zero indicates an error.

Return values

RTEMS_SUCCESSFUL	Successful operation.
RTEMS_RESOURCE_IN_USE	The channel is already in use.
RTEMS_IO_ERROR	Unable to install interrupt handler for this channel.

◆ mpc55xx_edma_obtain_channel_by_tcd()

rtems_status_code mpc55xx_edma_obtain_channel_by_tcd ( volatile struct tcd_t * edma_tcd )

Obtains an eDMA channel.

Return values

RTEMS_SUCCESSFUL	Successful operation.
RTEMS_RESOURCE_IN_USE	The channel is already in use.

Data Structures

Macros

Typedefs