RTEMS  5.0.0
alt_clock_manager.h
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1 
12 /******************************************************************************
13 *
14 * Copyright 2013 Altera Corporation. All Rights Reserved.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are met:
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19 * 1. Redistributions of source code must retain the above copyright notice,
20 * this list of conditions and the following disclaimer.
21 *
22 * 2. Redistributions in binary form must reproduce the above copyright notice,
23 * this list of conditions and the following disclaimer in the documentation
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26 * 3. The name of the author may not be used to endorse or promote products
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29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR
30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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40 ******************************************************************************/
41 
42 #ifndef __ALT_CLK_MGR_H__
43 #define __ALT_CLK_MGR_H__
44 
45 #include "hwlib.h"
46 #include "alt_clock_group.h"
47 
48 #ifdef __cplusplus
49 extern "C"
50 {
51 #endif /* __cplusplus */
52 
61 /******************************************************************************/
66 typedef uint32_t alt_freq_t;
67 
68 /******************************************************************************/
73 typedef enum ALT_CLK_e
74 {
75  /* Clock Input Pins */
98  /* FPGA Clock Sources External to HPS */
99  ALT_CLK_F2H_PERIPH_REF,
100  /*<! Alternate clock source from FPGA
101  * for HPS Peripheral PLL. */
102 
103  ALT_CLK_F2H_SDRAM_REF,
104  /*<! Alternate clock source from FPGA
105  * for HPS SDRAM PLL. */
106 
107 
108  /* Other Clock Sources External to HPS */
142  /* PLLs */
165  /* OSC1 Clock Group - The OSC1 clock group contains those clocks which are derived
166  * directly from the osc_clk_1_HPS pin */
177  /* Main Clock Group - The following clocks are derived from the Main PLL. */
305  /* Peripherals Clock Group - The following clocks are derived from the Peripheral PLL */
396  /* SDRAM Clock Group - The following clocks are derived from the SDRAM PLL */
442  /* Clock Output Pins */
503  ALT_CLK_UNKNOWN
504 } ALT_CLK_t;
505 
506 /******************************************************************************/
514 /******************************************************************************/
521 {
522  ALT_MAIN_PLL_LOCK_ACHV = 0x00000001,
532  ALT_SDR_PLL_LOCK_ACHV = 0x00000004,
537  ALT_MAIN_PLL_LOCK_LOST = 0x00000008,
547  ALT_SDR_PLL_LOCK_LOST = 0x00000020
553 
554 /******************************************************************************/
574 
575 /******************************************************************************/
585 uint32_t alt_clk_lock_status_get(void);
586 
587 /******************************************************************************/
609 
612 /******************************************************************************/
650 /******************************************************************************/
656 {
668 
669 /******************************************************************************/
680 
681 /******************************************************************************/
691 bool alt_clk_is_in_safe_mode(ALT_CLK_SAFE_DOMAIN_t clk_domain);
692 
695 /******************************************************************************/
719 /******************************************************************************/
733 
734 /******************************************************************************/
754  bool use_input_mux);
755 
756 /******************************************************************************/
775 
778 /******************************************************************************/
823 /******************************************************************************/
837 
838 /******************************************************************************/
852 
853 /******************************************************************************/
865 ALT_STATUS_CODE alt_clk_is_enabled(ALT_CLK_t clk);
866 
869 /******************************************************************************/
916 /******************************************************************************/
933 ALT_CLK_t alt_clk_source_get(ALT_CLK_t clk);
934 
935 /******************************************************************************/
955 ALT_STATUS_CODE alt_clk_source_set(ALT_CLK_t clk,
956  ALT_CLK_t ref_clk);
957 
960 /******************************************************************************/
969 /******************************************************************************/
997  alt_freq_t freq);
998 
999 /******************************************************************************/
1017 alt_freq_t alt_clk_ext_clk_freq_get(ALT_CLK_t clk);
1018 
1019 /******************************************************************************/
1024 typedef struct ALT_CLK_PLL_CFG_s
1025 {
1026  ALT_CLK_t ref_clk;
1027  uint32_t mult;
1030  uint32_t div;
1033  uint32_t cntrs[6];
1036  uint32_t pshift[6];
1041 
1042 /******************************************************************************/
1056 ALT_STATUS_CODE alt_clk_pll_cfg_get(ALT_CLK_t pll,
1057  ALT_CLK_PLL_CFG_t* pll_cfg);
1058 
1059 /******************************************************************************/
1074 ALT_STATUS_CODE alt_clk_pll_cfg_set(ALT_CLK_t pll,
1075  const ALT_CLK_PLL_CFG_t* pll_cfg);
1076 
1077 /******************************************************************************/
1096  uint32_t* mult,
1097  uint32_t* div);
1098 
1099 /******************************************************************************/
1117  uint32_t mult,
1118  uint32_t div);
1119 
1120 /******************************************************************************/
1139  alt_freq_t* freq);
1140 
1141 /******************************************************************************/
1150 uint32_t alt_clk_pll_guard_band_get(ALT_CLK_t pll);
1151 
1152 /******************************************************************************/
1183  uint32_t guard_band);
1184 
1185 /******************************************************************************/
1208 ALT_STATUS_CODE alt_clk_divider_get(ALT_CLK_t clk,
1209  uint32_t* div);
1210 
1211 /******************************************************************************/
1236 ALT_STATUS_CODE alt_clk_divider_set(ALT_CLK_t clk,
1237  uint32_t div);
1238 
1239 /******************************************************************************/
1257 ALT_STATUS_CODE alt_clk_freq_get(ALT_CLK_t clk,
1258  alt_freq_t* freq);
1259 
1262 /******************************************************************************/
1307 /******************************************************************************/
1330 
1331 /******************************************************************************/
1354 
1357 /******************************************************************************/
1388 /******************************************************************************/
1408  ALT_CLK_GROUP_RAW_CFG_t* clk_group_raw_cfg);
1409 
1410 /******************************************************************************/
1430 
1431 ALT_STATUS_CODE alt_clk_clkmgr_init(void);
1432 
1436 #ifdef __cplusplus
1437 }
1438 
1439 #endif /* __cplusplus */
1440 #endif /* __ALT_CLK_MGR_H__ */
Definition: alt_clock_manager.h:167
Definition: alt_clock_manager.h:666
Definition: alt_clock_manager.h:190
ALT_STATUS_CODE alt_clk_group_cfg_raw_get(ALT_CLK_GRP_t clk_group, ALT_CLK_GROUP_RAW_CFG_t *clk_group_raw_cfg)
Definition: alt_clock_manager.c:4875
Definition: alt_clock_manager.h:406
Definition: alt_clock_manager.h:479
ALT_STATUS_CODE alt_clk_pll_vco_freq_get(ALT_CLK_t pll, alt_freq_t *freq)
Definition: alt_clock_manager.c:2477
Definition: alt_clock_manager.h:203
Definition: alt_clock_manager.h:135
enum ALT_CLK_SAFE_DOMAIN_e ALT_CLK_SAFE_DOMAIN_t
Definition: alt_clock_manager.h:193
ALT_STATUS_CODE alt_clk_group_cfg_raw_set(const ALT_CLK_GROUP_RAW_CFG_t *clk_group_raw_cfg)
Definition: alt_clock_manager.c:4999
ALT_CLK_t ref_clk
Definition: alt_clock_manager.h:1026
Definition: alt_clock_manager.h:318
Definition: alt_clock_manager.h:461
ALT_STATUS_CODE alt_clk_pll_cfg_get(ALT_CLK_t pll, ALT_CLK_PLL_CFG_t *pll_cfg)
Definition: alt_clock_manager.c:1789
Definition: alt_clock_manager.h:181
Definition: alt_clock_manager.h:661
Definition: alt_clock_manager.h:382
Definition: alt_clock_manager.h:497
ALT_STATUS_CODE alt_clk_irq_disable(ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask)
Definition: alt_clock_manager.c:4839
Definition: alt_clock_manager.h:76
Definition: alt_clock_manager.h:238
ALT_CLK_SAFE_DOMAIN_e
Definition: alt_clock_manager.h:655
Definition: alt_clock_manager.h:306
Definition: alt_clock_manager.h:231
ALT_STATUS_CODE alt_clk_safe_mode_clear(void)
Definition: alt_clock_manager.c:463
uint32_t div
Definition: alt_clock_manager.h:1030
ALT_STATUS_CODE alt_clk_divider_set(ALT_CLK_t clk, uint32_t div)
Definition: alt_clock_manager.c:3082
Definition: alt_clock_manager.h:429
Definition: alt_clock_manager.h:143
struct ALT_CLK_PLL_CFG_s ALT_CLK_PLL_CFG_t
Definition: alt_clock_manager.h:403
Definition: alt_clock_manager.h:537
Definition: alt_clock_manager.h:248
Definition: alt_clock_manager.h:547
Definition: alt_clock_manager.h:267
Definition: alt_clock_manager.h:363
ALT_STATUS_CODE alt_clk_pll_bypass_enable(ALT_CLK_t pll, bool use_input_mux)
Definition: alt_clock_manager.c:660
Definition: alt_clock_manager.h:435
Definition: alt_clock_manager.h:388
ALT_STATUS_CODE alt_clk_pll_vco_cfg_get(ALT_CLK_t pll, uint32_t *mult, uint32_t *div)
Definition: alt_clock_manager.c:2084
Definition: alt_clock_manager.h:309
Definition: alt_clock_manager.h:321
Definition: alt_clock_manager.h:329
Definition: alt_clock_manager.h:215
Definition: alt_clock_manager.h:522
Definition: alt_clock_manager.h:409
uint32_t mult
Definition: alt_clock_manager.h:1027
Definition: alt_clock_manager.h:115
ALT_STATUS_CODE alt_clk_lock_status_clear(ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask)
Definition: alt_clock_manager.c:392
Definition: alt_clock_manager.h:294
ALT_STATUS_CODE alt_clk_pll_guard_band_set(ALT_CLK_t pll, uint32_t guard_band)
Definition: alt_clock_manager.c:2620
enum ALT_CLK_GRP_e ALT_CLK_GRP_t
Definition: alt_clock_manager.h:1024
Definition: alt_clock_manager.h:356
uint32_t alt_freq_t
Definition: alt_clock_manager.h:66
Definition: alt_clock_manager.h:221
Definition: alt_clock_manager.h:315
ALT_STATUS_CODE alt_clk_pll_bypass_disable(ALT_CLK_t pll)
Definition: alt_clock_manager.c:530
Definition: alt_clock_manager.h:280
Definition: alt_clock_manager.h:187
Definition: alt_clock_manager.h:109
ALT_STATUS_CODE alt_clk_pll_is_locked(ALT_CLK_t pll)
Definition: alt_clock_manager.c:435
Definition: alt_clock_manager.h:376
Definition: alt_clock_manager.h:129
Definition: alt_clock_manager.h:345
ALT_STATUS_CODE alt_clk_clock_enable(ALT_CLK_t clk)
Definition: alt_clock_manager.c:972
Definition: alt_clock_manager.h:491
Definition: alt_clock_manager.h:339
Definition: alt_clock_manager.h:226
Definition: alt_clock_manager.h:532
ALT_CLK_PLL_LOCK_STATUS_e
Definition: alt_clock_manager.h:520
Definition: alt_clock_manager.h:312
ALT_STATUS_CODE alt_clk_clock_disable(ALT_CLK_t clk)
Definition: alt_clock_manager.c:859
Definition: alt_clock_manager.h:324
ALT_STATUS_CODE alt_clk_ext_clk_freq_set(ALT_CLK_t clk, alt_freq_t freq)
Definition: alt_clock_manager.c:1697
uint32_t cntrs[6]
Definition: alt_clock_manager.h:1033
Definition: alt_clock_manager.h:485
alt_freq_t alt_clk_ext_clk_freq_get(ALT_CLK_t clk)
Definition: alt_clock_manager.c:1762
Definition: alt_clock_manager.h:254
uint32_t alt_clk_pll_guard_band_get(ALT_CLK_t pll)
Definition: alt_clock_manager.c:2596
Definition: alt_clock_manager.h:334
Definition: alt_clock_manager.h:443
ALT_STATUS_CODE alt_clk_source_set(ALT_CLK_t clk, ALT_CLK_t ref_clk)
Definition: alt_clock_manager.c:1514
Definition: alt_clock_manager.h:273
Definition: alt_clock_manager.h:412
Definition: alt_clock_manager.h:397
Definition: alt_clock_manager.h:208
Definition: alt_clock_manager.h:287
bool alt_clk_is_in_safe_mode(ALT_CLK_SAFE_DOMAIN_t clk_domain)
Definition: alt_clock_manager.c:497
Definition: alt_clock_manager.h:423
Definition: alt_clock_manager.h:527
Definition: alt_clock_group.h:72
Definition: alt_clock_manager.h:196
Definition: alt_clock_manager.h:178
ALT_STATUS_CODE alt_clk_pll_cfg_set(ALT_CLK_t pll, const ALT_CLK_PLL_CFG_t *pll_cfg)
Definition: alt_clock_manager.c:1931
ALT_STATUS_CODE alt_clk_irq_enable(ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask)
Definition: alt_clock_manager.c:4856
Definition: alt_clock_manager.h:455
Definition: alt_clock_manager.h:122
int32_t ALT_STATUS_CODE
Definition: hwlib.h:60
Definition: alt_clock_manager.h:150
Definition: alt_clock_manager.h:370
Definition: alt_clock_manager.h:261
ALT_STATUS_CODE alt_clk_freq_get(ALT_CLK_t clk, alt_freq_t *freq)
Definition: alt_clock_manager.c:4154
Definition: alt_clock_manager.h:467
Definition: alt_clock_manager.h:473
ALT_CLK_t alt_clk_source_get(ALT_CLK_t clk)
Definition: alt_clock_manager.c:1253
Definition: alt_clock_manager.h:542
Definition: alt_clock_manager.h:351
Definition: alt_clock_manager.h:243
Definition: alt_clock_manager.h:158
ALT_STATUS_CODE alt_clk_pll_is_bypassed(ALT_CLK_t pll)
Definition: alt_clock_manager.c:778
Definition: alt_clock_manager.h:184
ALT_STATUS_CODE alt_clk_is_enabled(ALT_CLK_t clk)
Definition: alt_clock_manager.c:1087
uint32_t alt_clk_lock_status_get(void)
Definition: alt_clock_manager.c:416
ALT_STATUS_CODE alt_clk_pll_vco_cfg_set(ALT_CLK_t pll, uint32_t mult, uint32_t div)
Definition: alt_clock_manager.c:2354
Definition: alt_clock_manager.h:87
Definition: alt_clock_manager.h:449
ALT_CLK_e
Definition: alt_clock_manager.h:73
uint32_t pshift[6]
Definition: alt_clock_manager.h:1036
Definition: alt_clock_manager.h:400
ALT_STATUS_CODE alt_clk_divider_get(ALT_CLK_t clk, uint32_t *div)
Definition: alt_clock_manager.c:2658
Definition: alt_clock_manager.h:415
enum ALT_CLK_e ALT_CLK_t
Definition: alt_clock_manager.h:299
enum ALT_CLK_PLL_LOCK_STATUS_e ALT_CLK_PLL_LOCK_STATUS_t