FMC NORSRAM Timing parameters structure definition. More...

#include <stm32h7xx_ll_fmc.h>

Data Fields
uint32_t	AddressSetupTime

uint32_t	AddressHoldTime

uint32_t	DataSetupTime

uint32_t	BusTurnAroundDuration

uint32_t	CLKDivision

uint32_t	DataLatency

uint32_t	AccessMode

Detailed Description

FMC NORSRAM Timing parameters structure definition.

Field Documentation

◆ AccessMode

uint32_t FMC_NORSRAM_TimingTypeDef::AccessMode

Specifies the asynchronous access mode. This parameter can be a value of FMC Access Mode

◆ AddressHoldTime

uint32_t FMC_NORSRAM_TimingTypeDef::AddressHoldTime

Defines the number of HCLK cycles to configure the duration of the address hold time. This parameter can be a value between Min_Data = 1 and Max_Data = 15.

Note: This parameter is not used with synchronous NOR Flash memories.

◆ AddressSetupTime

uint32_t FMC_NORSRAM_TimingTypeDef::AddressSetupTime

Defines the number of HCLK cycles to configure the duration of the address setup time. This parameter can be a value between Min_Data = 0 and Max_Data = 15.

Note: This parameter is not used with synchronous NOR Flash memories.

◆ BusTurnAroundDuration

uint32_t FMC_NORSRAM_TimingTypeDef::BusTurnAroundDuration

Defines the number of HCLK cycles to configure the duration of the bus turnaround. This parameter can be a value between Min_Data = 0 and Max_Data = 15.

Note: This parameter is only used for multiplexed NOR Flash memories.

◆ CLKDivision

uint32_t FMC_NORSRAM_TimingTypeDef::CLKDivision

Defines the period of CLK clock output signal, expressed in number of HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.

Note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses.

◆ DataLatency

uint32_t FMC_NORSRAM_TimingTypeDef::DataLatency

Defines the number of memory clock cycles to issue to the memory before getting the first data. The parameter value depends on the memory type as shown below:

It must be set to 0 in case of a CRAM
It is don't care in asynchronous NOR, SRAM or ROM accesses
It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories with synchronous burst mode enable

◆ DataSetupTime

uint32_t FMC_NORSRAM_TimingTypeDef::DataSetupTime

Defines the number of HCLK cycles to configure the duration of the data setup time. This parameter can be a value between Min_Data = 1 and Max_Data = 255.

Note: This parameter is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories.

The documentation for this struct was generated from the following file:

bsps/arm/stm32h7/include/stm32h7xx_ll_fmc.h

Data Fields