![]() |
RTEMS 6.1
|
Modules | |
| SNVS Register Masks | |
Data Structures | |
| struct | SNVS_Type |
Macros | |
| #define | SNVS_BASE (0x400D4000u) |
| #define | SNVS ((SNVS_Type *)SNVS_BASE) |
| #define | SNVS_BASE_ADDRS { SNVS_BASE } |
| #define | SNVS_BASE_PTRS { SNVS } |
| #define | SNVS_IRQS { SNVS_LP_WRAPPER_IRQn } |
| #define | SNVS_CONSOLIDATED_IRQS { SNVS_HP_WRAPPER_IRQn } |
| #define | SNVS_SECURITY_IRQS { SNVS_HP_WRAPPER_TZ_IRQn } |
| #define | SNVS_BASE (0x40C90000u) |
| #define | SNVS ((SNVS_Type *)SNVS_BASE) |
| #define | SNVS_BASE_ADDRS { SNVS_BASE } |
| #define | SNVS_BASE_PTRS { SNVS } |
| #define | SNVS_IRQS { SNVS_PULSE_EVENT_IRQn } |
| #define | SNVS_CONSOLIDATED_IRQS { SNVS_HP_NON_TZ_IRQn } |
| #define | SNVS_SECURITY_IRQS { SNVS_HP_TZ_IRQn } |
| #define | SNVS_BASE (0x40C90000u) |
| #define | SNVS ((SNVS_Type *)SNVS_BASE) |
| #define | SNVS_BASE_ADDRS { SNVS_BASE } |
| #define | SNVS_BASE_PTRS { SNVS } |
| #define | SNVS_IRQS { SNVS_PULSE_EVENT_IRQn } |
| #define | SNVS_CONSOLIDATED_IRQS { SNVS_HP_NON_TZ_IRQn } |
| #define | SNVS_SECURITY_IRQS { SNVS_HP_TZ_IRQn } |
| #define SNVS_BASE (0x400D4000u) |
Peripheral SNVS base address
| #define SNVS_BASE (0x40C90000u) |
Peripheral SNVS base address
| #define SNVS_BASE (0x40C90000u) |
Peripheral SNVS base address
| #define SNVS_BASE_ADDRS { SNVS_BASE } |
Array initializer of SNVS peripheral base addresses
| #define SNVS_BASE_ADDRS { SNVS_BASE } |
Array initializer of SNVS peripheral base addresses
| #define SNVS_BASE_ADDRS { SNVS_BASE } |
Array initializer of SNVS peripheral base addresses
| #define SNVS_BASE_PTRS { SNVS } |
Array initializer of SNVS peripheral base pointers
| #define SNVS_BASE_PTRS { SNVS } |
Array initializer of SNVS peripheral base pointers
| #define SNVS_BASE_PTRS { SNVS } |
Array initializer of SNVS peripheral base pointers
| #define SNVS_IRQS { SNVS_LP_WRAPPER_IRQn } |
Interrupt vectors for the SNVS peripheral type
| #define SNVS_IRQS { SNVS_PULSE_EVENT_IRQn } |
Interrupt vectors for the SNVS peripheral type
| #define SNVS_IRQS { SNVS_PULSE_EVENT_IRQn } |
Interrupt vectors for the SNVS peripheral type