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RTEMS 6.1
|
Modules | |
| RTWDOG Register Masks | |
Data Structures | |
| struct | RTWDOG_Type |
Macros | |
| #define | RTWDOG_BASE (0x400BC000u) |
| #define | RTWDOG ((RTWDOG_Type *)RTWDOG_BASE) |
| #define | RTWDOG_BASE_ADDRS { RTWDOG_BASE } |
| #define | RTWDOG_BASE_PTRS { RTWDOG } |
| #define | RTWDOG_IRQS { RTWDOG_IRQn } |
| #define | RTWDOG_UPDATE_KEY (0xD928C520U) |
| #define | RTWDOG_REFRESH_KEY (0xB480A602U) |
| #define | RTWDOG3_BASE (0x40038000u) |
| #define | RTWDOG3 ((RTWDOG_Type *)RTWDOG3_BASE) |
| #define | RTWDOG4_BASE (0x40C10000u) |
| #define | RTWDOG4 ((RTWDOG_Type *)RTWDOG4_BASE) |
| #define | RTWDOG_BASE_ADDRS { 0u, 0u, 0u, RTWDOG3_BASE, RTWDOG4_BASE } |
| #define | RTWDOG_BASE_PTRS { (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, RTWDOG3, RTWDOG4 } |
| #define | RTWDOG_IRQS { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, RTWDOG4_IRQn } |
| #define | RTWDOG_UPDATE_KEY (0xD928C520U) |
| #define | RTWDOG_REFRESH_KEY (0xB480A602U) |
| #define | RTWDOG3_BASE (0x40038000u) |
| #define | RTWDOG3 ((RTWDOG_Type *)RTWDOG3_BASE) |
| #define | RTWDOG4_BASE (0x40C10000u) |
| #define | RTWDOG4 ((RTWDOG_Type *)RTWDOG4_BASE) |
| #define | RTWDOG_BASE_ADDRS { 0u, 0u, 0u, RTWDOG3_BASE, RTWDOG4_BASE } |
| #define | RTWDOG_BASE_PTRS { (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, RTWDOG3, RTWDOG4 } |
| #define | RTWDOG_IRQS { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, RTWDOG3_IRQn, NotAvail_IRQn } |
| #define | RTWDOG_UPDATE_KEY (0xD928C520U) |
| #define | RTWDOG_REFRESH_KEY (0xB480A602U) |
| #define RTWDOG ((RTWDOG_Type *)RTWDOG_BASE) |
Peripheral RTWDOG base pointer
| #define RTWDOG3 ((RTWDOG_Type *)RTWDOG3_BASE) |
Peripheral RTWDOG3 base pointer
| #define RTWDOG3 ((RTWDOG_Type *)RTWDOG3_BASE) |
Peripheral RTWDOG3 base pointer
| #define RTWDOG3_BASE (0x40038000u) |
Peripheral RTWDOG3 base address
| #define RTWDOG3_BASE (0x40038000u) |
Peripheral RTWDOG3 base address
| #define RTWDOG4 ((RTWDOG_Type *)RTWDOG4_BASE) |
Peripheral RTWDOG4 base pointer
| #define RTWDOG4 ((RTWDOG_Type *)RTWDOG4_BASE) |
Peripheral RTWDOG4 base pointer
| #define RTWDOG4_BASE (0x40C10000u) |
Peripheral RTWDOG4 base address
| #define RTWDOG4_BASE (0x40C10000u) |
Peripheral RTWDOG4 base address
| #define RTWDOG_BASE (0x400BC000u) |
Peripheral RTWDOG base address
| #define RTWDOG_BASE_ADDRS { RTWDOG_BASE } |
Array initializer of RTWDOG peripheral base addresses
| #define RTWDOG_BASE_ADDRS { 0u, 0u, 0u, RTWDOG3_BASE, RTWDOG4_BASE } |
Array initializer of RTWDOG peripheral base addresses
| #define RTWDOG_BASE_ADDRS { 0u, 0u, 0u, RTWDOG3_BASE, RTWDOG4_BASE } |
Array initializer of RTWDOG peripheral base addresses
| #define RTWDOG_BASE_PTRS { RTWDOG } |
Array initializer of RTWDOG peripheral base pointers
| #define RTWDOG_BASE_PTRS { (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, RTWDOG3, RTWDOG4 } |
Array initializer of RTWDOG peripheral base pointers
| #define RTWDOG_BASE_PTRS { (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, (RTWDOG_Type *)0u, RTWDOG3, RTWDOG4 } |
Array initializer of RTWDOG peripheral base pointers
| #define RTWDOG_IRQS { RTWDOG_IRQn } |
Interrupt vectors for the RTWDOG peripheral type
| #define RTWDOG_IRQS { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, RTWDOG4_IRQn } |
Interrupt vectors for the RTWDOG peripheral type
| #define RTWDOG_IRQS { NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, RTWDOG3_IRQn, NotAvail_IRQn } |
Interrupt vectors for the RTWDOG peripheral type