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RTEMS 6.1
|
Modules | |
| ADC Register Masks | |
Data Structures | |
| struct | ADC_Type |
Macros | |
| #define | ADC1_BASE (0x400C4000u) |
| #define | ADC1 ((ADC_Type *)ADC1_BASE) |
| #define | ADC2_BASE (0x400C8000u) |
| #define | ADC2 ((ADC_Type *)ADC2_BASE) |
| #define | ADC_BASE_ADDRS { 0u, ADC1_BASE, ADC2_BASE } |
| #define | ADC_BASE_PTRS { (ADC_Type *)0u, ADC1, ADC2 } |
| #define | ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
| #define | LPADC1_BASE (0x40050000u) |
| #define | LPADC1 ((ADC_Type *)LPADC1_BASE) |
| #define | LPADC2_BASE (0x40054000u) |
| #define | LPADC2 ((ADC_Type *)LPADC2_BASE) |
| #define | ADC_BASE_ADDRS { 0u, LPADC1_BASE, LPADC2_BASE } |
| #define | ADC_BASE_PTRS { (ADC_Type *)0u, LPADC1, LPADC2 } |
| #define | ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
| #define | LPADC1_BASE (0x40050000u) |
| #define | LPADC1 ((ADC_Type *)LPADC1_BASE) |
| #define | LPADC2_BASE (0x40054000u) |
| #define | LPADC2 ((ADC_Type *)LPADC2_BASE) |
| #define | ADC_BASE_ADDRS { 0u, LPADC1_BASE, LPADC2_BASE } |
| #define | ADC_BASE_PTRS { (ADC_Type *)0u, LPADC1, LPADC2 } |
| #define | ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
| #define ADC1_BASE (0x400C4000u) |
Peripheral ADC1 base address
| #define ADC2_BASE (0x400C8000u) |
Peripheral ADC2 base address
Array initializer of ADC peripheral base addresses
| #define ADC_BASE_ADDRS { 0u, LPADC1_BASE, LPADC2_BASE } |
Array initializer of ADC peripheral base addresses
| #define ADC_BASE_ADDRS { 0u, LPADC1_BASE, LPADC2_BASE } |
Array initializer of ADC peripheral base addresses
Array initializer of ADC peripheral base pointers
Array initializer of ADC peripheral base pointers
Array initializer of ADC peripheral base pointers
| #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
Interrupt vectors for the ADC peripheral type
| #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
Interrupt vectors for the ADC peripheral type
| #define ADC_IRQS { NotAvail_IRQn, ADC1_IRQn, ADC2_IRQn } |
Interrupt vectors for the ADC peripheral type
| #define LPADC1 ((ADC_Type *)LPADC1_BASE) |
Peripheral LPADC1 base pointer
| #define LPADC1 ((ADC_Type *)LPADC1_BASE) |
Peripheral LPADC1 base pointer
| #define LPADC1_BASE (0x40050000u) |
Peripheral LPADC1 base address
| #define LPADC1_BASE (0x40050000u) |
Peripheral LPADC1 base address
| #define LPADC2 ((ADC_Type *)LPADC2_BASE) |
Peripheral LPADC2 base pointer
| #define LPADC2 ((ADC_Type *)LPADC2_BASE) |
Peripheral LPADC2 base pointer
| #define LPADC2_BASE (0x40054000u) |
Peripheral LPADC2 base address
| #define LPADC2_BASE (0x40054000u) |
Peripheral LPADC2 base address