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#define  | UINT12_MAX   (4096) | 
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#define  | ALT_ORIGINAL_GUARDBAND_VAL   20 | 
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#define  | ALT_GUARDBAND_LIMIT   20 | 
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#define  | ALT_CLK_PLL_MULT_MAX   4095 | 
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#define  | ALT_CLK_PLL_DIV_MAX   63 | 
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#define  | ALT_CLK_PLL_CNTR_MAX   511 | 
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#define  | ALT_CLK_PLL_RST_BIT_C0   0x00000001 | 
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#define  | ALT_CLK_PLL_RST_BIT_C1   0x00000002 | 
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#define  | ALT_CLK_PLL_RST_BIT_C2   0x00000004 | 
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#define  | ALT_CLK_PLL_RST_BIT_C3   0x00000008 | 
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#define  | ALT_CLK_PLL_RST_BIT_C4   0x00000010 | 
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#define  | ALT_CLK_PLL_RST_BIT_C5   0x00000020 | 
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| #define  | ALT_CLK_MGR_PLL_LOCK_BITS | 
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#define  | ALT_CLKMGR_ALTERA_OFST   0xe0 | 
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#define  | ALT_CLKMGR_ALTERA_MPUCLK_OFST   0x0 | 
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#define  | ALT_CLKMGR_ALTERA_MAINCLK_OFST   0x4 | 
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#define  | ALT_CLKMGR_ALTERA_DBGATCLK_OFST   0x8 | 
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#define  | ALT_CLKMGR_ALTERA_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ADDR) + ALT_CLKMGR_ALTERA_OFST)) | 
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#define  | ALT_CLKMGR_ALTERA_MPUCLK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_ALTERA_MPUCLK_OFST)) | 
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#define  | ALT_CLKMGR_ALTERA_MAINCLK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_ALTERA_MAINCLK_OFST)) | 
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#define  | ALT_CLKMGR_ALTERA_DBGATCLK_ADDR   ALT_CAST(void *, (ALT_CAST(char *, ALT_CLKMGR_ALTERA_ADDR) + ALT_CLKMGR_ALTERA_DBGATCLK_OFST)) | 
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#define  | ALT_CLKMGR_ALTERA_MPUCLK_CNT_GET(value)   (((value) & 0x000001ff) >> 0) | 
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#define  | ALT_CLKMGR_ALTERA_MAINCLK_CNT_GET(value)   (((value) & 0x000001ff) >> 0) | 
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#define  | ALT_CLKMGR_ALTERA_DBGATCLK_CNT_GET(value)   (((value) & 0x000001ff) >> 0) | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_CTRDIV   30      /* 30 or more MPU clock cycles */ | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_HWCTRDIV   40 | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_BYPASS   30 | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_SAFEREQ   30 | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_SAFEEXIT   30 | 
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#define  | ALT_SW_MANAGED_CLK_WAIT_NANDCLK   8       /* 8 or more MPU clock cycles */ | 
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#define  | ALT_BYPASS_TIMEOUT_CNT   50 | 
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#define  | ALT_TIMEOUT_PHASE_SYNC   300 | 
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| #define  | alt_within_delta(ref,  neu,  prcnt) | 
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#define  | ALT_PREVENT_GLITCH_BYP   true | 
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#define  | ALT_PREVENT_GLITCH_EXSAFE   true | 
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#define  | ALT_PREVENT_GLITCH_CNTRRST   true | 
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#define  | ALT_PREVENT_GLITCH_CHGC1   true | 
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#define  | ALT_CLK_PLL_VCO_CHG_METHOD_TEST_MODE   false | 
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#define  | ALT_CLK_WITHIN_FREQ_LIMITS_TEST_MODE   false | 
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ALT_STATUS_CODE  | alt_clk_plls_settle_wait (void) | 
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| ALT_STATUS_CODE  | alt_clk_lock_status_clear (ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask) | 
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| uint32_t  | alt_clk_lock_status_get (void) | 
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| ALT_STATUS_CODE  | alt_clk_pll_is_locked (ALT_CLK_t pll) | 
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| ALT_STATUS_CODE  | alt_clk_safe_mode_clear (void) | 
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| bool  | alt_clk_is_in_safe_mode (ALT_CLK_SAFE_DOMAIN_t clk_domain) | 
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| ALT_STATUS_CODE  | alt_clk_pll_bypass_disable (ALT_CLK_t pll) | 
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| ALT_STATUS_CODE  | alt_clk_pll_bypass_enable (ALT_CLK_t pll, bool use_input_mux) | 
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| ALT_STATUS_CODE  | alt_clk_pll_is_bypassed (ALT_CLK_t pll) | 
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ALT_CLK_t  | alt_clk_pll_source_get (ALT_CLK_t pll) | 
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| ALT_STATUS_CODE  | alt_clk_clock_disable (ALT_CLK_t clk) | 
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| ALT_STATUS_CODE  | alt_clk_clock_enable (ALT_CLK_t clk) | 
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| ALT_STATUS_CODE  | alt_clk_is_enabled (ALT_CLK_t clk) | 
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| ALT_CLK_t  | alt_clk_source_get (ALT_CLK_t clk) | 
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| ALT_STATUS_CODE  | alt_clk_source_set (ALT_CLK_t clk, ALT_CLK_t ref_clk) | 
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| ALT_STATUS_CODE  | alt_clk_ext_clk_freq_set (ALT_CLK_t clk, alt_freq_t freq) | 
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| alt_freq_t  | alt_clk_ext_clk_freq_get (ALT_CLK_t clk) | 
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| ALT_STATUS_CODE  | alt_clk_pll_cfg_get (ALT_CLK_t pll, ALT_CLK_PLL_CFG_t *pll_cfg) | 
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| ALT_STATUS_CODE  | alt_clk_pll_cfg_set (ALT_CLK_t pll, const ALT_CLK_PLL_CFG_t *pll_cfg) | 
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| ALT_STATUS_CODE  | alt_clk_pll_vco_cfg_get (ALT_CLK_t pll, uint32_t *mult, uint32_t *div) | 
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| ALT_STATUS_CODE  | alt_clk_pll_vco_cfg_set (ALT_CLK_t pll, uint32_t mult, uint32_t div) | 
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| ALT_STATUS_CODE  | alt_clk_pll_vco_freq_get (ALT_CLK_t pll, alt_freq_t *freq) | 
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| uint32_t  | alt_clk_pll_guard_band_get (ALT_CLK_t pll) | 
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| ALT_STATUS_CODE  | alt_clk_pll_guard_band_set (ALT_CLK_t pll, uint32_t guard_band) | 
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| ALT_STATUS_CODE  | alt_clk_divider_get (ALT_CLK_t clk, uint32_t *div) | 
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| ALT_STATUS_CODE  | alt_clk_divider_set (ALT_CLK_t clk, uint32_t div) | 
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| ALT_STATUS_CODE  | alt_clk_freq_get (ALT_CLK_t clk, alt_freq_t *freq) | 
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| ALT_STATUS_CODE  | alt_clk_irq_disable (ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask) | 
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| ALT_STATUS_CODE  | alt_clk_irq_enable (ALT_CLK_PLL_LOCK_STATUS_t lock_stat_mask) | 
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| ALT_STATUS_CODE  | alt_clk_group_cfg_raw_get (ALT_CLK_GRP_t clk_group, ALT_CLK_GROUP_RAW_CFG_t *clk_group_raw_cfg) | 
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| ALT_STATUS_CODE  | alt_clk_group_cfg_raw_set (const ALT_CLK_GROUP_RAW_CFG_t *clk_group_raw_cfg) | 
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ALT_STATUS_CODE  | alt_clk_id_to_string (ALT_CLK_t clk_id, char *output, size_t size) | 
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ALT_STATUS_CODE  | alt_clk_pll_cntr_maxfreq_recalc (ALT_CLK_t clk, ALT_PLL_CNTR_FREQMAX_t *maxfreq) | 
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ALT_STATUS_CODE  | alt_clk_clkmgr_init (void) | 
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