RTEMS CPU Kit with SuperCore
4.11.3
Main Page
Related Pages
Modules
+
Data Structures
Data Structures
+
Data Fields
+
All
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
y
+
Variables
a
b
c
d
e
f
g
h
i
j
k
l
m
n
o
p
q
r
s
t
u
v
w
x
y
+
Files
File List
+
Globals
+
All
_
a
b
c
d
e
f
g
h
i
j
l
m
n
o
p
q
r
s
t
u
v
w
x
+
Functions
_
a
b
c
d
e
f
g
i
j
l
m
n
o
p
q
r
s
t
u
v
w
+
Variables
_
b
c
d
i
r
+
Typedefs
a
b
c
d
f
h
i
m
o
p
q
r
s
t
u
w
x
+
Enumerations
b
c
d
e
h
i
m
o
p
r
s
t
w
+
Enumerator
c
i
m
p
r
s
t
w
+
Macros
_
a
b
c
d
e
f
g
h
i
l
m
n
o
p
r
s
t
w
mnt
data0
chrisj
rtems
releases
rtems-release.git
4.11.3
ws-rtems
rtems-4.11.3
cpukit
score
cpu
avr
avr
interrupt.h
Go to the documentation of this file.
1
/* Copyright (c) 2002,2005,2007 Marek Michalkiewicz
2
Copyright (c) 2007, Dean Camera
3
4
All rights reserved.
5
6
Redistribution and use in source and binary forms, with or without
7
modification, are permitted provided that the following conditions are met:
8
9
* Redistributions of source code must retain the above copyright
10
notice, this list of conditions and the following disclaimer.
11
12
* Redistributions in binary form must reproduce the above copyright
13
notice, this list of conditions and the following disclaimer in
14
the documentation and/or other materials provided with the
15
distribution.
16
17
* Neither the name of the copyright holders nor the names of
18
contributors may be used to endorse or promote products derived
19
from this software without specific prior written permission.
20
21
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31
POSSIBILITY OF SUCH DAMAGE. */
32
33
34
#ifndef _AVR_INTERRUPT_H_
35
#define _AVR_INTERRUPT_H_
36
37
#include <
avr/io.h
>
38
39
#if !defined(__DOXYGEN__) && !defined(__STRINGIFY)
40
/* Auxiliary macro for ISR_ALIAS(). */
41
#define __STRINGIFY(x) #x
42
#endif
/* !defined(__DOXYGEN__) */
43
56
#if defined(__DOXYGEN__)
57
65
#define sei()
66
#else
/* !DOXYGEN */
67
# define sei() __asm__ __volatile__ ("sei" ::)
68
#endif
/* DOXYGEN */
69
70
#if defined(__DOXYGEN__)
71
79
#define cli()
80
#else
/* !DOXYGEN */
81
# define cli() __asm__ __volatile__ ("cli" ::)
82
#endif
/* DOXYGEN */
83
84
88
#if defined(__DOXYGEN__)
89
109
# define ISR(vector, [attributes])
110
#else
/* real code */
111
112
#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
113
# define __INTR_ATTRS used, externally_visible
114
#else
/* GCC < 4.1 */
115
# define __INTR_ATTRS used
116
#endif
117
118
#ifdef __cplusplus
119
# define ISR(vector, ...) \
120
extern "C" void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
121
void vector (void)
122
#else
123
# define ISR(vector, ...) \
124
void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
125
void vector (void)
126
#endif
127
128
#endif
/* DOXYGEN */
129
130
#if defined(__DOXYGEN__)
131
142
# define SIGNAL(vector)
143
#else
/* real code */
144
145
#ifdef __cplusplus
146
# define SIGNAL(vector) \
147
extern "C" void vector(void) __attribute__ ((signal, __INTR_ATTRS)); \
148
void vector (void)
149
#else
150
# define SIGNAL(vector) \
151
void vector (void) __attribute__ ((signal, __INTR_ATTRS)); \
152
void vector (void)
153
#endif
154
155
#endif
/* DOXYGEN */
156
157
#if defined(__DOXYGEN__)
158
168
# define EMPTY_INTERRUPT(vector)
169
#else
/* real code */
170
171
#ifdef __cplusplus
172
# define EMPTY_INTERRUPT(vector) \
173
extern "C" void vector(void) __attribute__ ((signal,naked,__INTR_ATTRS)); \
174
void vector (void) { __asm__ __volatile__ ("reti" ::); }
175
#else
176
# define EMPTY_INTERRUPT(vector) \
177
void vector (void) __attribute__ ((signal,naked,__INTR_ATTRS)); \
178
void vector (void) { __asm__ __volatile__ ("reti" ::); }
179
#endif
180
181
#endif
/* DOXYGEN */
182
183
#if defined(__DOXYGEN__)
184
213
# define ISR_ALIAS(vector, target_vector)
214
#else
/* real code */
215
216
#ifdef __cplusplus
217
# if defined(__AVR_MEGA__) && __AVR_MEGA__
218
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
219
__attribute__((signal, naked, __INTR_ATTRS)); \
220
void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
221
# else
/* !__AVR_MEGA */
222
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
223
__attribute__((signal, naked, __INTR_ATTRS)); \
224
void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
225
# endif
/* __AVR_MEGA__ */
226
#else
/* !__cplusplus */
227
# if defined(__AVR_MEGA__) && __AVR_MEGA__
228
# define ISR_ALIAS(vector, tgt) void vector (void) \
229
__attribute__((signal, naked, __INTR_ATTRS)); \
230
void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
231
# else
/* !__AVR_MEGA */
232
# define ISR_ALIAS(vector, tgt) void vector (void) \
233
__attribute__((signal, naked, __INTR_ATTRS)); \
234
void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
235
# endif
/* __AVR_MEGA__ */
236
#endif
/* __cplusplus */
237
238
#endif
/* DOXYGEN */
239
240
#if defined(__DOXYGEN__)
241
253
# define reti()
254
#else
/* !DOXYGEN */
255
# define reti() __asm__ __volatile__ ("reti" ::)
256
#endif
/* DOXYGEN */
257
258
#if defined(__DOXYGEN__)
259
269
# define BADISR_vect
270
#else
/* !DOXYGEN */
271
# define BADISR_vect __vector_default
272
#endif
/* DOXYGEN */
273
276
#if defined(__DOXYGEN__)
277
288
# define ISR_BLOCK
289
307
# define ISR_NOBLOCK
308
321
# define ISR_NAKED
322
333
# define ISR_ALIASOF(target_vector)
334
#else
/* !DOXYGEN */
335
# define ISR_BLOCK
336
# define ISR_NOBLOCK __attribute__((interrupt))
337
# define ISR_NAKED __attribute__((naked))
338
# define ISR_ALIASOF(v) __attribute__((alias(__STRINGIFY(v))))
339
#endif
/* DOXYGEN */
340
341
/* \@} */
342
343
#endif
io.h
AVR device-specific IO Definitions.
Generated by
1.8.13