RTEMS CPU Kit with SuperCore
4.11.2
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ISR Level Type. More...
Go to the source code of this file.
Macros | |
#define | _ISR_Disable(_level) |
Disables interrupts on this processor. More... | |
#define | _ISR_Enable(_level) |
Enables interrupts on this processor. More... | |
#define | _ISR_Flash(_level) |
Temporarily enables interrupts on this processor. More... | |
#define | _ISR_Get_level() _CPU_ISR_Get_level() |
Return current interrupt level. More... | |
#define | _ISR_Set_level(_new_level) |
Set current interrupt level. More... | |
#define | _ISR_Disable_without_giant(_level) |
#define | _ISR_Enable_without_giant(_level) |
Typedefs | |
typedef uint32_t | ISR_Level |
The following type defines the control block used to manage the interrupt level portion of the status register. | |
ISR Level Type.
This include file defines the ISR Level type. It exists to simplify include dependencies. It is part of the ISR Handler.