RTEMS CPU Kit with SuperCore  4.11.2
Files | Data Structures | Macros | Typedefs | Functions | Variables
RTEMS Per CPU Information

This defines the per CPU state information required by RTEMS and the BSP. More...

Collaboration diagram for RTEMS Per CPU Information:

Files

file  percpu.c
 Allocate and Initialize Per CPU Structures.
 

Data Structures

struct  Per_CPU_Stats
 Per-CPU statistics. More...
 
struct  Per_CPU_Control
 Per CPU Core Structure. More...
 
struct  Per_CPU_Control_envelope
 

Macros

#define _Per_CPU_Acquire(cpu)
 
#define _Per_CPU_Release(cpu)
 
#define _Per_CPU_ISR_disable_and_acquire(cpu, isr_cookie)
 
#define _Per_CPU_Release_and_ISR_enable(cpu, isr_cookie)
 
#define _Per_CPU_Acquire_all(isr_cookie)   _ISR_Disable( isr_cookie )
 
#define _Per_CPU_Release_all(isr_cookie)   _ISR_Enable( isr_cookie )
 
#define _Per_CPU_Get_snapshot()   ( &_Per_CPU_Information[ _SMP_Get_current_processor() ].per_cpu )
 
#define _Per_CPU_Get()   _Per_CPU_Get_snapshot()
 
#define _Thread_Dispatch_disable_level   _Per_CPU_Get()->thread_dispatch_disable_level
 
#define _Thread_Heir   _Per_CPU_Get()->heir
 
#define _Thread_Executing   _Per_CPU_Get()->executing
 
#define _ISR_Nest_level   _Per_CPU_Get()->isr_nest_level
 
#define _CPU_Interrupt_stack_low   _Per_CPU_Get()->interrupt_stack_low
 
#define _CPU_Interrupt_stack_high   _Per_CPU_Get()->interrupt_stack_high
 
#define _Thread_Dispatch_necessary   _Per_CPU_Get()->dispatch_necessary
 
#define _Thread_Time_of_last_context_switch   _Per_CPU_Get()->time_of_last_context_switch
 

Typedefs

typedef struct Per_CPU_Control Per_CPU_Control
 Per CPU Core Structure. More...
 

Functions

RTEMS_INLINE_ROUTINE struct Thread_Control_Thread_Get_executing (void)
 Returns the thread control block of the executing thread. More...
 

Variables

Per_CPU_Control_envelope _Per_CPU_Information [] CPU_STRUCTURE_ALIGNMENT
 Set of Per CPU Core Information. More...
 

Detailed Description

This defines the per CPU state information required by RTEMS and the BSP.

In an SMP configuration, there will be multiple instances of this data structure – one per CPU – and the current CPU number will be used as the index.

Macro Definition Documentation

◆ _Per_CPU_Acquire

#define _Per_CPU_Acquire (   cpu)
Value:
do { \
(void) ( cpu ); \
} while ( 0 )

◆ _Per_CPU_ISR_disable_and_acquire

#define _Per_CPU_ISR_disable_and_acquire (   cpu,
  isr_cookie 
)
Value:
do { \
_ISR_Disable( isr_cookie ); \
(void) ( cpu ); \
} while ( 0 )

◆ _Per_CPU_Release

#define _Per_CPU_Release (   cpu)
Value:
do { \
(void) ( cpu ); \
} while ( 0 )

◆ _Per_CPU_Release_and_ISR_enable

#define _Per_CPU_Release_and_ISR_enable (   cpu,
  isr_cookie 
)
Value:
do { \
(void) ( cpu ); \
_ISR_Enable( isr_cookie ); \
} while ( 0 )

Typedef Documentation

◆ Per_CPU_Control

Per CPU Core Structure.

This structure is used to hold per core state information.

Function Documentation

◆ _Thread_Get_executing()

RTEMS_INLINE_ROUTINE struct Thread_Control* _Thread_Get_executing ( void  )

Returns the thread control block of the executing thread.

This function can be called in any context. On SMP configurations interrupts are disabled to ensure that the processor index is used consistently.

Returns
The thread control block of the executing thread.

Referenced by _API_Mutex_Is_owner(), _MPCI_Receive_server(), _Objects_Id_to_name(), _RTEMS_Tasks_Invoke_task_variable_dtor(), _User_extensions_Iterate(), rtems_object_set_name(), rtems_rate_monotonic_create(), rtems_semaphore_create(), rtems_signal_catch(), rtems_stack_checker_is_blown(), rtems_task_get_note(), rtems_task_self(), and rtems_task_set_note().

Variable Documentation

◆ CPU_STRUCTURE_ALIGNMENT

Per_CPU_Control_envelope _Per_CPU_Information [] CPU_STRUCTURE_ALIGNMENT

Set of Per CPU Core Information.

This is an array of per CPU core information.

Set of Per CPU Core Information.

It is filled in by _CPU_Initialize and copied into the task's FP context area during _CPU_Context_Initialize.