RTEMS CPU Kit with SuperCore  4.11.2
cpustdatomic.h
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1 
7 /*
8  * COPYRIGHT (c) 2013 Deng Hengyi.
9  * Copyright (c) 2015 embedded brains GmbH.
10  *
11  * The license and distribution terms for this file may be
12  * found in the file LICENSE in this distribution or at
13  * http://www.rtems.org/license/LICENSE.
14  */
15 
16 #ifndef _RTEMS_SCORE_CPUSTDATOMIC_H
17 #define _RTEMS_SCORE_CPUSTDATOMIC_H
18 
19 #include <rtems/score/basedefs.h>
20 
21 #ifdef RTEMS_SMP
22  #if defined(__cplusplus) \
23  && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9))
24  /*
25  * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The
26  * suggested solution was to include <atomic> in case C++ is used. This works
27  * at least with GCC 4.9. See also:
28  *
29  * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932
30  * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940
31  */
32  #include <atomic>
33  #define _RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC
34  #else
35  #include <stdatomic.h>
36  #define _RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC
37  #endif
38 #else
39  #include <rtems/score/isrlevel.h>
40 #endif
41 
42 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
43 
44 typedef std::atomic_uint CPU_atomic_Uint;
45 
46 typedef std::atomic_ulong CPU_atomic_Ulong;
47 
48 typedef std::atomic_uintptr_t CPU_atomic_Pointer;
49 
50 typedef std::atomic_flag CPU_atomic_Flag;
51 
52 typedef std::memory_order CPU_atomic_Order;
53 
54 #define CPU_ATOMIC_ORDER_RELAXED std::memory_order_relaxed
55 
56 #define CPU_ATOMIC_ORDER_ACQUIRE std::memory_order_acquire
57 
58 #define CPU_ATOMIC_ORDER_RELEASE std::memory_order_release
59 
60 #define CPU_ATOMIC_ORDER_ACQ_REL std::memory_order_acq_rel
61 
62 #define CPU_ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst
63 
64 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
65 
66 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
67 
68 #define CPU_ATOMIC_INITIALIZER_PTR( value ) \
69  ATOMIC_VAR_INIT( (uintptr_t) (value) )
70 
71 #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
72 
73 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
74 
75 typedef atomic_uint CPU_atomic_Uint;
76 
77 typedef atomic_ulong CPU_atomic_Ulong;
78 
79 typedef atomic_uintptr_t CPU_atomic_Pointer;
80 
81 typedef atomic_flag CPU_atomic_Flag;
82 
83 typedef memory_order CPU_atomic_Order;
84 
85 #define CPU_ATOMIC_ORDER_RELAXED memory_order_relaxed
86 
87 #define CPU_ATOMIC_ORDER_ACQUIRE memory_order_acquire
88 
89 #define CPU_ATOMIC_ORDER_RELEASE memory_order_release
90 
91 #define CPU_ATOMIC_ORDER_ACQ_REL memory_order_acq_rel
92 
93 #define CPU_ATOMIC_ORDER_SEQ_CST memory_order_seq_cst
94 
95 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
96 
97 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
98 
99 #define CPU_ATOMIC_INITIALIZER_PTR( value ) \
100  ATOMIC_VAR_INIT( (uintptr_t) (value) )
101 
102 #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
103 
104 #else
105 
106 typedef unsigned int CPU_atomic_Uint;
107 
108 typedef unsigned long CPU_atomic_Ulong;
109 
110 typedef uintptr_t CPU_atomic_Pointer;
111 
112 typedef bool CPU_atomic_Flag;
113 
114 typedef int CPU_atomic_Order;
115 
116 #define CPU_ATOMIC_ORDER_RELAXED 0
117 
118 #define CPU_ATOMIC_ORDER_ACQUIRE 2
119 
120 #define CPU_ATOMIC_ORDER_RELEASE 3
121 
122 #define CPU_ATOMIC_ORDER_ACQ_REL 4
123 
124 #define CPU_ATOMIC_ORDER_SEQ_CST 5
125 
126 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ( value )
127 
128 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ( value )
129 
130 #define CPU_ATOMIC_INITIALIZER_PTR( value ) ( (uintptr_t) (value) )
131 
132 #define CPU_ATOMIC_INITIALIZER_FLAG false
133 
134 #endif
135 
136 static inline void _CPU_atomic_Fence( CPU_atomic_Order order )
137 {
138 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
139  std::atomic_thread_fence( order );
140 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
141  atomic_thread_fence( order );
142 #else
143  (void) order;
144  RTEMS_COMPILER_MEMORY_BARRIER();
145 #endif
146 }
147 
148 static inline void _CPU_atomic_Init_uint( CPU_atomic_Uint *obj, unsigned int desired )
149 {
150 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
151  obj->store( desired );
152 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
153  atomic_init( obj, desired );
154 #else
155  *obj = desired;
156 #endif
157 }
158 
159 static inline void _CPU_atomic_Init_ulong( CPU_atomic_Ulong *obj, unsigned long desired )
160 {
161 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
162  obj->store( desired );
163 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
164  atomic_init( obj, desired );
165 #else
166  *obj = desired;
167 #endif
168 }
169 
170 static inline void _CPU_atomic_Init_ptr( CPU_atomic_Pointer *obj, void *desired )
171 {
172 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
173  obj->store( (uintptr_t) desired );
174 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
175  atomic_init( obj, (uintptr_t) desired );
176 #else
177  *obj = (uintptr_t) desired;
178 #endif
179 }
180 
181 static inline unsigned int _CPU_atomic_Load_uint( const CPU_atomic_Uint *obj, CPU_atomic_Order order )
182 {
183 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
184  return obj->load( order );
185 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
186  return atomic_load_explicit( obj, order );
187 #else
188  unsigned int val;
189 
190  (void) order;
191  val = *obj;
192  RTEMS_COMPILER_MEMORY_BARRIER();
193 
194  return val;
195 #endif
196 }
197 
198 static inline unsigned long _CPU_atomic_Load_ulong( const CPU_atomic_Ulong *obj, CPU_atomic_Order order )
199 {
200 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
201  return obj->load( order );
202 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
203  return atomic_load_explicit( obj, order );
204 #else
205  unsigned long val;
206 
207  (void) order;
208  val = *obj;
209  RTEMS_COMPILER_MEMORY_BARRIER();
210 
211  return val;
212 #endif
213 }
214 
215 static inline void *_CPU_atomic_Load_ptr( const CPU_atomic_Pointer *obj, CPU_atomic_Order order )
216 {
217 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
218  return (void *) obj->load( order );
219 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
220  return (void *) atomic_load_explicit( obj, order );
221 #else
222  uintptr_t val;
223 
224  (void) order;
225  val = *obj;
226  RTEMS_COMPILER_MEMORY_BARRIER();
227 
228  return (void *) val;
229 #endif
230 }
231 
232 static inline void _CPU_atomic_Store_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
233 {
234 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
235  obj->store( desired );
236 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
237  atomic_store_explicit( obj, desired, order );
238 #else
239  (void) order;
240  RTEMS_COMPILER_MEMORY_BARRIER();
241  *obj = desired;
242 #endif
243 }
244 
245 static inline void _CPU_atomic_Store_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
246 {
247 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
248  obj->store( desired );
249 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
250  atomic_store_explicit( obj, desired, order );
251 #else
252  (void) order;
253  RTEMS_COMPILER_MEMORY_BARRIER();
254  *obj = desired;
255 #endif
256 }
257 
258 static inline void _CPU_atomic_Store_ptr( CPU_atomic_Pointer *obj, void *desired, CPU_atomic_Order order )
259 {
260 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
261  obj->store( (uintptr_t) desired );
262 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
263  atomic_store_explicit( obj, (uintptr_t) desired, order );
264 #else
265  (void) order;
266  RTEMS_COMPILER_MEMORY_BARRIER();
267  *obj = (uintptr_t) desired;
268 #endif
269 }
270 
271 static inline unsigned int _CPU_atomic_Fetch_add_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
272 {
273 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
274  return obj->fetch_add( arg, order );
275 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
276  return atomic_fetch_add_explicit( obj, arg, order );
277 #else
278  unsigned int val;
279  ISR_Level level;
280 
281  (void) order;
282  _ISR_Disable( level );
283  val = *obj;
284  *obj = val + arg;
285  _ISR_Enable( level );
286 
287  return val;
288 #endif
289 }
290 
291 static inline unsigned long _CPU_atomic_Fetch_add_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
292 {
293 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
294  return obj->fetch_add( arg, order );
295 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
296  return atomic_fetch_add_explicit( obj, arg, order );
297 #else
298  unsigned long val;
299  ISR_Level level;
300 
301  (void) order;
302  _ISR_Disable( level );
303  val = *obj;
304  *obj = val + arg;
305  _ISR_Enable( level );
306 
307  return val;
308 #endif
309 }
310 
311 static inline void *_CPU_atomic_Fetch_add_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
312 {
313 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
314  return (void *) obj->fetch_add( (uintptr_t) arg, order );
315 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
316  return (void *) atomic_fetch_add_explicit( obj, (uintptr_t) arg, order );
317 #else
318  uintptr_t val;
319  ISR_Level level;
320 
321  (void) order;
322  _ISR_Disable( level );
323  val = *obj;
324  *obj = val + (uintptr_t) arg;
325  _ISR_Enable( level );
326 
327  return (void *) val;
328 #endif
329 }
330 
331 static inline unsigned int _CPU_atomic_Fetch_sub_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
332 {
333 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
334  return obj->fetch_sub( arg, order );
335 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
336  return atomic_fetch_sub_explicit( obj, arg, order );
337 #else
338  unsigned int val;
339  ISR_Level level;
340 
341  (void) order;
342  _ISR_Disable( level );
343  val = *obj;
344  *obj = val - arg;
345  _ISR_Enable( level );
346 
347  return val;
348 #endif
349 }
350 
351 static inline unsigned long _CPU_atomic_Fetch_sub_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
352 {
353 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
354  return obj->fetch_sub( arg, order );
355 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
356  return atomic_fetch_sub_explicit( obj, arg, order );
357 #else
358  unsigned long val;
359  ISR_Level level;
360 
361  (void) order;
362  _ISR_Disable( level );
363  val = *obj;
364  *obj = val - arg;
365  _ISR_Enable( level );
366 
367  return val;
368 #endif
369 }
370 
371 static inline void *_CPU_atomic_Fetch_sub_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
372 {
373 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
374  return (void *) obj->fetch_sub( (uintptr_t) arg, order );
375 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
376  return (void *) atomic_fetch_sub_explicit( obj, (uintptr_t) arg, order );
377 #else
378  uintptr_t val;
379  ISR_Level level;
380 
381  (void) order;
382  _ISR_Disable( level );
383  val = *obj;
384  *obj = val - (uintptr_t) arg;
385  _ISR_Enable( level );
386 
387  return (void *) val;
388 #endif
389 }
390 
391 static inline unsigned int _CPU_atomic_Fetch_or_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
392 {
393 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
394  return obj->fetch_or( arg, order );
395 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
396  return atomic_fetch_or_explicit( obj, arg, order );
397 #else
398  unsigned int val;
399  ISR_Level level;
400 
401  (void) order;
402  _ISR_Disable( level );
403  val = *obj;
404  *obj = val | arg;
405  _ISR_Enable( level );
406 
407  return val;
408 #endif
409 }
410 
411 static inline unsigned long _CPU_atomic_Fetch_or_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
412 {
413 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
414  return obj->fetch_or( arg, order );
415 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
416  return atomic_fetch_or_explicit( obj, arg, order );
417 #else
418  unsigned long val;
419  ISR_Level level;
420 
421  (void) order;
422  _ISR_Disable( level );
423  val = *obj;
424  *obj = val | arg;
425  _ISR_Enable( level );
426 
427  return val;
428 #endif
429 }
430 
431 static inline void *_CPU_atomic_Fetch_or_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
432 {
433 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
434  return (void *) obj->fetch_or( (uintptr_t) arg, order );
435 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
436  return (void *) atomic_fetch_or_explicit( obj, (uintptr_t) arg, order );
437 #else
438  uintptr_t val;
439  ISR_Level level;
440 
441  (void) order;
442  _ISR_Disable( level );
443  val = *obj;
444  *obj = val | (uintptr_t) arg;
445  _ISR_Enable( level );
446 
447  return (void *) val;
448 #endif
449 }
450 
451 static inline unsigned int _CPU_atomic_Fetch_and_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
452 {
453 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
454  return obj->fetch_and( arg, order );
455 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
456  return atomic_fetch_and_explicit( obj, arg, order );
457 #else
458  unsigned int val;
459  ISR_Level level;
460 
461  (void) order;
462  _ISR_Disable( level );
463  val = *obj;
464  *obj = val & arg;
465  _ISR_Enable( level );
466 
467  return val;
468 #endif
469 }
470 
471 static inline unsigned long _CPU_atomic_Fetch_and_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
472 {
473 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
474  return obj->fetch_and( arg, order );
475 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
476  return atomic_fetch_and_explicit( obj, arg, order );
477 #else
478  unsigned long val;
479  ISR_Level level;
480 
481  (void) order;
482  _ISR_Disable( level );
483  val = *obj;
484  *obj = val & arg;
485  _ISR_Enable( level );
486 
487  return val;
488 #endif
489 }
490 
491 static inline void *_CPU_atomic_Fetch_and_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
492 {
493 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
494  return (void *) obj->fetch_and( (uintptr_t) arg, order );
495 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
496  return (void *) atomic_fetch_and_explicit( obj, (uintptr_t) arg, order );
497 #else
498  uintptr_t val;
499  ISR_Level level;
500 
501  (void) order;
502  _ISR_Disable( level );
503  val = *obj;
504  *obj = val & (uintptr_t) arg;
505  _ISR_Enable( level );
506 
507  return (void *) val;
508 #endif
509 }
510 
511 static inline unsigned int _CPU_atomic_Exchange_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
512 {
513 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
514  return obj->exchange( desired, order );
515 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
516  return atomic_exchange_explicit( obj, desired, order );
517 #else
518  unsigned int val;
519  ISR_Level level;
520 
521  (void) order;
522  _ISR_Disable( level );
523  val = *obj;
524  *obj = desired;
525  _ISR_Enable( level );
526 
527  return val;
528 #endif
529 }
530 
531 static inline unsigned long _CPU_atomic_Exchange_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
532 {
533 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
534  return obj->exchange( desired, order );
535 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
536  return atomic_exchange_explicit( obj, desired, order );
537 #else
538  unsigned long val;
539  ISR_Level level;
540 
541  (void) order;
542  _ISR_Disable( level );
543  val = *obj;
544  *obj = desired;
545  _ISR_Enable( level );
546 
547  return val;
548 #endif
549 }
550 
551 static inline void *_CPU_atomic_Exchange_ptr( CPU_atomic_Pointer *obj, void *desired, CPU_atomic_Order order )
552 {
553 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
554  return (void *) obj->exchange( (uintptr_t) desired, order );
555 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
556  return (void *) atomic_exchange_explicit( obj, (uintptr_t) desired, order );
557 #else
558  uintptr_t val;
559  ISR_Level level;
560 
561  (void) order;
562  _ISR_Disable( level );
563  val = *obj;
564  *obj = (uintptr_t) desired;
565  _ISR_Enable( level );
566 
567  return (void *) val;
568 #endif
569 }
570 
571 static inline bool _CPU_atomic_Compare_exchange_uint( CPU_atomic_Uint *obj, unsigned int *expected, unsigned int desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
572 {
573 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
574  return obj->compare_exchange_strong( *expected, desired, succ, fail );
575 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
576  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
577 #else
578  bool success;
579  ISR_Level level;
580 
581  (void) succ;
582  (void) fail;
583  _ISR_Disable( level );
584  success = *obj == *expected;
585  if ( success ) {
586  *obj = desired;
587  }
588  _ISR_Enable( level );
589 
590  return success;
591 #endif
592 }
593 
594 static inline bool _CPU_atomic_Compare_exchange_ulong( CPU_atomic_Ulong *obj, unsigned long *expected, unsigned long desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
595 {
596 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
597  return obj->compare_exchange_strong( *expected, desired, succ, fail );
598 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
599  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
600 #else
601  bool success;
602  ISR_Level level;
603 
604  (void) succ;
605  (void) fail;
606  _ISR_Disable( level );
607  success = *obj == *expected;
608  if ( success ) {
609  *obj = desired;
610  }
611  _ISR_Enable( level );
612 
613  return success;
614 #endif
615 }
616 
617 static inline bool _CPU_atomic_Compare_exchange_ptr( CPU_atomic_Pointer *obj, void **expected, void *desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
618 {
619 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
620  return obj->compare_exchange_strong( *(uintptr_t *) expected, (uintptr_t) desired, succ, fail );
621 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
622  return atomic_compare_exchange_strong_explicit( obj, (uintptr_t *) expected, (uintptr_t) desired, succ, fail );
623 #else
624  bool success;
625  ISR_Level level;
626 
627  (void) succ;
628  (void) fail;
629  _ISR_Disable( level );
630  success = *obj == (uintptr_t) *expected;
631  if ( success ) {
632  *obj = (uintptr_t) desired;
633  }
634  _ISR_Enable( level );
635 
636  return success;
637 #endif
638 }
639 
640 static inline void _CPU_atomic_Flag_clear( CPU_atomic_Flag *obj, CPU_atomic_Order order )
641 {
642 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
643  obj->clear( order );
644 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
645  atomic_flag_clear_explicit( obj, order );
646 #else
647  (void) order;
648  *obj = false;
649 #endif
650 }
651 
652 static inline bool _CPU_atomic_Flag_test_and_set( CPU_atomic_Flag *obj, CPU_atomic_Order order )
653 {
654 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
655  return obj->test_and_set( order );
656 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
657  return atomic_flag_test_and_set_explicit( obj, order );
658 #else
659  bool flag;
660  ISR_Level level;
661 
662  (void) order;
663  _ISR_Disable( level );
664  flag = *obj;
665  *obj = true;
666  _ISR_Enable( level );
667 
668  return flag;
669 #endif
670 }
671 
672 #endif /* _RTEMS_SCORE_CPUSTDATOMIC_H */
isrlevel.h
ISR Level Type.
ISR_Level
uint32_t ISR_Level
The following type defines the control block used to manage the interrupt level portion of the status...
Definition: isrlevel.h:42
_ISR_Enable
#define _ISR_Enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:76
basedefs.h
Basic Definitions.
_ISR_Disable
#define _ISR_Disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:58
RTEMS_COMPILER_MEMORY_BARRIER
#define RTEMS_COMPILER_MEMORY_BARRIER()
The following macro is a compiler specific way to ensure that memory writes are not reordered around ...
Definition: basedefs.h:146
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