RTEMS  5.0.0
Data Fields

XdmacChid hardware registers. More...

#include <component_xdmac.h>

Data Fields

__O uint32_t XDMAC_CIE
 (XdmacChid Offset: 0x0) Channel Interrupt Enable Register
 
__O uint32_t XDMAC_CID
 (XdmacChid Offset: 0x4) Channel Interrupt Disable Register
 
__O uint32_t XDMAC_CIM
 (XdmacChid Offset: 0x8) Channel Interrupt Mask Register
 
__I uint32_t XDMAC_CIS
 (XdmacChid Offset: 0xC) Channel Interrupt Status Register
 
__IO uint32_t XDMAC_CSA
 (XdmacChid Offset: 0x10) Channel Source Address Register
 
__IO uint32_t XDMAC_CDA
 (XdmacChid Offset: 0x14) Channel Destination Address Register
 
__IO uint32_t XDMAC_CNDA
 (XdmacChid Offset: 0x18) Channel Next Descriptor Address Register
 
__IO uint32_t XDMAC_CNDC
 (XdmacChid Offset: 0x1C) Channel Next Descriptor Control Register
 
__IO uint32_t XDMAC_CUBC
 (XdmacChid Offset: 0x20) Channel Microblock Control Register
 
__IO uint32_t XDMAC_CBC
 (XdmacChid Offset: 0x24) Channel Block Control Register
 
__IO uint32_t XDMAC_CC
 (XdmacChid Offset: 0x28) Channel Configuration Register
 
__IO uint32_t XDMAC_CDS_MSP
 (XdmacChid Offset: 0x2C) Channel Data Stride Memory Set Pattern
 
__IO uint32_t XDMAC_CSUS
 (XdmacChid Offset: 0x30) Channel Source Microblock Stride
 
__IO uint32_t XDMAC_CDUS
 (XdmacChid Offset: 0x34) Channel Destination Microblock Stride
 
__I uint32_t Reserved1 [2]
 

Detailed Description

XdmacChid hardware registers.


The documentation for this struct was generated from the following file: