|
union { |
uint32_t R |
|
struct { |
uint32_t OWREN:1 |
|
uint32_t WLSIDE:1 |
|
uint32_t MODE:1 |
|
uint32_t EDGLEV:1 |
|
uint32_t TRGEN:1 |
|
uint32_t EDGE:1 |
|
uint32_t XSTRTEN:1 |
|
uint32_t NSTART:1 |
|
uint32_t __pad0__:1 |
|
uint32_t JTRGEN:1 |
|
uint32_t JEDGE:1 |
|
uint32_t JSTART:1 |
|
uint32_t __pad1__:2 |
|
uint32_t CTUEN:1 |
|
uint32_t __pad2__:8 |
|
uint32_t ADCLKSEL:1 |
|
uint32_t ABORTCHAIN:1 |
|
uint32_t ABORT:1 |
|
uint32_t ACKO:1 |
|
uint32_t OFFREFRESH:1 |
|
uint32_t OFFCANC:1 |
|
uint32_t __pad3__:2 |
|
uint32_t PWDN:1 |
|
} B |
|
} | MCR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:7 |
|
uint32_t NSTART:1 |
|
uint32_t JABORT:1 |
|
uint32_t __pad1__:2 |
|
uint32_t JSTART:1 |
|
uint32_t __pad2__:3 |
|
uint32_t CTUSTART:1 |
|
uint32_t CHADDR:7 |
|
uint32_t __pad3__:3 |
|
uint32_t ACKO:1 |
|
uint32_t OFFREFRESH:1 |
|
uint32_t OFFCANC:1 |
|
uint32_t ADCSTATUS:3 |
|
} B |
|
} | MSR |
|
uint32_t | adc_reserved1 [2] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:25 |
|
uint32_t OFFCANCOVR:1 |
|
uint32_t EOFFSET:1 |
|
uint32_t EOCTU:1 |
|
uint32_t JEOC:1 |
|
uint32_t JECH:1 |
|
uint32_t EOC:1 |
|
uint32_t ECH:1 |
|
} B |
|
} | ISR |
|
union { |
uint32_t R |
|
struct { |
uint32_t EOCCH31:1 |
|
uint32_t EOCCH30:1 |
|
uint32_t EOCCH29:1 |
|
uint32_t EOCCH28:1 |
|
uint32_t EOCCH27:1 |
|
uint32_t EOCCH26:1 |
|
uint32_t EOCCH25:1 |
|
uint32_t EOCCH24:1 |
|
uint32_t EOCCH23:1 |
|
uint32_t EOCCH22:1 |
|
uint32_t EOCCH21:1 |
|
uint32_t EOCCH20:1 |
|
uint32_t EOCCH19:1 |
|
uint32_t EOCCH18:1 |
|
uint32_t EOCCH17:1 |
|
uint32_t EOCCH16:1 |
|
uint32_t EOCCH15:1 |
|
uint32_t EOCCH14:1 |
|
uint32_t EOCCH13:1 |
|
uint32_t EOCCH12:1 |
|
uint32_t EOCCH11:1 |
|
uint32_t EOCCH10:1 |
|
uint32_t EOCCH9:1 |
|
uint32_t EOCCH8:1 |
|
uint32_t EOCCH7:1 |
|
uint32_t EOCCH6:1 |
|
uint32_t EOCCH5:1 |
|
uint32_t EOCCH4:1 |
|
uint32_t EOCCH3:1 |
|
uint32_t EOCCH2:1 |
|
uint32_t EOCCH1:1 |
|
uint32_t EOCCH0:1 |
|
} B |
|
} | CEOCFR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t EOCCH63:1 |
|
uint32_t EOCCH62:1 |
|
uint32_t EOCCH61:1 |
|
uint32_t EOCCH60:1 |
|
uint32_t EOCCH59:1 |
|
uint32_t EOCCH58:1 |
|
uint32_t EOCCH57:1 |
|
uint32_t EOCCH56:1 |
|
uint32_t EOCCH55:1 |
|
uint32_t EOCCH54:1 |
|
uint32_t EOCCH53:1 |
|
uint32_t EOCCH52:1 |
|
uint32_t EOCCH51:1 |
|
uint32_t EOCCH50:1 |
|
uint32_t EOCCH49:1 |
|
uint32_t EOCCH48:1 |
|
uint32_t EOCCH47:1 |
|
uint32_t EOCCH46:1 |
|
uint32_t EOCCH45:1 |
|
uint32_t EOCCH44:1 |
|
uint32_t EOCCH43:1 |
|
uint32_t EOCCH42:1 |
|
uint32_t EOCCH41:1 |
|
uint32_t EOCCH40:1 |
|
uint32_t EOCCH39:1 |
|
uint32_t EOCCH38:1 |
|
uint32_t EOCCH37:1 |
|
uint32_t EOCCH36:1 |
|
uint32_t EOCCH35:1 |
|
uint32_t EOCCH34:1 |
|
uint32_t EOCCH33:1 |
|
uint32_t EOCCH32:1 |
|
} B |
|
} | CEOCFR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t EOCCH95:1 |
|
uint32_t EOCCH94:1 |
|
uint32_t EOCCH93:1 |
|
uint32_t EOCCH92:1 |
|
uint32_t EOCCH91:1 |
|
uint32_t EOCCH90:1 |
|
uint32_t EOCCH89:1 |
|
uint32_t EOCCH88:1 |
|
uint32_t EOCCH87:1 |
|
uint32_t EOCCH86:1 |
|
uint32_t EOCCH85:1 |
|
uint32_t EOCCH84:1 |
|
uint32_t EOCCH83:1 |
|
uint32_t EOCCH82:1 |
|
uint32_t EOCCH81:1 |
|
uint32_t EOCCH80:1 |
|
uint32_t EOCCH79:1 |
|
uint32_t EOCCH78:1 |
|
uint32_t EOCCH77:1 |
|
uint32_t EOCCH76:1 |
|
uint32_t EOCCH75:1 |
|
uint32_t EOCCH74:1 |
|
uint32_t EOCCH73:1 |
|
uint32_t EOCCH72:1 |
|
uint32_t EOCCH71:1 |
|
uint32_t EOCCH70:1 |
|
uint32_t EOCCH69:1 |
|
uint32_t EOCCH68:1 |
|
uint32_t EOCCH67:1 |
|
uint32_t EOCCH66:1 |
|
uint32_t EOCCH65:1 |
|
uint32_t EOCCH64:1 |
|
} B |
|
} | CEOCFR2 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:25 |
|
uint32_t MSKOFFCANCOVR:1 |
|
uint32_t MSKEOFFSET:1 |
|
uint32_t MSKEOCTU:1 |
|
uint32_t MSKJEOC:1 |
|
uint32_t MSKJECH:1 |
|
uint32_t MSKEOC:1 |
|
uint32_t MSKECH:1 |
|
} B |
|
} | IMR |
|
union { |
uint32_t R |
|
struct { |
uint32_t CIM31:1 |
|
uint32_t CIM30:1 |
|
uint32_t CIM29:1 |
|
uint32_t CIM28:1 |
|
uint32_t CIM27:1 |
|
uint32_t CIM26:1 |
|
uint32_t CIM25:1 |
|
uint32_t CIM24:1 |
|
uint32_t CIM23:1 |
|
uint32_t CIM22:1 |
|
uint32_t CIM21:1 |
|
uint32_t CIM20:1 |
|
uint32_t CIM19:1 |
|
uint32_t CIM18:1 |
|
uint32_t CIM17:1 |
|
uint32_t CIM16:1 |
|
uint32_t CIM15:1 |
|
uint32_t CIM14:1 |
|
uint32_t CIM13:1 |
|
uint32_t CIM12:1 |
|
uint32_t CIM11:1 |
|
uint32_t CIM10:1 |
|
uint32_t CIM9:1 |
|
uint32_t CIM8:1 |
|
uint32_t CIM7:1 |
|
uint32_t CIM6:1 |
|
uint32_t CIM5:1 |
|
uint32_t CIM4:1 |
|
uint32_t CIM3:1 |
|
uint32_t CIM2:1 |
|
uint32_t CIM1:1 |
|
uint32_t CIM0:1 |
|
} B |
|
} | CIMR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CIM63:1 |
|
uint32_t CIM62:1 |
|
uint32_t CIM61:1 |
|
uint32_t CIM60:1 |
|
uint32_t CIM59:1 |
|
uint32_t CIM58:1 |
|
uint32_t CIM57:1 |
|
uint32_t CIM56:1 |
|
uint32_t CIM55:1 |
|
uint32_t CIM54:1 |
|
uint32_t CIM53:1 |
|
uint32_t CIM52:1 |
|
uint32_t CIM51:1 |
|
uint32_t CIM50:1 |
|
uint32_t CIM49:1 |
|
uint32_t CIM48:1 |
|
uint32_t CIM47:1 |
|
uint32_t CIM46:1 |
|
uint32_t CIM45:1 |
|
uint32_t CIM44:1 |
|
uint32_t CIM43:1 |
|
uint32_t CIM42:1 |
|
uint32_t CIM41:1 |
|
uint32_t CIM40:1 |
|
uint32_t CIM39:1 |
|
uint32_t CIM38:1 |
|
uint32_t CIM37:1 |
|
uint32_t CIM36:1 |
|
uint32_t CIM35:1 |
|
uint32_t CIM34:1 |
|
uint32_t CIM33:1 |
|
uint32_t CIM32:1 |
|
} B |
|
} | CIMR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CIM63:1 |
|
uint32_t CIM62:1 |
|
uint32_t CIM61:1 |
|
uint32_t CIM60:1 |
|
uint32_t CIM59:1 |
|
uint32_t CIM58:1 |
|
uint32_t CIM57:1 |
|
uint32_t CIM56:1 |
|
uint32_t CIM55:1 |
|
uint32_t CIM54:1 |
|
uint32_t CIM53:1 |
|
uint32_t CIM52:1 |
|
uint32_t CIM51:1 |
|
uint32_t CIM50:1 |
|
uint32_t CIM49:1 |
|
uint32_t CIM48:1 |
|
uint32_t CIM47:1 |
|
uint32_t CIM46:1 |
|
uint32_t CIM45:1 |
|
uint32_t CIM44:1 |
|
uint32_t CIM43:1 |
|
uint32_t CIM42:1 |
|
uint32_t CIM41:1 |
|
uint32_t CIM40:1 |
|
uint32_t CIM39:1 |
|
uint32_t CIM38:1 |
|
uint32_t CIM37:1 |
|
uint32_t CIM36:1 |
|
uint32_t CIM35:1 |
|
uint32_t CIM34:1 |
|
uint32_t CIM33:1 |
|
uint32_t CIM32:1 |
|
} B |
|
} | CIMR2 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:24 |
|
uint32_t WDG3H:1 |
|
uint32_t WDG2H:1 |
|
uint32_t WDG1H:1 |
|
uint32_t WDG0H:1 |
|
uint32_t WDG3L:1 |
|
uint32_t WDG2L:1 |
|
uint32_t WDG1L:1 |
|
uint32_t WDG0L:1 |
|
} B |
|
} | WTISR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:24 |
|
uint32_t MSKWDG3H:1 |
|
uint32_t MSKWDG2H:1 |
|
uint32_t MSKWDG1H:1 |
|
uint32_t MSKWDG0H:1 |
|
uint32_t MSKWDG3L:1 |
|
uint32_t MSKWDG2L:1 |
|
uint32_t MSKWDG1L:1 |
|
uint32_t MSKWDG0L:1 |
|
} B |
|
} | WTIMR |
|
uint32_t | adc_reserved2 [2] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:30 |
|
uint32_t DCLR:1 |
|
uint32_t DMAEN:1 |
|
} B |
|
} | DMAE |
|
union { |
uint32_t R |
|
struct { |
uint32_t DMA31:1 |
|
uint32_t DMA30:1 |
|
uint32_t DMA29:1 |
|
uint32_t DMA28:1 |
|
uint32_t DMA27:1 |
|
uint32_t DMA26:1 |
|
uint32_t DMA25:1 |
|
uint32_t DMA24:1 |
|
uint32_t DMA23:1 |
|
uint32_t DMA22:1 |
|
uint32_t DMA21:1 |
|
uint32_t DMA20:1 |
|
uint32_t DMA19:1 |
|
uint32_t DMA18:1 |
|
uint32_t DMA17:1 |
|
uint32_t DMA16:1 |
|
uint32_t DMA15:1 |
|
uint32_t DMA14:1 |
|
uint32_t DMA13:1 |
|
uint32_t DMA12:1 |
|
uint32_t DMA11:1 |
|
uint32_t DMA10:1 |
|
uint32_t DMA9:1 |
|
uint32_t DMA8:1 |
|
uint32_t DMA7:1 |
|
uint32_t DMA6:1 |
|
uint32_t DMA5:1 |
|
uint32_t DMA4:1 |
|
uint32_t DMA3:1 |
|
uint32_t DMA2:1 |
|
uint32_t DMA1:1 |
|
uint32_t DMA0:1 |
|
} B |
|
} | DMAR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t DMA63:1 |
|
uint32_t DMA62:1 |
|
uint32_t DMA61:1 |
|
uint32_t DMA60:1 |
|
uint32_t DMA59:1 |
|
uint32_t DMA58:1 |
|
uint32_t DMA57:1 |
|
uint32_t DMA56:1 |
|
uint32_t DMA55:1 |
|
uint32_t DMA54:1 |
|
uint32_t DMA53:1 |
|
uint32_t DMA52:1 |
|
uint32_t DMA51:1 |
|
uint32_t DMA50:1 |
|
uint32_t DMA49:1 |
|
uint32_t DMA48:1 |
|
uint32_t DMA47:1 |
|
uint32_t DMA46:1 |
|
uint32_t DMA45:1 |
|
uint32_t DMA44:1 |
|
uint32_t DMA43:1 |
|
uint32_t DMA42:1 |
|
uint32_t DMA41:1 |
|
uint32_t DMA40:1 |
|
uint32_t DMA39:1 |
|
uint32_t DMA38:1 |
|
uint32_t DMA37:1 |
|
uint32_t DMA36:1 |
|
uint32_t DMA35:1 |
|
uint32_t DMA34:1 |
|
uint32_t DMA33:1 |
|
uint32_t DMA32:1 |
|
} B |
|
} | DMAR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t DMA95:1 |
|
uint32_t DMA94:1 |
|
uint32_t DMA93:1 |
|
uint32_t DMA92:1 |
|
uint32_t DMA91:1 |
|
uint32_t DMA90:1 |
|
uint32_t DMA89:1 |
|
uint32_t DMA88:1 |
|
uint32_t DMA87:1 |
|
uint32_t DMA86:1 |
|
uint32_t DMA85:1 |
|
uint32_t DMA84:1 |
|
uint32_t DMA83:1 |
|
uint32_t DMA82:1 |
|
uint32_t DMA81:1 |
|
uint32_t DMA80:1 |
|
uint32_t DMA79:1 |
|
uint32_t DMA78:1 |
|
uint32_t DMA77:1 |
|
uint32_t DMA76:1 |
|
uint32_t DMA75:1 |
|
uint32_t DMA74:1 |
|
uint32_t DMA73:1 |
|
uint32_t DMA72:1 |
|
uint32_t DMA71:1 |
|
uint32_t DMA70:1 |
|
uint32_t DMA69:1 |
|
uint32_t DMA68:1 |
|
uint32_t DMA67:1 |
|
uint32_t DMA66:1 |
|
uint32_t DMA65:1 |
|
uint32_t DMA64:1 |
|
} B |
|
} | DMAR2 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:16 |
|
uint32_t THREN:1 |
|
uint32_t THRINV:1 |
|
uint32_t THROP:1 |
|
uint32_t __pad1__:6 |
|
uint32_t THRCH:7 |
|
} B |
|
} | TRC [4] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:6 |
|
uint32_t THRH:10 |
|
uint32_t __pad1__:6 |
|
uint32_t THRL:10 |
|
} B |
|
} | THRHLR [4] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:6 |
|
uint32_t THRH:10 |
|
uint32_t __pad1__:6 |
|
uint32_t THRL:10 |
|
} B |
|
} | THRALT [4] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:25 |
|
uint32_t PREVAL2:2 |
|
uint32_t PREVAL1:2 |
|
uint32_t PREVAL0:2 |
|
uint32_t PRECONV:1 |
|
} B |
|
} | PSCR |
|
union { |
uint32_t R |
|
struct { |
uint32_t PSR31:1 |
|
uint32_t PSR30:1 |
|
uint32_t PSR29:1 |
|
uint32_t PSR28:1 |
|
uint32_t PSR27:1 |
|
uint32_t PSR26:1 |
|
uint32_t PSR25:1 |
|
uint32_t PSR24:1 |
|
uint32_t PSR23:1 |
|
uint32_t PSR22:1 |
|
uint32_t PSR21:1 |
|
uint32_t PSR20:1 |
|
uint32_t PSR19:1 |
|
uint32_t PSR18:1 |
|
uint32_t PSR17:1 |
|
uint32_t PSR16:1 |
|
uint32_t PSR15:1 |
|
uint32_t PSR14:1 |
|
uint32_t PSR13:1 |
|
uint32_t PSR12:1 |
|
uint32_t PSR11:1 |
|
uint32_t PSR10:1 |
|
uint32_t PSR9:1 |
|
uint32_t PSR8:1 |
|
uint32_t PSR7:1 |
|
uint32_t PSR6:1 |
|
uint32_t PSR5:1 |
|
uint32_t PSR4:1 |
|
uint32_t PSR3:1 |
|
uint32_t PSR2:1 |
|
uint32_t PSR1:1 |
|
uint32_t PSR0:1 |
|
} B |
|
} | PSR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t PSR63:1 |
|
uint32_t PSR62:1 |
|
uint32_t PSR61:1 |
|
uint32_t PSR60:1 |
|
uint32_t PSR59:1 |
|
uint32_t PSR58:1 |
|
uint32_t PSR57:1 |
|
uint32_t PSR56:1 |
|
uint32_t PSR55:1 |
|
uint32_t PSR54:1 |
|
uint32_t PSR53:1 |
|
uint32_t PSR52:1 |
|
uint32_t PSR51:1 |
|
uint32_t PSR50:1 |
|
uint32_t PSR49:1 |
|
uint32_t PSR48:1 |
|
uint32_t PSR47:1 |
|
uint32_t PSR46:1 |
|
uint32_t PSR45:1 |
|
uint32_t PSR44:1 |
|
uint32_t PSR43:1 |
|
uint32_t PSR42:1 |
|
uint32_t PSR41:1 |
|
uint32_t PSR40:1 |
|
uint32_t PSR39:1 |
|
uint32_t PSR38:1 |
|
uint32_t PSR37:1 |
|
uint32_t PSR36:1 |
|
uint32_t PSR35:1 |
|
uint32_t PSR34:1 |
|
uint32_t PSR33:1 |
|
uint32_t PSR32:1 |
|
} B |
|
} | PSR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t PSR95:1 |
|
uint32_t PSR94:1 |
|
uint32_t PSR93:1 |
|
uint32_t PSR92:1 |
|
uint32_t PSR91:1 |
|
uint32_t PSR90:1 |
|
uint32_t PSR89:1 |
|
uint32_t PSR88:1 |
|
uint32_t PSR87:1 |
|
uint32_t PSR86:1 |
|
uint32_t PSR85:1 |
|
uint32_t PSR84:1 |
|
uint32_t PSR83:1 |
|
uint32_t PSR82:1 |
|
uint32_t PSR81:1 |
|
uint32_t PSR80:1 |
|
uint32_t PSR79:1 |
|
uint32_t PSR78:1 |
|
uint32_t PSR77:1 |
|
uint32_t PSR76:1 |
|
uint32_t PSR75:1 |
|
uint32_t PSR74:1 |
|
uint32_t PSR73:1 |
|
uint32_t PSR72:1 |
|
uint32_t PSR71:1 |
|
uint32_t PSR70:1 |
|
uint32_t PSR69:1 |
|
uint32_t PSR68:1 |
|
uint32_t PSR67:1 |
|
uint32_t PSR66:1 |
|
uint32_t PSR65:1 |
|
uint32_t PSR64:1 |
|
} B |
|
} | PSR2 |
|
uint32_t | adc_reserved3 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:16 |
|
uint32_t INPLATCH:1 |
|
uint32_t __pad1__:1 |
|
uint32_t OFFSHIFT:2 |
|
uint32_t __pad2__:1 |
|
uint32_t INPCMP:2 |
|
uint32_t __pad3__:1 |
|
uint32_t INPSAMP:8 |
|
} B |
|
} | CTR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:16 |
|
uint32_t INPLATCH:1 |
|
uint32_t __pad1__:4 |
|
uint32_t INPCMP:2 |
|
uint32_t __pad2__:1 |
|
uint32_t INPSAMP:8 |
|
} B |
|
} | CTR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:16 |
|
uint32_t INPLATCH:1 |
|
uint32_t __pad1__:4 |
|
uint32_t INPCMP:2 |
|
uint32_t __pad2__:1 |
|
uint32_t INPSAMP:8 |
|
} B |
|
} | CTR2 |
|
uint32_t | adc_reserved4 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CH31:1 |
|
uint32_t CH30:1 |
|
uint32_t CH29:1 |
|
uint32_t CH28:1 |
|
uint32_t CH27:1 |
|
uint32_t CH26:1 |
|
uint32_t CH25:1 |
|
uint32_t CH24:1 |
|
uint32_t CH23:1 |
|
uint32_t CH22:1 |
|
uint32_t CH21:1 |
|
uint32_t CH20:1 |
|
uint32_t CH19:1 |
|
uint32_t CH18:1 |
|
uint32_t CH17:1 |
|
uint32_t CH16:1 |
|
uint32_t CH15:1 |
|
uint32_t CH14:1 |
|
uint32_t CH13:1 |
|
uint32_t CH12:1 |
|
uint32_t CH11:1 |
|
uint32_t CH10:1 |
|
uint32_t CH9:1 |
|
uint32_t CH8:1 |
|
uint32_t CH7:1 |
|
uint32_t CH6:1 |
|
uint32_t CH5:1 |
|
uint32_t CH4:1 |
|
uint32_t CH3:1 |
|
uint32_t CH2:1 |
|
uint32_t CH1:1 |
|
uint32_t CH0:1 |
|
} B |
|
} | NCMR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CH63:1 |
|
uint32_t CH62:1 |
|
uint32_t CH61:1 |
|
uint32_t CH60:1 |
|
uint32_t CH59:1 |
|
uint32_t CH58:1 |
|
uint32_t CH57:1 |
|
uint32_t CH56:1 |
|
uint32_t CH55:1 |
|
uint32_t CH54:1 |
|
uint32_t CH53:1 |
|
uint32_t CH52:1 |
|
uint32_t CH51:1 |
|
uint32_t CH50:1 |
|
uint32_t CH49:1 |
|
uint32_t CH48:1 |
|
uint32_t CH47:1 |
|
uint32_t CH46:1 |
|
uint32_t CH45:1 |
|
uint32_t CH44:1 |
|
uint32_t CH43:1 |
|
uint32_t CH42:1 |
|
uint32_t CH41:1 |
|
uint32_t CH40:1 |
|
uint32_t CH39:1 |
|
uint32_t CH38:1 |
|
uint32_t CH37:1 |
|
uint32_t CH36:1 |
|
uint32_t CH35:1 |
|
uint32_t CH34:1 |
|
uint32_t CH33:1 |
|
uint32_t CH32:1 |
|
} B |
|
} | NCMR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t PSR95:1 |
|
uint32_t PSR94:1 |
|
uint32_t PSR93:1 |
|
uint32_t PSR92:1 |
|
uint32_t PSR91:1 |
|
uint32_t PSR90:1 |
|
uint32_t PSR89:1 |
|
uint32_t PSR88:1 |
|
uint32_t PSR87:1 |
|
uint32_t PSR86:1 |
|
uint32_t PSR85:1 |
|
uint32_t PSR84:1 |
|
uint32_t PSR83:1 |
|
uint32_t PSR82:1 |
|
uint32_t PSR81:1 |
|
uint32_t PSR80:1 |
|
uint32_t PSR79:1 |
|
uint32_t PSR78:1 |
|
uint32_t PSR77:1 |
|
uint32_t PSR76:1 |
|
uint32_t PSR75:1 |
|
uint32_t PSR74:1 |
|
uint32_t PSR73:1 |
|
uint32_t PSR72:1 |
|
uint32_t PSR71:1 |
|
uint32_t PSR70:1 |
|
uint32_t PSR69:1 |
|
uint32_t PSR68:1 |
|
uint32_t PSR67:1 |
|
uint32_t PSR66:1 |
|
uint32_t PSR65:1 |
|
uint32_t PSR64:1 |
|
} B |
|
} | NCMR2 |
|
uint32_t | adc_reserved5 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CH31:1 |
|
uint32_t CH30:1 |
|
uint32_t CH29:1 |
|
uint32_t CH28:1 |
|
uint32_t CH27:1 |
|
uint32_t CH26:1 |
|
uint32_t CH25:1 |
|
uint32_t CH24:1 |
|
uint32_t CH23:1 |
|
uint32_t CH22:1 |
|
uint32_t CH21:1 |
|
uint32_t CH20:1 |
|
uint32_t CH19:1 |
|
uint32_t CH18:1 |
|
uint32_t CH17:1 |
|
uint32_t CH16:1 |
|
uint32_t CH15:1 |
|
uint32_t CH14:1 |
|
uint32_t CH13:1 |
|
uint32_t CH12:1 |
|
uint32_t CH11:1 |
|
uint32_t CH10:1 |
|
uint32_t CH9:1 |
|
uint32_t CH8:1 |
|
uint32_t CH7:1 |
|
uint32_t CH6:1 |
|
uint32_t CH5:1 |
|
uint32_t CH4:1 |
|
uint32_t CH3:1 |
|
uint32_t CH2:1 |
|
uint32_t CH1:1 |
|
uint32_t CH0:1 |
|
} B |
|
} | JCMR0 |
|
union { |
uint32_t R |
|
struct { |
uint32_t CH63:1 |
|
uint32_t CH62:1 |
|
uint32_t CH61:1 |
|
uint32_t CH60:1 |
|
uint32_t CH59:1 |
|
uint32_t CH58:1 |
|
uint32_t CH57:1 |
|
uint32_t CH56:1 |
|
uint32_t CH55:1 |
|
uint32_t CH54:1 |
|
uint32_t CH53:1 |
|
uint32_t CH52:1 |
|
uint32_t CH51:1 |
|
uint32_t CH50:1 |
|
uint32_t CH49:1 |
|
uint32_t CH48:1 |
|
uint32_t CH47:1 |
|
uint32_t CH46:1 |
|
uint32_t CH45:1 |
|
uint32_t CH44:1 |
|
uint32_t CH43:1 |
|
uint32_t CH42:1 |
|
uint32_t CH41:1 |
|
uint32_t CH40:1 |
|
uint32_t CH39:1 |
|
uint32_t CH38:1 |
|
uint32_t CH37:1 |
|
uint32_t CH36:1 |
|
uint32_t CH35:1 |
|
uint32_t CH34:1 |
|
uint32_t CH33:1 |
|
uint32_t CH32:1 |
|
} B |
|
} | JCMR1 |
|
union { |
uint32_t R |
|
struct { |
uint32_t PSR95:1 |
|
uint32_t PSR94:1 |
|
uint32_t PSR93:1 |
|
uint32_t PSR92:1 |
|
uint32_t PSR91:1 |
|
uint32_t PSR90:1 |
|
uint32_t PSR89:1 |
|
uint32_t PSR88:1 |
|
uint32_t PSR87:1 |
|
uint32_t PSR86:1 |
|
uint32_t PSR85:1 |
|
uint32_t PSR84:1 |
|
uint32_t PSR83:1 |
|
uint32_t PSR82:1 |
|
uint32_t PSR81:1 |
|
uint32_t PSR80:1 |
|
uint32_t PSR79:1 |
|
uint32_t PSR78:1 |
|
uint32_t PSR77:1 |
|
uint32_t PSR76:1 |
|
uint32_t PSR75:1 |
|
uint32_t PSR74:1 |
|
uint32_t PSR73:1 |
|
uint32_t PSR72:1 |
|
uint32_t PSR71:1 |
|
uint32_t PSR70:1 |
|
uint32_t PSR69:1 |
|
uint32_t PSR68:1 |
|
uint32_t PSR67:1 |
|
uint32_t PSR66:1 |
|
uint32_t PSR65:1 |
|
uint32_t PSR64:1 |
|
} B |
|
} | JCMR2 |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:15 |
|
uint32_t OFFSETLOAD:1 |
|
uint32_t __pad1__:8 |
|
uint32_t OFFSET_WORD:8 |
|
} B |
|
} | OFFWR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:24 |
|
uint32_t DSD:8 |
|
} B |
|
} | DSDR |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:24 |
|
uint32_t PDED:8 |
|
} B |
|
} | PDEDR |
|
uint32_t | adc_reserved6 [9] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:16 |
|
uint32_t TEST_CTL:16 |
|
} B |
|
} | TCTLR |
|
uint32_t | adc_reserved7 [3] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:12 |
|
uint32_t VALID:1 |
|
uint32_t OVERW:1 |
|
uint32_t RESULT:2 |
|
uint32_t __pad1__:6 |
|
uint32_t CDATA:10 |
|
} B |
|
} | PRECDATAREG [32] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:12 |
|
uint32_t VALID:1 |
|
uint32_t OVERW:1 |
|
uint32_t RESULT:2 |
|
uint32_t __pad1__:6 |
|
uint32_t CDATA:10 |
|
} B |
|
} | INTDATAREG [32] |
|
union { |
uint32_t R |
|
struct { |
uint32_t __pad0__:12 |
|
uint32_t VALID:1 |
|
uint32_t OVERW:1 |
|
uint32_t RESULT:2 |
|
uint32_t __pad1__:6 |
|
uint32_t CDATA:10 |
|
} B |
|
} | EXTDATAREG [32] |
|
The documentation for this struct was generated from the following file: