54 #define SPID_ERROR_LOCK 2 62 #define SPID_CSR_SCBR(mck, spck) SPI_CSR_SCBR((mck) / (spck)) 66 #define SPID_CSR_DLYBS(mck, delay) SPI_CSR_DLYBS((((delay) * \ 67 ((mck) / 1000000)) / 1000) + 1) 71 #define SPID_CSR_DLYBCT(mck, delay) SPI_CSR_DLYBCT((((delay) / 32 * \ 72 ((mck) / 1000000)) / 1000) + 1) 136 extern void SPID_Handler(
Spid *pSpid);
138 extern void SPID_DmaHandler(
Spid *pSpid);
uint8_t * pTxBuff
Definition: spi_dma.h:92
void(* SpidCallback)(uint8_t, void *)
Definition: spi_dma.h:83
struct _SpidCmd SpidCmd
Spi Transfer Request prepared by the application upper layer.
Spi Transfer Request prepared by the application upper layer.
Definition: spi_dma.h:90
uint32_t SPID_IsBusy(const Spid *pSpid)
Check if the SPI driver is busy.
Definition: spi_dma.c:386
uint8_t * pRxBuff
Definition: spi_dma.h:96
void SPID_ConfigureCS(Spid *pSpid, uint32_t dwCS, uint32_t dwCsr)
Configures the parameters for the device corresponding to the cs value.
Definition: spi_dma.c:308
Spi hardware registers.
Definition: component_spi.h:41
uint16_t RxSize
Definition: spi_dma.h:98
uint8_t spiId
Definition: spi_dma.h:117
uint32_t SPID_Configure(Spid *pSpid, Spi *pSpiHw, uint8_t spiId, uint32_t SpiMode, sXdmad *pXdmad)
Initializes the Spid structure and the corresponding SPI & DMA hardware. select value. The driver will uses DMA channel 0 for RX and DMA channel 1 for TX. The DMA channels are freed automatically when no SPI command processing.
Definition: spi_dma.c:280
uint32_t SPID_SendCommand(Spid *pSpid, SpidCmd *pCommand)
Starts a SPI master transfer. This is a non blocking function. It will return as soon as the transfer...
Definition: spi_dma.c:334
uint8_t spiCs
Definition: spi_dma.h:100
Spi * pSpiHw
Definition: spi_dma.h:111
volatile int8_t semaphore
Definition: spi_dma.h:119
uint8_t TxSize
Definition: spi_dma.h:94
SpidCallback callback
Definition: spi_dma.h:102
SpidCmd * pCurrentCommand
Definition: spi_dma.h:113
sXdmad * pXdmad
Definition: spi_dma.h:115
void * pArgument
Definition: spi_dma.h:104
Definition: spi_dma.h:109