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#define | XDMAD_TRANSFER_MEMORY 0xFF |
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#define | XDMAD_ALLOC_FAILED 0xFFFF |
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#define | XDMAD_TRANSFER_TX 0 |
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#define | XDMAD_TRANSFER_RX 1 |
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#define | XDMA_UBC_NDE (0x1u << 24) |
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#define | XDMA_UBC_NDE_FETCH_DIS (0x0u << 24) |
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#define | XDMA_UBC_NDE_FETCH_EN (0x1u << 24) |
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#define | XDMA_UBC_NSEN (0x1u << 25) |
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#define | XDMA_UBC_NSEN_UNCHANGED (0x0u << 25) |
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#define | XDMA_UBC_NSEN_UPDATED (0x1u << 25) |
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#define | XDMA_UBC_NDEN (0x1u << 26) |
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#define | XDMA_UBC_NDEN_UNCHANGED (0x0u << 26) |
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#define | XDMA_UBC_NDEN_UPDATED (0x1u << 26) |
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#define | XDMA_UBC_NVIEW_Pos 27 |
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#define | XDMA_UBC_NVIEW_Msk (0x3u << XDMA_UBC_NVIEW_Pos) |
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#define | XDMA_UBC_NVIEW_NDV0 (0x0u << XDMA_UBC_NVIEW_Pos) |
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#define | XDMA_UBC_NVIEW_NDV1 (0x1u << XDMA_UBC_NVIEW_Pos) |
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#define | XDMA_UBC_NVIEW_NDV2 (0x2u << XDMA_UBC_NVIEW_Pos) |
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#define | XDMA_UBC_NVIEW_NDV3 (0x3u << XDMA_UBC_NVIEW_Pos) |
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