RTEMS  5.0.0
Data Structures | Macros

Data Structures

struct  Efc
 Efc hardware registers. More...
 

Macros

#define EEFC_FMR_FRDY   (0x1u << 0)
 (EEFC_FMR) Flash Ready Interrupt Enable
 
#define EEFC_FMR_FWS_Pos   8
 
#define EEFC_FMR_FWS_Msk   (0xfu << EEFC_FMR_FWS_Pos)
 (EEFC_FMR) Flash Wait State
 
#define EEFC_FMR_FWS(value)   ((EEFC_FMR_FWS_Msk & ((value) << EEFC_FMR_FWS_Pos)))
 
#define EEFC_FMR_SCOD   (0x1u << 16)
 (EEFC_FMR) Sequential Code Optimization Disable
 
#define EEFC_FMR_CLOE   (0x1u << 26)
 (EEFC_FMR) Code Loop Optimization Enable
 
#define EEFC_FCR_FCMD_Pos   0
 
#define EEFC_FCR_FCMD_Msk   (0xffu << EEFC_FCR_FCMD_Pos)
 (EEFC_FCR) Flash Command
 
#define EEFC_FCR_FCMD(value)   ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos)))
 
#define EEFC_FCR_FCMD_GETD   (0x0u << 0)
 (EEFC_FCR) Get Flash descriptor
 
#define EEFC_FCR_FCMD_WP   (0x1u << 0)
 (EEFC_FCR) Write page
 
#define EEFC_FCR_FCMD_WPL   (0x2u << 0)
 (EEFC_FCR) Write page and lock
 
#define EEFC_FCR_FCMD_EWP   (0x3u << 0)
 (EEFC_FCR) Erase page and write page
 
#define EEFC_FCR_FCMD_EWPL   (0x4u << 0)
 (EEFC_FCR) Erase page and write page then lock
 
#define EEFC_FCR_FCMD_EA   (0x5u << 0)
 (EEFC_FCR) Erase all
 
#define EEFC_FCR_FCMD_EPA   (0x7u << 0)
 (EEFC_FCR) Erase pages
 
#define EEFC_FCR_FCMD_SLB   (0x8u << 0)
 (EEFC_FCR) Set lock bit
 
#define EEFC_FCR_FCMD_CLB   (0x9u << 0)
 (EEFC_FCR) Clear lock bit
 
#define EEFC_FCR_FCMD_GLB   (0xAu << 0)
 (EEFC_FCR) Get lock bit
 
#define EEFC_FCR_FCMD_SGPB   (0xBu << 0)
 (EEFC_FCR) Set GPNVM bit
 
#define EEFC_FCR_FCMD_CGPB   (0xCu << 0)
 (EEFC_FCR) Clear GPNVM bit
 
#define EEFC_FCR_FCMD_GGPB   (0xDu << 0)
 (EEFC_FCR) Get GPNVM bit
 
#define EEFC_FCR_FCMD_STUI   (0xEu << 0)
 (EEFC_FCR) Start read unique identifier
 
#define EEFC_FCR_FCMD_SPUI   (0xFu << 0)
 (EEFC_FCR) Stop read unique identifier
 
#define EEFC_FCR_FCMD_GCALB   (0x10u << 0)
 (EEFC_FCR) Get CALIB bit
 
#define EEFC_FCR_FCMD_ES   (0x11u << 0)
 (EEFC_FCR) Erase sector
 
#define EEFC_FCR_FCMD_WUS   (0x12u << 0)
 (EEFC_FCR) Write user signature
 
#define EEFC_FCR_FCMD_EUS   (0x13u << 0)
 (EEFC_FCR) Erase user signature
 
#define EEFC_FCR_FCMD_STUS   (0x14u << 0)
 (EEFC_FCR) Start read user signature
 
#define EEFC_FCR_FCMD_SPUS   (0x15u << 0)
 (EEFC_FCR) Stop read user signature
 
#define EEFC_FCR_FARG_Pos   8
 
#define EEFC_FCR_FARG_Msk   (0xffffu << EEFC_FCR_FARG_Pos)
 (EEFC_FCR) Flash Command Argument
 
#define EEFC_FCR_FARG(value)   ((EEFC_FCR_FARG_Msk & ((value) << EEFC_FCR_FARG_Pos)))
 
#define EEFC_FCR_FKEY_Pos   24
 
#define EEFC_FCR_FKEY_Msk   (0xffu << EEFC_FCR_FKEY_Pos)
 (EEFC_FCR) Flash Writing Protection Key
 
#define EEFC_FCR_FKEY(value)   ((EEFC_FCR_FKEY_Msk & ((value) << EEFC_FCR_FKEY_Pos)))
 
#define EEFC_FCR_FKEY_PASSWD   (0x5Au << 24)
 (EEFC_FCR) The 0x5A value enables the command defined by the bits of the register. If the field is written with a different value, the write is not performed and no action is started.
 
#define EEFC_FSR_FRDY   (0x1u << 0)
 (EEFC_FSR) Flash Ready Status (cleared when Flash is busy)
 
#define EEFC_FSR_FCMDE   (0x1u << 1)
 (EEFC_FSR) Flash Command Error Status (cleared on read or by writing EEFC_FCR)
 
#define EEFC_FSR_FLOCKE   (0x1u << 2)
 (EEFC_FSR) Flash Lock Error Status (cleared on read)
 
#define EEFC_FSR_FLERR   (0x1u << 3)
 (EEFC_FSR) Flash Error Status (cleared when a programming operation starts)
 
#define EEFC_FSR_UECCELSB   (0x1u << 16)
 (EEFC_FSR) Unique ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)
 
#define EEFC_FSR_MECCELSB   (0x1u << 17)
 (EEFC_FSR) Multiple ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)
 
#define EEFC_FSR_UECCEMSB   (0x1u << 18)
 (EEFC_FSR) Unique ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)
 
#define EEFC_FSR_MECCEMSB   (0x1u << 19)
 (EEFC_FSR) Multiple ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)
 
#define EEFC_FRR_FVALUE_Pos   0
 
#define EEFC_FRR_FVALUE_Msk   (0xffffffffu << EEFC_FRR_FVALUE_Pos)
 (EEFC_FRR) Flash Result Value
 
#define EEFC_VERSION_VERSION_Pos   0
 
#define EEFC_VERSION_VERSION_Msk   (0xfffu << EEFC_VERSION_VERSION_Pos)
 (EEFC_VERSION) Version of the Hardware Module
 
#define EEFC_VERSION_MFN_Pos   16
 
#define EEFC_VERSION_MFN_Msk   (0x7u << EEFC_VERSION_MFN_Pos)
 (EEFC_VERSION) Metal Fix Number
 
#define EEFC_WPMR_WPEN   (0x1u << 0)
 (EEFC_WPMR) Write Protection Enable
 
#define EEFC_WPMR_WPKEY_Pos   8
 
#define EEFC_WPMR_WPKEY_Msk   (0xffffffu << EEFC_WPMR_WPKEY_Pos)
 (EEFC_WPMR) Write Protection Key
 
#define EEFC_WPMR_WPKEY(value)   ((EEFC_WPMR_WPKEY_Msk & ((value) << EEFC_WPMR_WPKEY_Pos)))
 
#define EEFC_WPMR_WPKEY_PASSWD   (0x454643u << 8)
 (EEFC_WPMR) Writing any other value in this field aborts the write operation.Always reads as 0.
 

Detailed Description

SOFTWARE API DEFINITION FOR Embedded Flash Controller