RTEMS  5.0.0
Macros
ARM Paravirtualization Support

Macros

#define ARM_DISABLE_INLINE_ISR_DISABLE_ENABLE
 
#define ARM_DISABLE_THREAD_ID_REGISTER_USE
 

Detailed Description

This handler encapulates the functionality (primarily conditional feature defines) related to paravirtualization on the ARM.

Paravirtualization on the ARM makes the following assumptions:

Macro Definition Documentation

◆ ARM_DISABLE_INLINE_ISR_DISABLE_ENABLE

#define ARM_DISABLE_INLINE_ISR_DISABLE_ENABLE

In a paravirtualized environment, RTEMS executes in user space and cannot disable/enable external exceptions (e.g. interrupts). The BSP which acts as an adapter to the hosting environment will provide the interrupt enable/disable methods.

◆ ARM_DISABLE_THREAD_ID_REGISTER_USE

#define ARM_DISABLE_THREAD_ID_REGISTER_USE

In a paravirtualized environment, RTEMS executes in user space and cannot write to the the Thread ID register which is normally used. CP15 C13 has three variants of a Thread ID register.

  • Opcode_2 = 2: This register is both user and privileged R/W accessible.
  • Opcode_2 = 3: This register is user read-only and privileged R/W accessible.
  • Opcode_2 = 4: This register is privileged R/W accessible only.