RTEMS  5.0.0
Functions | Variables
CMSIS Core Register Access Functions

Functions

 __attribute__ ((always_inline)) __STATIC_INLINE void __enable_irq(void)
 Enable IRQ Interrupts. More...
 

Variables

typedef __attribute__ = 100
 Disable IRQ Interrupts. More...
 

Detailed Description

Function Documentation

◆ __attribute__()

__attribute__ ( (always_inline)  )

Enable IRQ Interrupts.

Reverse bit order of value.

Rotate Right in unsigned value (32 bit)

Reverse byte order in signed short value.

Reverse byte order (16 bit)

Reverse byte order (32 bit)

Data Memory Barrier.

Data Synchronization Barrier.

Instruction Synchronization Barrier.

Send Event.

Wait For Event.

Wait For Interrupt.

No Operation.

Set Priority Mask.

Get Priority Mask.

Set Main Stack Pointer.

Get Main Stack Pointer.

Set Process Stack Pointer.

Get Process Stack Pointer.

Get xPSR Register.

Get APSR Register.

Get IPSR Register.

Set Control Register.

Get Control Register.

Disable IRQ Interrupts.

Enables IRQ interrupts by clearing the I-bit in the CPSR. Can only be executed in Privileged modes.

Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes.

Returns the content of the Control Register.

Returns
Control Register value

Writes the given value to the Control Register.

Parameters
[in]controlControl Register value to set

Returns the content of the IPSR Register.

Returns
IPSR Register value

Returns the content of the APSR Register.

Returns
APSR Register value

Returns the content of the xPSR Register.

Returns
xPSR Register value

Returns the current value of the Process Stack Pointer (PSP).

Returns
PSP Register value

Assigns the given value to the Process Stack Pointer (PSP).

Parameters
[in]topOfProcStackProcess Stack Pointer value to set

Returns the current value of the Main Stack Pointer (MSP).

Returns
MSP Register value

Assigns the given value to the Main Stack Pointer (MSP).

Parameters
[in]topOfMainStackMain Stack Pointer value to set

Returns the current state of the priority mask bit from the Priority Mask Register.

Returns
Priority Mask value

Assigns the given value to the Priority Mask Register.

Parameters
[in]priMaskPriority Mask

No Operation does nothing. This instruction can be used for code alignment purposes.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Reverses the byte order in integer value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in two unsigned short values.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in a signed short value with sign extension to integer.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters
[in]valueValue to rotate
[in]valueNumber of Bits to rotate
Returns
Rotated value

Reverses the bit order of the given value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Variable Documentation

◆ __attribute__

typedef float __vf __attribute__((vector_size(16))) = 100

Disable IRQ Interrupts.

The 64-bit format record item.

Reverse bit order of value.

Rotate Right in unsigned value (32 bit)

Reverse byte order in signed short value.

Reverse byte order (16 bit)

Reverse byte order (32 bit)

Data Memory Barrier.

Data Synchronization Barrier.

Instruction Synchronization Barrier.

Send Event.

Wait For Event.

Wait For Interrupt.

No Operation.

Set Priority Mask.

Get Priority Mask.

Set Main Stack Pointer.

Get Main Stack Pointer.

Set Process Stack Pointer.

Get Process Stack Pointer.

Get xPSR Register.

Get APSR Register.

Get IPSR Register.

Set Control Register.

Get Control Register.

Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes.

Returns the content of the Control Register.

Returns
Control Register value

Writes the given value to the Control Register.

Parameters
[in]controlControl Register value to set

Returns the content of the IPSR Register.

Returns
IPSR Register value

Returns the content of the APSR Register.

Returns
APSR Register value

Returns the content of the xPSR Register.

Returns
xPSR Register value

Returns the current value of the Process Stack Pointer (PSP).

Returns
PSP Register value

Assigns the given value to the Process Stack Pointer (PSP).

Parameters
[in]topOfProcStackProcess Stack Pointer value to set

Returns the current value of the Main Stack Pointer (MSP).

Returns
MSP Register value

Assigns the given value to the Main Stack Pointer (MSP).

Parameters
[in]topOfMainStackMain Stack Pointer value to set

Returns the current state of the priority mask bit from the Priority Mask Register.

Returns
Priority Mask value

Assigns the given value to the Priority Mask Register.

Parameters
[in]priMaskPriority Mask

No Operation does nothing. This instruction can be used for code alignment purposes.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Reverses the byte order in integer value.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in two unsigned short values.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Reverses the byte order in a signed short value with sign extension to integer.

Parameters
[in]valueValue to reverse
Returns
Reversed value

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters
[in]valueValue to rotate
[in]valueNumber of Bits to rotate
Returns
Rotated value

Reverses the bit order of the given value.

Parameters
[in]valueValue to reverse
Returns
Reversed value