API definitions of the GPIO driver for the lpc176x bsp in RTEMS.
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Go to the source code of this file.
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#define | LPC176X_GPIO_BASE_ADDR 0x40028000U |
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#define | LPC176X_GPIO_INTERRUPT_STATUS 0x40028080U |
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#define | LPC176X_IOPIN0 |
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#define | LPC176X_IOSET0 |
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#define | LPC176X_IODIR0 |
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#define | LPC176X_IOCLR0 |
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#define | LPC176X_IOPIN1 |
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#define | LPC176X_IOSET1 |
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#define | LPC176X_IODIR1 |
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#define | LPC176X_IOCLR1 |
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#define | LPC176X_IO0_INT_EN_R |
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#define | LPC176X_IO0_INT_EN_F |
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#define | LPC176X_IO0_INT_STAT_R |
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#define | LPC176X_IO0_INT_STAT_F |
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#define | LPC176X_IO0_INT_CLR |
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#define | LPC176X_IO2_INT_EN_R |
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#define | LPC176X_IO2_INT_EN_F |
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#define | LPC176X_IO2_INT_STAT_R |
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#define | LPC176X_IO2_INT_STAT_F |
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#define | LPC176X_IO2_INT_CLR |
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#define | LPC176X_IO_INT_STAT |
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#define | LPC176X_RESERVED_ISR_FUNCT_SIZE 2U |
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#define | LPC176X_RESERVED_ISR_FUNCT_MAX_SIZE 5U |
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#define | LPC176X_MAX_PORT_NUMBER 160U |
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#define | LPC176X_SET_BIT(reg, pin, value) reg = ( reg & ~( 1U << pin ) ) | ( ( value & 1U ) << pin ) |
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#define | LPC176X_INT_STATUS |
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#define | LPC176X_INT_STATUS_P0 1U |
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#define | LPC176X_INT_STATUS_P2 ( 1U << 2U ) |
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#define | LPC176X_INT_ENABLE 1U |
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#define | LPC176X_INT_DISABLE 0U |
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#define | LPC176X_IRQ_EINT_3 21U |
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#define | LPC176X_PIN_BIT(pin) ( 1U << pin ) |
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enum | lpc176x_gpio_direction { LPC176X_GPIO_FUNCTION_INPUT,
LPC176X_GPIO_FUNCTION_OUTPUT,
LPC176X_GPIO_FUNCTION_COUNT
} |
| The direction of the GPIO port (input or output). More...
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enum | lpc176x_gpio_interrupt {
LPC176X_GPIO_INTERRUPT_DISABLE,
LPC176X_GPIO_INTERRUPT_RISING,
LPC176X_GPIO_INTERRUPT_FALLING,
LPC176X_GPIO_INTERRUPT_BOTH,
LPC176X_GPIO_INTERRUPT_COUNT
} |
| The interrupt sources edge for a GPIO. More...
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enum | lpc176x_gpio_ports {
LPC176X_GPIO_PORT_0,
LPC176X_GPIO_PORT_1,
LPC176X_GPIO_PORT_2,
LPC176X_GPIO_PORT_3,
LPC176X_GPIO_PORT_4,
LPC176X_GPIO_PORTS_COUNT
} |
| The ports for a GPIO. More...
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enum | lpc176x_gpio_address {
LPC176X_FIO0_BASE_ADDRESS = 0x2009C000U,
LPC176X_FIO1_BASE_ADDRESS = 0x2009C020U,
LPC176X_FIO2_BASE_ADDRESS = 0x2009C040U,
LPC176X_FIO3_BASE_ADDRESS = 0x2009C060U,
LPC176X_FIO4_BASE_ADDRESS = 0x2009C080U
} |
| Addresses for a GPIO. More...
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enum | lpc176x_interrupt_address { LPC176X_IO0_INT_BASE_ADDRESS = 0x40028084U,
LPC176X_IO2_INT_BASE_ADDRESS = 0x400280A4U
} |
| Addresses for the two interrupts. More...
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API definitions of the GPIO driver for the lpc176x bsp in RTEMS.
◆ LPC176X_INT_STATUS
#define LPC176X_INT_STATUS |
Value:( *(volatile uint32_t *) \
( LPC176X_GPIO_INTERRUPT_STATUS ) )
◆ LPC176X_IO0_INT_CLR
#define LPC176X_IO0_INT_CLR |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0x8CU ) )
◆ LPC176X_IO0_INT_EN_F
#define LPC176X_IO0_INT_EN_F |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0x94U ) )
◆ LPC176X_IO0_INT_EN_R
#define LPC176X_IO0_INT_EN_R |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0x90U ) )
◆ LPC176X_IO0_INT_STAT_F
#define LPC176X_IO0_INT_STAT_F |
Value:( *(volatile uint32_t *) ( \
LPC176X_GPIO_BASE_ADDR \
+ 0x88U ) )
◆ LPC176X_IO0_INT_STAT_R
#define LPC176X_IO0_INT_STAT_R |
Value:( *(volatile uint32_t *) ( \
LPC176X_GPIO_BASE_ADDR \
+ 0x84U ) )
◆ LPC176X_IO2_INT_CLR
#define LPC176X_IO2_INT_CLR |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0xACU ) )
◆ LPC176X_IO2_INT_EN_F
#define LPC176X_IO2_INT_EN_F |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0xB4U ) )
◆ LPC176X_IO2_INT_EN_R
#define LPC176X_IO2_INT_EN_R |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0xB0U ) )
◆ LPC176X_IO2_INT_STAT_F
#define LPC176X_IO2_INT_STAT_F |
Value:( *(volatile uint32_t *) ( \
LPC176X_GPIO_BASE_ADDR \
+ 0xA8U ) )
◆ LPC176X_IO2_INT_STAT_R
#define LPC176X_IO2_INT_STAT_R |
Value:( *(volatile uint32_t *) ( \
LPC176X_GPIO_BASE_ADDR \
+ 0xA4U ) )
◆ LPC176X_IO_INT_STAT
#define LPC176X_IO_INT_STAT |
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR \
+ 0x80U ) )
◆ LPC176X_IOCLR0
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x0CU ) )
◆ LPC176X_IOCLR1
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x1CU ) )
◆ LPC176X_IODIR0
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x08U ) )
◆ LPC176X_IODIR1
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x18U ) )
◆ LPC176X_IOPIN0
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x00U ) )
◆ LPC176X_IOPIN1
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x10U ) )
◆ LPC176X_IOSET0
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x04U ) )
◆ LPC176X_IOSET1
Value:( *(volatile uint32_t *) ( LPC176X_GPIO_BASE_ADDR + \
0x14U ) )
◆ lpc176x_gpio_interrupt_function
A function that attends an interrupt for GPIO.
- Parameters
-
pin | Pin number. |
edge | Interrupt. |
- Returns
- Pointer to the interrupt function.
◆ lpc176x_gpio_address
Addresses for a GPIO.
Enumerated type to define the set of fio bases addresses for a gpio device.
◆ lpc176x_gpio_direction
The direction of the GPIO port (input or output).
Enumerated type to define the set of function types for a gpio device.
◆ lpc176x_gpio_interrupt
The interrupt sources edge for a GPIO.
Enumerated type to define the set of interrupt types for a gpio device.
◆ lpc176x_gpio_ports
The ports for a GPIO.
Enumerated type to define the set of ports for a gpio device.
◆ lpc176x_interrupt_address
Addresses for the two interrupts.
Enumerated type to define the set of interrupt addresses for a gpio device.