RTEMS  5.0.0
drvmgr.h
1 /* Driver Manager Interface.
2  *
3  * COPYRIGHT (c) 2009 Cobham Gaisler AB.
4  *
5  * The license and distribution terms for this file may be
6  * found in the file LICENSE in this distribution or at
7  * http://www.rtems.org/license/LICENSE.
8  */
9 
10 #ifndef _DRIVER_MANAGER_H_
11 #define _DRIVER_MANAGER_H_
12 
13 #include <rtems.h>
14 #include <drvmgr/drvmgr_list.h>
15 #include <stdint.h>
16 #include <rtems/score/basedefs.h>
17 #include <rtems/score/smpimpl.h>
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 /*** Configure Driver manager ***/
24 
25 /* Define the number of initialization levels of device drivers */
26 #define DRVMGR_LEVEL_MAX 4
27 
28 /* Default to use semahpores for protection. Initialization works without
29  * locks and after initialization too if devices are not removed.
30  */
31 #ifndef DRVMGR_USE_LOCKS
32 #define DRVMGR_USE_LOCKS 1
33 #endif
34 
35 struct drvmgr_dev; /* Device */
36 struct drvmgr_bus; /* Bus */
37 struct drvmgr_drv; /* Driver */
38 
39 /*** List Interface shortcuts ***/
40 #define BUS_LIST_HEAD(list) LIST_HEAD(list, struct drvmgr_bus)
41 #define BUS_LIST_TAIL(list) LIST_TAIL(list, struct drvmgr_bus)
42 #define DEV_LIST_HEAD(list) LIST_HEAD(list, struct drvmgr_dev)
43 #define DEV_LIST_TAIL(list) LIST_TAIL(list, struct drvmgr_dev)
44 #define DRV_LIST_HEAD(list) LIST_HEAD(list, struct drvmgr_drv)
45 #define DRV_LIST_TAIL(list) LIST_TAIL(list, struct drvmgr_drv)
46 
47 /*** Bus indentification ***/
48 #define DRVMGR_BUS_TYPE_NONE 0 /* Not a valid bus */
49 #define DRVMGR_BUS_TYPE_ROOT 1 /* Hard coded bus */
50 #define DRVMGR_BUS_TYPE_PCI 2 /* PCI bus */
51 #define DRVMGR_BUS_TYPE_AMBAPP 3 /* AMBA Plug & Play bus */
52 #define DRVMGR_BUS_TYPE_LEON2_AMBA 4 /* LEON2 hardcoded bus */
53 #define DRVMGR_BUS_TYPE_AMBAPP_DIST 5 /* Distibuted AMBA Plug & Play bus accessed using a communication interface */
54 #define DRVMGR_BUS_TYPE_SPW_RMAP 6 /* SpaceWire Network bus */
55 #define DRVMGR_BUS_TYPE_AMBAPP_RMAP 7 /* SpaceWire RMAP accessed AMBA Plug & Play bus */
56 
57 enum {
58  DRVMGR_OBJ_NONE = 0,
59  DRVMGR_OBJ_DRV = 1,
60  DRVMGR_OBJ_BUS = 2,
61  DRVMGR_OBJ_DEV = 3,
62 };
63 
64 /*** Driver indentification ***
65  *
66  * 64-bit identification integer definition
67  * * Bus ID 8-bit [7..0]
68  * * Reserved 8-bit field [63..56]
69  * * Device ID specific for bus type 48-bit [55..8] (Different buses have
70  * different unique identifications for hardware/driver.)
71  *
72  * ID Rules
73  * * A root bus driver must always have device ID set to 0. There can only by
74  * one root bus driver for a certain bus type.
75  * * A Driver ID must identify a unique hardware core
76  *
77  */
78 
79 /* Bus ID Mask */
80 #define DRIVER_ID_BUS_MASK 0x00000000000000FFULL
81 
82 /* Reserved Mask for future use */
83 #define DRIVER_ID_RSV_MASK 0xFF00000000000000ULL
84 
85 /* Reserved Mask for future use */
86 #define DRIVER_ID_DEV_MASK 0x00FFFFFFFFFFFF00ULL
87 
88 /* Set Bus ID Mask. */
89 #define DRIVER_ID(busid, devid) ((unsigned long long) \
90  ((((unsigned long long)(devid) << 8) & DRIVER_ID_DEV_MASK) | \
91  ((unsigned long long)(busid) & DRIVER_ID_BUS_MASK)))
92 
93 /* Get IDs */
94 #define DRIVER_BUSID_GET(id) ((unsigned long long)(id) & DRIVER_ID_BUS_MASK)
95 #define DRIVER_DEVID_GET(id) (((unsigned long long)(id) & DRIVER_ID_DEV_MASK) >> 8)
96 
97 #define DRIVER_ROOTBUS_ID(bus_type) DRIVER_ID(bus_type, 0)
98 
99 /*** Root Bus drivers ***/
100 
101 /* Generic Hard coded Root bus: Driver ID */
102 #define DRIVER_ROOT_ID DRIVER_ROOTBUS_ID(DRVMGR_BUS_TYPE_ROOT)
103 
104 /* PCI Plug & Play bus: Driver ID */
105 #define DRIVER_PCIBUS_ID DRIVER_ROOTBUS_ID(DRVMGR_BUS_TYPE_PCI)
106 
107 /* AMBA Plug & Play bus: Driver ID */
108 #define DRIVER_GRLIB_AMBAPP_ID DRIVER_ROOTBUS_ID(DRVMGR_BUS_TYPE_AMBAPP)
109 
110 /* AMBA Hard coded bus: Driver ID */
111 #define DRIVER_LEON2_AMBA_ID DRIVER_ROOTBUS_ID(DRVMGR_BUS_TYPE_LEON2_AMBA)
112 
113 /* Distributed AMBA Plug & Play bus: Driver ID */
114 #define DRIVER_AMBAPP_DIST_ID DRIVER_ROOTBUS_ID(DRVMGR_BUS_TYPE_AMBAPP_DIST)
115 
122  char *dev_prefix;
123 };
124 
125 /* Interrupt Service Routine (ISR) */
126 typedef void (*drvmgr_isr)(void *arg);
127 
130  /* Functions used internally within driver manager */
131  int (*init[DRVMGR_LEVEL_MAX])(struct drvmgr_bus *);
132  int (*remove)(struct drvmgr_bus *);
133  int (*unite)(struct drvmgr_drv *, struct drvmgr_dev *);
135  /* Functions called indirectly from drivers */
136  int (*int_register)(struct drvmgr_dev *, int index, const char *info, drvmgr_isr isr, void *arg);
137  int (*int_unregister)(struct drvmgr_dev *, int index, drvmgr_isr isr, void *arg);
138  int (*int_clear)(struct drvmgr_dev *, int index);
139  int (*int_mask)(struct drvmgr_dev *, int index);
140  int (*int_unmask)(struct drvmgr_dev *, int index);
141 #ifdef RTEMS_SMP
142  int (*int_set_affinity)(struct drvmgr_dev *, int index,
143  const Processor_mask *cpus);
144 #endif
145 
146  /* Get Parameters */
147  int (*get_params)(struct drvmgr_dev *, struct drvmgr_bus_params *);
148  /* Get Frequency of Bus */
149  int (*get_freq)(struct drvmgr_dev*, int, unsigned int*);
153  void (*get_info_dev)(struct drvmgr_dev *,
154  void (*print)(void *p, char *str), void *p);
155 };
156 #define BUS_OPS_NUM (sizeof(struct drvmgr_bus_ops)/sizeof(void (*)(void)))
157 
158 struct drvmgr_func {
159  int funcid;
160  void *func;
161 };
162 #define DRVMGR_FUNC(_ID_, _FUNC_) {(int)(_ID_), (void *)(_FUNC_)}
163 #define DRVMGR_FUNC_END {0, NULL}
164 
165 /*** Resource definitions ***
166  *
167  * Overview of structures:
168  * All bus resources entries (_bus_res) are linked together per bus
169  * (bus_info->reslist). One bus resource entry has a pointer to an array of
170  * driver resources (_drv_res). One driver resouces is made out of an array
171  * of keys (drvmgr_key). All keys belongs to the same driver and harwdare
172  * device. Each key has a Name, Type ID and Data interpreted differently
173  * depending on the Type ID (union drvmgr_key_value).
174  *
175  */
176 
177 /* Key Data Types */
178 enum drvmgr_kt {
179  DRVMGR_KT_ANY = -1,
180  DRVMGR_KT_NONE = 0,
181  DRVMGR_KT_INT = 1,
182  DRVMGR_KT_STRING = 2,
183  DRVMGR_KT_POINTER = 3,
184 };
185 
186 #define DRVMGR_KEY_EMPTY {NULL, DRVMGR_KT_NONE, {0}}
187 #define DRVMGR_RES_EMPTY {0, 0, NULL}
188 #define MMAP_EMPTY {0, 0, 0}
189 
192  unsigned int i;
193  char *str;
194  void *ptr;
195 };
196 
197 /* One key. One Value. Holding information relevant to the driver. */
198 struct drvmgr_key {
199  char *key_name; /* Name of key */
200  enum drvmgr_kt key_type; /* How to interpret key_value */
201  union drvmgr_key_value key_value; /* The value or pointer to value */
202 };
203 
208  uint64_t drv_id;
209  int minor_bus;
210  struct drvmgr_key *keys;
211 };
212 
216  struct drvmgr_drv_res resource[];
217 };
218 
226  char *name;
227  unsigned int size;
228  char *from_adr;
230  char *to_adr;
232 };
233 #define DRVMGR_TRANSLATE_ONE2ONE NULL
234 #define DRVMGR_TRANSLATE_NO_BRIDGE ((void *)1) /* No bridge, error */
235 
237 struct drvmgr_bus {
238  int obj_type;
239  unsigned char bus_type;
240  unsigned char depth;
241  struct drvmgr_bus *next;
242  struct drvmgr_dev *dev;
243  void *priv;
245  struct drvmgr_bus_ops *ops;
246  struct drvmgr_func *funcs;
247  int dev_cnt;
252  /* Bus status */
253  int level;
254  int state;
255  int error;
256 };
257 
258 /* States of a bus */
259 #define BUS_STATE_INIT_FAILED 0x00000001 /* Initialization Failed */
260 #define BUS_STATE_LIST_INACTIVE 0x00001000 /* In inactive bus list */
261 #define BUS_STATE_DEPEND_FAILED 0x00000004 /* Device init failed */
262 
263 /* States of a device */
264 #define DEV_STATE_INIT_FAILED 0x00000001 /* Initialization Failed */
265 #define DEV_STATE_INIT_DONE 0x00000002 /* All init levels completed */
266 #define DEV_STATE_DEPEND_FAILED 0x00000004 /* Parent Bus init failed */
267 #define DEV_STATE_UNITED 0x00000100 /* Device United with Device Driver */
268 #define DEV_STATE_REMOVED 0x00000200 /* Device has been removed (unregistered) */
269 #define DEV_STATE_IGNORED 0x00000400 /* Device was ignored according to user's request, the device
270  * was never reported to it's driver (as expected).
271  */
272 #define DEV_STATE_LIST_INACTIVE 0x00001000 /* In inactive device list */
273 
275 struct drvmgr_dev {
276  int obj_type;
277  struct drvmgr_dev *next;
281  struct drvmgr_drv *drv;
282  struct drvmgr_bus *parent;
283  short minor_drv;
284  short minor_bus;
285  char *name;
286  void *priv;
287  void *businfo;
288  struct drvmgr_bus *bus;
290  /* Device Status */
291  unsigned int state;
292  int level;
293  int error;
294 };
295 
298  int (*init[DRVMGR_LEVEL_MAX])(struct drvmgr_dev *);
299  int (*remove)(struct drvmgr_dev *);
300  int (*info)(struct drvmgr_dev *, void (*print)(void *p, char *str), void *p, int, char *argv[]);
301 };
302 #define DRVMGR_OPS_NUM(x) (sizeof(x)/sizeof(void (*)(void)))
303 
305 struct drvmgr_drv {
306  int obj_type;
307  struct drvmgr_drv *next;
308  struct drvmgr_dev *dev;
310  uint64_t drv_id;
311  char *name;
312  int bus_type;
313  struct drvmgr_drv_ops *ops;
314  struct drvmgr_func *funcs;
315  unsigned int dev_cnt;
316  unsigned int dev_priv_size;
317 };
318 
323 typedef void (*drvmgr_drv_reg_func)(void);
324 
325 /*** DRIVER | DEVICE | BUS FUNCTIONS ***/
326 
327 /* Return Codes */
328 enum {
329  DRVMGR_OK = 0, /* Sucess */
330  DRVMGR_NOMEM = 1, /* Memory allocation error */
331  DRVMGR_EIO = 2, /* I/O error */
332  DRVMGR_EINVAL = 3, /* Invalid parameter */
333  DRVMGR_ENOSYS = 4,
334  DRVMGR_TIMEDOUT = 5, /* Operation timeout error */
335  DRVMGR_EBUSY = 6,
336  DRVMGR_ENORES = 7, /* Not enough resources */
337  DRVMGR_FAIL = -1 /* Unspecified failure */
338 };
339 
344 extern void _DRV_Manager_initialization(void);
345 
351 extern void _DRV_Manager_init_level(int level);
352 
358 extern int drvmgr_init(void);
359 
360 /* Take registered buses and devices into the correct init level,
361  * this function is called from _init_level() so normally
362  * we don't need to call it directly.
363  */
364 extern void drvmgr_init_update(void);
365 
367 extern int drvmgr_root_drv_register(struct drvmgr_drv *drv);
368 
370 extern int drvmgr_drv_register(struct drvmgr_drv *drv);
371 
373 extern int drvmgr_dev_register(struct drvmgr_dev *dev);
374 
385 extern int drvmgr_dev_unregister(struct drvmgr_dev *dev);
386 
388 extern int drvmgr_bus_register(struct drvmgr_bus *bus);
389 
391 extern int drvmgr_bus_unregister(struct drvmgr_bus *bus);
392 
398 extern int drvmgr_children_unregister(struct drvmgr_bus *bus);
399 
400 /* Separate a device from the driver it has been united with */
401 extern int drvmgr_dev_drv_separate(struct drvmgr_dev *dev);
402 
409 extern int drvmgr_alloc_dev(struct drvmgr_dev **pdev, int extra);
410 
417 extern int drvmgr_alloc_bus(struct drvmgr_bus **pbus, int extra);
418 
419 /*** DRIVER RESOURCE FUNCTIONS ***/
420 
427 extern void drvmgr_bus_res_add(struct drvmgr_bus *bus,
428  struct drvmgr_bus_res *bres);
429 
436 extern int drvmgr_keys_get(struct drvmgr_dev *dev, struct drvmgr_key **keys);
437 
444 extern struct drvmgr_key *drvmgr_key_get(struct drvmgr_key *keys, char *key_name);
445 
458 extern union drvmgr_key_value *drvmgr_key_val_get(
459  struct drvmgr_key *keys,
460  char *key_name,
461  enum drvmgr_kt key_type);
462 
475 extern union drvmgr_key_value *drvmgr_dev_key_get(
476  struct drvmgr_dev *dev,
477  char *key_name,
478  enum drvmgr_kt key_type);
479 
480 /*** DRIVER INTERACE USED TO REQUEST INFORMATION/SERVICES FROM BUS DRIVER ***/
481 
483 RTEMS_INLINE_ROUTINE struct drvmgr_bus *drvmgr_get_parent(
484  struct drvmgr_dev *dev)
485 {
486  if (dev)
487  return dev->parent;
488  else
489  return NULL;
490 }
491 
493 RTEMS_INLINE_ROUTINE struct drvmgr_drv *drvmgr_get_drv(struct drvmgr_dev *dev)
494 {
495  if (dev)
496  return dev->drv;
497  else
498  return NULL;
499 }
500 
513 #define DRVMGR_FED_BF 1 /* Breadth-first search */
514 #define DRVMGR_FED_DF 0 /* Depth first search */
515 extern intptr_t drvmgr_for_each_dev(
516  intptr_t (*func)(struct drvmgr_dev *dev, void *arg),
517  void *arg,
518  int options);
519 
528 extern int drvmgr_get_dev(
529  struct drvmgr_drv *drv,
530  int minor,
531  struct drvmgr_dev **pdev);
532 
539 extern int drvmgr_freq_get(
540  struct drvmgr_dev *dev,
541  int options,
542  unsigned int *freq_hz);
543 
545 extern int drvmgr_on_rootbus(struct drvmgr_dev *dev);
546 
553 extern int drvmgr_get_dev_prefix(struct drvmgr_dev *dev, char *dev_prefix);
554 
568 extern int drvmgr_interrupt_register(
569  struct drvmgr_dev *dev,
570  int index,
571  const char *info,
572  drvmgr_isr isr,
573  void *arg);
574 
585 extern int drvmgr_interrupt_unregister(
586  struct drvmgr_dev *dev,
587  int index,
588  drvmgr_isr isr,
589  void *arg);
590 
600 extern int drvmgr_interrupt_clear(
601  struct drvmgr_dev *dev,
602  int index);
603 
614 extern int drvmgr_interrupt_unmask(
615  struct drvmgr_dev *dev,
616  int index);
617 
626 extern int drvmgr_interrupt_mask(
627  struct drvmgr_dev *dev,
628  int index);
629 
638 #ifdef RTEMS_SMP
639 extern int drvmgr_interrupt_set_affinity(
640  struct drvmgr_dev *dev,
641  int index,
642  const Processor_mask *cpus);
643 #endif
644 
646 enum drvmgr_tr_opts {
647  /* Translate CPU RAM Address (input) to DMA unit accessible address
648  * (output), this is an upstreams translation in reverse order.
649  *
650  * Typical Usage:
651  * It is common to translate a CPU accessible RAM address to an
652  * address that DMA units can access over bridges.
653  */
654  CPUMEM_TO_DMA = 0x0,
655 
656  /* Translate DMA Unit Accessible address mapped to CPU RAM (input) to
657  * CPU accessible address (output). This is an upstreams translation.
658  *
659  * Typical Usage (not often used):
660  * The DMA unit descriptors contain pointers to DMA buffers located at
661  * CPU RAM addresses that the DMA unit can access, the CPU processes
662  * the descriptors and want to access the data but a translation back
663  * to CPU address is required.
664  */
665  CPUMEM_FROM_DMA = 0x1,
666 
667  /* Translate DMA Memory Address (input) to CPU accessible address
668  * (output), this is a downstreams translation in reverse order.
669  *
670  * Typical Usage:
671  * A PCI network card puts packets into its memory not doing DMA over
672  * PCI, in order for the CPU to access them the PCI address must be
673  * translated.
674  */
675  DMAMEM_TO_CPU = 0x2,
676 
677  /* Translate CPU accessible address (input) mapped to DMA Memory Address
678  * to DMA Unit accessible address (output). This is a downstreams
679  * translation.
680  */
681  DMAMEM_FROM_CPU = 0x3,
682 };
683 #define DRVMGR_TR_REVERSE 0x1 /* do reverse translation direction order */
684 #define DRVMGR_TR_PATH 0x2 /* 0x0=down-stream 0x2=up-stream address path */
685 
722 extern unsigned int drvmgr_translate(
723  struct drvmgr_dev *dev,
724  unsigned int options,
725  void *src_address,
726  void **dst_address);
727 
728 /* Translate addresses between buses, used internally to implement
729  * drvmgr_translate. Function is not limited to translate from/to root bus
730  * where CPU is resident, however buses must be on a straight path relative
731  * to each other (parent of parent of parent and so on).
732  *
733  * \param from src_address is given for this bus
734  * \param to src_address is translated to this bus
735  * \param reverse Selects translation method, if map entries are used in
736  * the reverse order (map_up->to is used as map_up->from)
737  * \param src_address Address to be translated
738  * \param dst_address Translated address is stored here on success (return=0)
739  *
740  * Returns 0 if unable to translate. The remaining length from the given
741  * address of the map is returned on success and the result is stored into
742  * *dst_address. For example if a map starts at 0x40000000 of size 0x100000
743  * the result will be 0x40000 if the address was translated into 0x400C0000.
744  * If dev is on root-bus no translation is performed 0xffffffff is returned.
745  * and src_address is stored in *dst_address.
746  */
747 extern unsigned int drvmgr_translate_bus(
748  struct drvmgr_bus *from,
749  struct drvmgr_bus *to,
750  int reverse,
751  void *src_address,
752  void **dst_address);
753 
754 /* Calls drvmgr_translate() to translate an address range and checks the result,
755  * a printout is generated if the check fails. All parameters are passed on to
756  * drvmgr_translate() except for size, see paramters of drvmgr_translate().
757  *
758  * If size=0 only the starting address is not checked.
759  *
760  * If mapping failes a non-zero result is returned.
761  */
762 extern int drvmgr_translate_check(
763  struct drvmgr_dev *dev,
764  unsigned int options,
765  void *src_address,
766  void **dst_address,
767  unsigned int size);
768 
773 extern int drvmgr_func_get(void *obj, int funcid, void **func);
774 
776 extern int drvmgr_func_call(void *obj, int funcid, void *a, void *b, void *c, void *d);
777 
778 /* Builds a Function ID.
779  *
780  * Used to request optional functions by a bus or device driver
781  */
782 #define DRVMGR_FUNCID(major, minor) ((((major) & 0xfff) << 20) | ((minor) & 0xfffff))
783 #define DRVMGR_FUNCID_NONE 0
784 #define DRVMGR_FUNCID_END DRVMGR_FUNCID(DRVMGR_FUNCID_NONE, 0)
785 
786 /* Major Function ID. Most significant 12-bits. */
787 enum {
788  FUNCID_NONE = 0x000,
789  FUNCID_RW = 0x001, /* Read/Write functions */
790 };
791 
792 /* Select Sub-Function Read/Write function by ID */
793 #define RW_SIZE_1 0x00001 /* Access Size */
794 #define RW_SIZE_2 0x00002
795 #define RW_SIZE_4 0x00004
796 #define RW_SIZE_8 0x00008
797 #define RW_SIZE_ANY 0x00000
798 #define RW_SIZE(id) ((unsigned int)(id) & 0xf)
799 
800 #define RW_DIR_ANY 0x00000 /* Access Direction */
801 #define RW_READ 0x00000 /* Read */
802 #define RW_WRITE 0x00010 /* Write */
803 #define RW_SET 0x00020 /* Write with same value (memset) */
804 #define RW_DIR(id) (((unsigned int)(id) >> 4) & 0x3)
805 
806 #define RW_RAW 0x00000 /* Raw access - no swapping (machine default) */
807 #define RW_LITTLE 0x00040 /* Little Endian */
808 #define RW_BIG 0x00080 /* Big Endian */
809 #define RW_ENDIAN(id) (((unsigned int)(id) >> 6) & 0x3)
810 
811 #define RW_TYPE_ANY 0x00000 /* Access type */
812 #define RW_REG 0x00100
813 #define RW_MEM 0x00200
814 #define RW_MEMREG 0x00300
815 #define RW_CFG 0x00400
816 #define RW_TYPE(id) (((unsigned int)(id) >> 8) & 0xf)
817 
818 #define RW_ARG 0x01000 /* Optional Argument */
819 #define RW_ERR 0x02000 /* Optional Error Handler */
820 
821 /* Build a Read/Write function ID */
822 #define DRVMGR_RWFUNC(minor) DRVMGR_FUNCID(FUNCID_RW, minor)
823 
824 /* Argument to Read/Write functions, the "void *arg" pointer is returned by
825  * RW_ARG. If NULL is returned no argument is needed.
826  */
828  void *arg;
829  struct drvmgr_dev *dev;
830 };
831 
832 /* Standard Read/Write function types */
833 typedef uint8_t (*drvmgr_r8)(uint8_t *srcadr);
834 typedef uint16_t (*drvmgr_r16)(uint16_t *srcadr);
835 typedef uint32_t (*drvmgr_r32)(uint32_t *srcadr);
836 typedef uint64_t (*drvmgr_r64)(uint64_t *srcadr);
837 typedef void (*drvmgr_w8)(uint8_t *dstadr, uint8_t data);
838 typedef void (*drvmgr_w16)(uint16_t *dstadr, uint16_t data);
839 typedef void (*drvmgr_w32)(uint32_t *dstadr, uint32_t data);
840 typedef void (*drvmgr_w64)(uint64_t *dstadr, uint64_t data);
841 /* READ/COPY a memory area located on bus into CPU memory.
842  * From 'src' (remote) to the destination 'dest' (local), n=number of bytes
843  */
844 typedef int (*drvmgr_rmem)(void *dest, const void *src, int n);
845 /* WRITE/COPY a user buffer located in CPU memory to a location on the bus.
846  * From 'src' (local) to the destination 'dest' (remote), n=number of bytes
847  */
848 typedef int (*drvmgr_wmem)(void *dest, const void *src, int n);
849 /* Set a memory area to the byte value given in c, see LIBC memset(). Memset is
850  * implemented by calling wmem() multiple times with a "large" buffer.
851  */
852 typedef int (*drvmgr_memset)(void *dstadr, int c, size_t n);
853 
854 /* Read/Write function types with additional argument */
855 typedef uint8_t (*drvmgr_r8_arg)(uint8_t *srcadr, void *a);
856 typedef uint16_t (*drvmgr_r16_arg)(uint16_t *srcadr, void *a);
857 typedef uint32_t (*drvmgr_r32_arg)(uint32_t *srcadr, void *a);
858 typedef uint64_t (*drvmgr_r64_arg)(uint64_t *srcadr, void *a);
859 typedef void (*drvmgr_w8_arg)(uint8_t *dstadr, uint8_t data, void *a);
860 typedef void (*drvmgr_w16_arg)(uint16_t *dstadr, uint16_t data, void *a);
861 typedef void (*drvmgr_w32_arg)(uint32_t *dstadr, uint32_t data, void *a);
862 typedef void (*drvmgr_w64_arg)(uint64_t *dstadr, uint64_t data, void *a);
863 typedef int (*drvmgr_rmem_arg)(void *dest, const void *src, int n, void *a);
864 typedef int (*drvmgr_wmem_arg)(void *dest, const void *src, int n, void *a);
865 typedef int (*drvmgr_memset_arg)(void *dstadr, int c, size_t n, void *a);
866 
867 /* Report an error to the parent bus of the device */
868 typedef void (*drvmgr_rw_err)(struct drvmgr_rw_arg *a, struct drvmgr_bus *bus,
869  int funcid, void *adr);
870 
871 /* Helper function for buses that implement the memset() over wmem() */
872 extern void drvmgr_rw_memset(
873  void *dstadr,
874  int c,
875  size_t n,
876  void *a,
877  drvmgr_wmem_arg wmem
878  );
879 
880 /*** PRINT INFORMATION ABOUT DRIVER MANAGER ***/
881 
906 extern int drvmgr_for_each_listdev(
907  struct drvmgr_list *devlist,
908  unsigned int state_set_mask,
909  unsigned int state_clr_mask,
910  int (*func)(struct drvmgr_dev *dev, void *arg),
911  void *arg);
912 
913 /* Print all devices */
914 #define PRINT_DEVS_FAILED 0x01 /* Failed during initialization */
915 #define PRINT_DEVS_ASSIGNED 0x02 /* Driver assigned */
916 #define PRINT_DEVS_UNASSIGNED 0x04 /* Driver not assigned */
917 #define PRINT_DEVS_IGNORED 0x08 /* Device ignored on user's request */
918 #define PRINT_DEVS_ALL (PRINT_DEVS_FAILED | \
919  PRINT_DEVS_ASSIGNED | \
920  PRINT_DEVS_UNASSIGNED |\
921  PRINT_DEVS_IGNORED)
922 
924 extern void drvmgr_summary(void);
925 
927 extern void drvmgr_print_devs(unsigned int options);
928 
930 extern void drvmgr_print_topo(void);
931 
935 extern void drvmgr_print_mem(void);
936 
937 #define OPTION_DEV_GENINFO 0x00000001
938 #define OPTION_DEV_BUSINFO 0x00000002
939 #define OPTION_DEV_DRVINFO 0x00000004
940 #define OPTION_DRV_DEVS 0x00000100
941 #define OPTION_BUS_DEVS 0x00010000
942 #define OPTION_RECURSIVE 0x01000000
943 #define OPTION_INFO_ALL 0xffffffff
944 
946 extern void drvmgr_info(void *id, unsigned int options);
947 
949 extern void drvmgr_info_dev(struct drvmgr_dev *dev, unsigned int options);
950 
952 extern void drvmgr_info_bus(struct drvmgr_bus *bus, unsigned int options);
953 
955 extern void drvmgr_info_drv(struct drvmgr_drv *drv, unsigned int options);
956 
958 extern void drvmgr_info_devs_on_bus(struct drvmgr_bus *bus, unsigned int options);
959 
961 extern void drvmgr_info_devs(unsigned int options);
962 
964 extern void drvmgr_info_drvs(unsigned int options);
965 
967 extern void drvmgr_info_buses(unsigned int options);
968 
970 extern struct drvmgr_drv *drvmgr_drv_by_id(uint64_t id);
971 
973 extern struct drvmgr_drv *drvmgr_drv_by_name(const char *name);
974 
976 extern struct drvmgr_dev *drvmgr_dev_by_name(const char *name);
977 
978 #ifdef __cplusplus
979 }
980 #endif
981 
982 #endif
struct drvmgr_drv_ops * ops
Definition: drvmgr.h:313
unsigned int size
Definition: drvmgr.h:227
struct drvmgr_bus * parent
Definition: drvmgr.h:282
uint64_t drv_id
Definition: drvmgr.h:310
struct drvmgr_bus_res * reslist
Definition: drvmgr.h:248
Definition: drvmgr.h:158
Definition: drvmgr.h:237
Definition: drvmgr.h:129
struct drvmgr_drv * next
Definition: drvmgr.h:307
struct drvmgr_dev * children
Definition: drvmgr.h:244
int minor_bus
Definition: drvmgr.h:209
#define RTEMS_INLINE_ROUTINE
Definition: basedefs.h:65
int state
Definition: drvmgr.h:254
unsigned char bus_type
Definition: drvmgr.h:239
struct drvmgr_bus_ops * ops
Definition: drvmgr.h:245
struct drvmgr_bus * bus
Definition: drvmgr.h:288
struct drvmgr_map_entry * maps_up
Definition: drvmgr.h:249
void * priv
Definition: drvmgr.h:243
Definition: drvmgr.h:198
unsigned p
Definition: tte.h:90
char * str
Definition: drvmgr.h:193
int bus_type
Definition: drvmgr.h:312
struct drvmgr_func * funcs
Definition: drvmgr.h:314
Definition: drvmgr.h:214
Definition: drvmgr.h:225
char * from_adr
Definition: drvmgr.h:228
struct drvmgr_dev * next_in_bus
Definition: drvmgr.h:278
unsigned int state
Definition: drvmgr.h:291
Definition: drvmgr.h:275
struct drvmgr_dev * dev
Definition: drvmgr.h:242
void * ptr
Definition: drvmgr.h:194
Definition: drvmgr.h:191
struct drvmgr_dev * next
Definition: drvmgr.h:277
int obj_type
Definition: drvmgr.h:276
struct drvmgr_map_entry * maps_down
Definition: drvmgr.h:250
struct drvmgr_func * funcs
Definition: drvmgr.h:246
int dev_cnt
Definition: drvmgr.h:247
Definition: drvmgr.h:827
char * name
Definition: drvmgr.h:226
char * name
Definition: drvmgr.h:311
struct drvmgr_key * keys
Definition: drvmgr.h:210
struct drvmgr_dev * next_in_drv
Definition: drvmgr.h:279
char * dev_prefix
Definition: drvmgr.h:122
int error
Definition: drvmgr.h:293
unsigned int dev_cnt
Definition: drvmgr.h:315
void * businfo
Definition: drvmgr.h:287
int obj_type
Definition: drvmgr.h:306
struct drvmgr_dev * dev
Definition: drvmgr.h:308
int level
Definition: drvmgr.h:292
Definition: drvmgr.h:207
Basic Definitions.
Definition: drvmgr.h:297
unsigned int i
Definition: drvmgr.h:192
short minor_bus
Definition: drvmgr.h:284
Definition: drvmgr.h:305
void * priv
Definition: drvmgr.h:286
int level
Definition: drvmgr.h:253
short minor_drv
Definition: drvmgr.h:283
unsigned size
Definition: tte.h:74
unsigned char depth
Definition: drvmgr.h:240
unsigned int dev_priv_size
Definition: drvmgr.h:316
struct drvmgr_drv * drv
Definition: drvmgr.h:281
char * name
Definition: drvmgr.h:285
struct drvmgr_bus * next
Definition: drvmgr.h:241
Definition: drvmgr.h:121
struct drvmgr_bus_res * next
Definition: drvmgr.h:215
Definition: drvmgr_list.h:24
SuperCore SMP Implementation.
int obj_type
Definition: drvmgr.h:238
char * to_adr
Definition: drvmgr.h:230
#define NULL
Requests a GPIO pin group configuration.
Definition: bestcomm_api.h:77
uint64_t drv_id
Definition: drvmgr.h:208
int error
Definition: drvmgr.h:255