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#define | BSP_INTERRUPT_VECTOR_MIN 0 |
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#define | TX4938_IRQ_ECC MIPS_INTERRUPT_BASE+0 |
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#define | TX4938_IRQ_WTE MIPS_INTERRUPT_BASE+1 |
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#define | TX4938_IRQ_INT0 MIPS_INTERRUPT_BASE+2 |
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#define | TX4938_IRQ_INT1 MIPS_INTERRUPT_BASE+3 |
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#define | TX4938_IRQ_INT2 MIPS_INTERRUPT_BASE+4 |
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#define | TX4938_IRQ_INT3 MIPS_INTERRUPT_BASE+5 |
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#define | TX4938_IRQ_INT4 MIPS_INTERRUPT_BASE+6 |
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#define | TX4938_IRQ_INT5 MIPS_INTERRUPT_BASE+7 |
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#define | TX4938_IRQ_SIO0 MIPS_INTERRUPT_BASE+8 |
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#define | TX4938_IRQ_SIO1 MIPS_INTERRUPT_BASE+9 |
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#define | TX4938_IRQ_DMAC00 MIPS_INTERRUPT_BASE+10 |
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#define | TX4938_IRQ_DMAC01 MIPS_INTERRUPT_BASE+11 |
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#define | TX4938_IRQ_DMAC02 MIPS_INTERRUPT_BASE+12 |
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#define | TX4938_IRQ_DMAC03 MIPS_INTERRUPT_BASE+13 |
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#define | TX4938_IRQ_IRC MIPS_INTERRUPT_BASE+14 |
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#define | TX4938_IRQ_PDMAC MIPS_INTERRUPT_BASE+15 |
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#define | TX4938_IRQ_PCIC MIPS_INTERRUPT_BASE+16 |
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#define | TX4938_IRQ_TMR0 MIPS_INTERRUPT_BASE+17 |
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#define | TX4938_IRQ_TMR1 MIPS_INTERRUPT_BASE+18 |
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#define | TX4938_IRQ_TMR2 MIPS_INTERRUPT_BASE+19 |
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#define | TX4938_IRQ_RSV1 MIPS_INTERRUPT_BASE+20 |
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#define | TX4938_IRQ_NDFMC MIPS_INTERRUPT_BASE+21 |
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#define | TX4938_IRQ_PCIERR MIPS_INTERRUPT_BASE+22 |
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#define | TX4938_IRQ_PCIPMC MIPS_INTERRUPT_BASE+23 |
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#define | TX4938_IRQ_ACLC MIPS_INTERRUPT_BASE+24 |
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#define | TX4938_IRQ_ACLCPME MIPS_INTERRUPT_BASE+25 |
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#define | TX4938_IRQ_PCIC1NT MIPS_INTERRUPT_BASE+26 |
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#define | TX4938_IRQ_ACLCPME MIPS_INTERRUPT_BASE+27 |
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#define | TX4938_IRQ_DMAC10 MIPS_INTERRUPT_BASE+28 |
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#define | TX4938_IRQ_DMAC11 MIPS_INTERRUPT_BASE+29 |
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#define | TX4938_IRQ_DMAC12 MIPS_INTERRUPT_BASE+30 |
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#define | TX4938_IRQ_DMAC13 MIPS_INTERRUPT_BASE+31 |
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#define | TX4938_IRQ_SOFTWARE_1 MIPS_INTERRUPT_BASE+32 |
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#define | TX4938_IRQ_SOFTWARE_2 MIPS_INTERRUPT_BASE+33 |
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#define | TX4938_MAXIMUM_VECTORS MIPS_INTERRUPT_BASE+34 |
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#define | BSP_INTERRUPT_VECTOR_MAX TX4938_MAXIMUM_VECTORS |
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