39 #ifndef __ALTERA_ALT_SYSMGR_H__ 40 #define __ALTERA_ALT_SYSMGR_H__ 86 #define ALT_SYSMGR_SILICONID1_REV_E_REV1 0x1 89 #define ALT_SYSMGR_SILICONID1_REV_LSB 0 91 #define ALT_SYSMGR_SILICONID1_REV_MSB 15 93 #define ALT_SYSMGR_SILICONID1_REV_WIDTH 16 95 #define ALT_SYSMGR_SILICONID1_REV_SET_MSK 0x0000ffff 97 #define ALT_SYSMGR_SILICONID1_REV_CLR_MSK 0xffff0000 99 #define ALT_SYSMGR_SILICONID1_REV_RESET 0x1 101 #define ALT_SYSMGR_SILICONID1_REV_GET(value) (((value) & 0x0000ffff) >> 0) 103 #define ALT_SYSMGR_SILICONID1_REV_SET(value) (((value) << 0) & 0x0000ffff) 124 #define ALT_SYSMGR_SILICONID1_ID_E_CYCLONEV_ARRIAV 0x0 127 #define ALT_SYSMGR_SILICONID1_ID_LSB 16 129 #define ALT_SYSMGR_SILICONID1_ID_MSB 31 131 #define ALT_SYSMGR_SILICONID1_ID_WIDTH 16 133 #define ALT_SYSMGR_SILICONID1_ID_SET_MSK 0xffff0000 135 #define ALT_SYSMGR_SILICONID1_ID_CLR_MSK 0x0000ffff 137 #define ALT_SYSMGR_SILICONID1_ID_RESET 0x0 139 #define ALT_SYSMGR_SILICONID1_ID_GET(value) (((value) & 0xffff0000) >> 16) 141 #define ALT_SYSMGR_SILICONID1_ID_SET(value) (((value) << 16) & 0xffff0000) 156 const uint32_t rev : 16;
157 const uint32_t id : 16;
165 #define ALT_SYSMGR_SILICONID1_OFST 0x0 188 #define ALT_SYSMGR_SILICONID2_RSV_LSB 0 190 #define ALT_SYSMGR_SILICONID2_RSV_MSB 31 192 #define ALT_SYSMGR_SILICONID2_RSV_WIDTH 32 194 #define ALT_SYSMGR_SILICONID2_RSV_SET_MSK 0xffffffff 196 #define ALT_SYSMGR_SILICONID2_RSV_CLR_MSK 0x00000000 198 #define ALT_SYSMGR_SILICONID2_RSV_RESET 0x0 200 #define ALT_SYSMGR_SILICONID2_RSV_GET(value) (((value) & 0xffffffff) >> 0) 202 #define ALT_SYSMGR_SILICONID2_RSV_SET(value) (((value) << 0) & 0xffffffff) 217 const uint32_t rsv : 32;
225 #define ALT_SYSMGR_SILICONID2_OFST 0x4 271 #define ALT_SYSMGR_WDDBG_MOD_0_E_CONTINUE 0x0 277 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSECPU0 0x1 283 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSECPU1 0x2 289 #define ALT_SYSMGR_WDDBG_MOD_0_E_PAUSEEITHER 0x3 292 #define ALT_SYSMGR_WDDBG_MOD_0_LSB 0 294 #define ALT_SYSMGR_WDDBG_MOD_0_MSB 1 296 #define ALT_SYSMGR_WDDBG_MOD_0_WIDTH 2 298 #define ALT_SYSMGR_WDDBG_MOD_0_SET_MSK 0x00000003 300 #define ALT_SYSMGR_WDDBG_MOD_0_CLR_MSK 0xfffffffc 302 #define ALT_SYSMGR_WDDBG_MOD_0_RESET 0x3 304 #define ALT_SYSMGR_WDDBG_MOD_0_GET(value) (((value) & 0x00000003) >> 0) 306 #define ALT_SYSMGR_WDDBG_MOD_0_SET(value) (((value) << 0) & 0x00000003) 335 #define ALT_SYSMGR_WDDBG_MOD_1_E_CONTINUE 0x0 341 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSECPU0 0x1 347 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSECPU1 0x2 353 #define ALT_SYSMGR_WDDBG_MOD_1_E_PAUSEEITHER 0x3 356 #define ALT_SYSMGR_WDDBG_MOD_1_LSB 2 358 #define ALT_SYSMGR_WDDBG_MOD_1_MSB 3 360 #define ALT_SYSMGR_WDDBG_MOD_1_WIDTH 2 362 #define ALT_SYSMGR_WDDBG_MOD_1_SET_MSK 0x0000000c 364 #define ALT_SYSMGR_WDDBG_MOD_1_CLR_MSK 0xfffffff3 366 #define ALT_SYSMGR_WDDBG_MOD_1_RESET 0x3 368 #define ALT_SYSMGR_WDDBG_MOD_1_GET(value) (((value) & 0x0000000c) >> 2) 370 #define ALT_SYSMGR_WDDBG_MOD_1_SET(value) (((value) << 2) & 0x0000000c) 395 #define ALT_SYSMGR_WDDBG_OFST 0x10 442 #define ALT_SYSMGR_BOOT_BSEL_E_RSVD 0x0 448 #define ALT_SYSMGR_BOOT_BSEL_E_FPGA 0x1 454 #define ALT_SYSMGR_BOOT_BSEL_E_NAND_FLSH_1_8V 0x2 460 #define ALT_SYSMGR_BOOT_BSEL_E_NAND_FLSH_3_0V 0x3 466 #define ALT_SYSMGR_BOOT_BSEL_E_SD_MMC_EXTERNAL_TRANSCEIVER_1_8V 0x4 472 #define ALT_SYSMGR_BOOT_BSEL_E_SD_MMC_INTERNAL_TRANSCEIVER_3_0V 0x5 478 #define ALT_SYSMGR_BOOT_BSEL_E_QSPI_FLSH_1_8V 0x6 484 #define ALT_SYSMGR_BOOT_BSEL_E_QSPI_FLSH_3_0V 0x7 487 #define ALT_SYSMGR_BOOT_BSEL_LSB 0 489 #define ALT_SYSMGR_BOOT_BSEL_MSB 2 491 #define ALT_SYSMGR_BOOT_BSEL_WIDTH 3 493 #define ALT_SYSMGR_BOOT_BSEL_SET_MSK 0x00000007 495 #define ALT_SYSMGR_BOOT_BSEL_CLR_MSK 0xfffffff8 497 #define ALT_SYSMGR_BOOT_BSEL_RESET 0x0 499 #define ALT_SYSMGR_BOOT_BSEL_GET(value) (((value) & 0x00000007) >> 0) 501 #define ALT_SYSMGR_BOOT_BSEL_SET(value) (((value) << 0) & 0x00000007) 546 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_0 0x0 553 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_1 0x1 560 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_2 0x2 567 #define ALT_SYSMGR_BOOT_CSEL_E_CSEL_3 0x3 570 #define ALT_SYSMGR_BOOT_CSEL_LSB 3 572 #define ALT_SYSMGR_BOOT_CSEL_MSB 4 574 #define ALT_SYSMGR_BOOT_CSEL_WIDTH 2 576 #define ALT_SYSMGR_BOOT_CSEL_SET_MSK 0x00000018 578 #define ALT_SYSMGR_BOOT_CSEL_CLR_MSK 0xffffffe7 580 #define ALT_SYSMGR_BOOT_CSEL_RESET 0x0 582 #define ALT_SYSMGR_BOOT_CSEL_GET(value) (((value) & 0x00000018) >> 3) 584 #define ALT_SYSMGR_BOOT_CSEL_SET(value) (((value) << 3) & 0x00000018) 596 #define ALT_SYSMGR_BOOT_PINBSEL_LSB 5 598 #define ALT_SYSMGR_BOOT_PINBSEL_MSB 7 600 #define ALT_SYSMGR_BOOT_PINBSEL_WIDTH 3 602 #define ALT_SYSMGR_BOOT_PINBSEL_SET_MSK 0x000000e0 604 #define ALT_SYSMGR_BOOT_PINBSEL_CLR_MSK 0xffffff1f 606 #define ALT_SYSMGR_BOOT_PINBSEL_RESET 0x0 608 #define ALT_SYSMGR_BOOT_PINBSEL_GET(value) (((value) & 0x000000e0) >> 5) 610 #define ALT_SYSMGR_BOOT_PINBSEL_SET(value) (((value) << 5) & 0x000000e0) 622 #define ALT_SYSMGR_BOOT_PINCSEL_LSB 8 624 #define ALT_SYSMGR_BOOT_PINCSEL_MSB 9 626 #define ALT_SYSMGR_BOOT_PINCSEL_WIDTH 2 628 #define ALT_SYSMGR_BOOT_PINCSEL_SET_MSK 0x00000300 630 #define ALT_SYSMGR_BOOT_PINCSEL_CLR_MSK 0xfffffcff 632 #define ALT_SYSMGR_BOOT_PINCSEL_RESET 0x0 634 #define ALT_SYSMGR_BOOT_PINCSEL_GET(value) (((value) & 0x00000300) >> 8) 636 #define ALT_SYSMGR_BOOT_PINCSEL_SET(value) (((value) << 8) & 0x00000300) 651 const uint32_t bsel : 3;
652 const uint32_t csel : 2;
653 const uint32_t pinbsel : 3;
654 const uint32_t pincsel : 2;
663 #define ALT_SYSMGR_BOOT_OFST 0x14 699 #define ALT_SYSMGR_HPSINFO_DUALCORE_E_SINGLECORE 0x0 705 #define ALT_SYSMGR_HPSINFO_DUALCORE_E_DUALCORE 0x1 708 #define ALT_SYSMGR_HPSINFO_DUALCORE_LSB 0 710 #define ALT_SYSMGR_HPSINFO_DUALCORE_MSB 0 712 #define ALT_SYSMGR_HPSINFO_DUALCORE_WIDTH 1 714 #define ALT_SYSMGR_HPSINFO_DUALCORE_SET_MSK 0x00000001 716 #define ALT_SYSMGR_HPSINFO_DUALCORE_CLR_MSK 0xfffffffe 718 #define ALT_SYSMGR_HPSINFO_DUALCORE_RESET 0x0 720 #define ALT_SYSMGR_HPSINFO_DUALCORE_GET(value) (((value) & 0x00000001) >> 0) 722 #define ALT_SYSMGR_HPSINFO_DUALCORE_SET(value) (((value) << 0) & 0x00000001) 744 #define ALT_SYSMGR_HPSINFO_CAN_E_CAN_UNAVAILABLE 0x0 750 #define ALT_SYSMGR_HPSINFO_CAN_E_CAN_AVAILABLE 0x1 753 #define ALT_SYSMGR_HPSINFO_CAN_LSB 1 755 #define ALT_SYSMGR_HPSINFO_CAN_MSB 1 757 #define ALT_SYSMGR_HPSINFO_CAN_WIDTH 1 759 #define ALT_SYSMGR_HPSINFO_CAN_SET_MSK 0x00000002 761 #define ALT_SYSMGR_HPSINFO_CAN_CLR_MSK 0xfffffffd 763 #define ALT_SYSMGR_HPSINFO_CAN_RESET 0x0 765 #define ALT_SYSMGR_HPSINFO_CAN_GET(value) (((value) & 0x00000002) >> 1) 767 #define ALT_SYSMGR_HPSINFO_CAN_SET(value) (((value) << 1) & 0x00000002) 782 const uint32_t dualcore : 1;
783 const uint32_t can : 1;
792 #define ALT_SYSMGR_HPSINFO_OFST 0x18 836 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_LSB 0 838 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_MSB 0 840 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_WIDTH 1 842 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET_MSK 0x00000001 844 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_CLR_MSK 0xfffffffe 846 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_RESET 0x0 848 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_GET(value) (((value) & 0x00000001) >> 0) 850 #define ALT_SYSMGR_PARITYINJ_DCDATA_0_SET(value) (((value) << 0) & 0x00000001) 862 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_LSB 1 864 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_MSB 1 866 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_WIDTH 1 868 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET_MSK 0x00000002 870 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_CLR_MSK 0xfffffffd 872 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_RESET 0x0 874 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_GET(value) (((value) & 0x00000002) >> 1) 876 #define ALT_SYSMGR_PARITYINJ_DCDATA_1_SET(value) (((value) << 1) & 0x00000002) 888 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_LSB 2 890 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_MSB 2 892 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_WIDTH 1 894 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET_MSK 0x00000004 896 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_CLR_MSK 0xfffffffb 898 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_RESET 0x0 900 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_GET(value) (((value) & 0x00000004) >> 2) 902 #define ALT_SYSMGR_PARITYINJ_DCTAG_0_SET(value) (((value) << 2) & 0x00000004) 914 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_LSB 3 916 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_MSB 3 918 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_WIDTH 1 920 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET_MSK 0x00000008 922 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_CLR_MSK 0xfffffff7 924 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_RESET 0x0 926 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_GET(value) (((value) & 0x00000008) >> 3) 928 #define ALT_SYSMGR_PARITYINJ_DCTAG_1_SET(value) (((value) << 3) & 0x00000008) 940 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_LSB 4 942 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_MSB 4 944 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_WIDTH 1 946 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET_MSK 0x00000010 948 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_CLR_MSK 0xffffffef 950 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_RESET 0x0 952 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_GET(value) (((value) & 0x00000010) >> 4) 954 #define ALT_SYSMGR_PARITYINJ_DCOUTER_0_SET(value) (((value) << 4) & 0x00000010) 966 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_LSB 5 968 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_MSB 5 970 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_WIDTH 1 972 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET_MSK 0x00000020 974 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_CLR_MSK 0xffffffdf 976 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_RESET 0x0 978 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_GET(value) (((value) & 0x00000020) >> 5) 980 #define ALT_SYSMGR_PARITYINJ_DCOUTER_1_SET(value) (((value) << 5) & 0x00000020) 992 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_LSB 6 994 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_MSB 6 996 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_WIDTH 1 998 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET_MSK 0x00000040 1000 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_CLR_MSK 0xffffffbf 1002 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_RESET 0x0 1004 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_GET(value) (((value) & 0x00000040) >> 6) 1006 #define ALT_SYSMGR_PARITYINJ_MAINTLB_0_SET(value) (((value) << 6) & 0x00000040) 1018 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_LSB 7 1020 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_MSB 7 1022 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_WIDTH 1 1024 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET_MSK 0x00000080 1026 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_CLR_MSK 0xffffff7f 1028 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_RESET 0x0 1030 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_GET(value) (((value) & 0x00000080) >> 7) 1032 #define ALT_SYSMGR_PARITYINJ_MAINTLB_1_SET(value) (((value) << 7) & 0x00000080) 1044 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_LSB 8 1046 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_MSB 8 1048 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_WIDTH 1 1050 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET_MSK 0x00000100 1052 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_CLR_MSK 0xfffffeff 1054 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_RESET 0x0 1056 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_GET(value) (((value) & 0x00000100) >> 8) 1058 #define ALT_SYSMGR_PARITYINJ_ICDATA_0_SET(value) (((value) << 8) & 0x00000100) 1070 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_LSB 9 1072 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_MSB 9 1074 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_WIDTH 1 1076 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET_MSK 0x00000200 1078 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_CLR_MSK 0xfffffdff 1080 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_RESET 0x0 1082 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_GET(value) (((value) & 0x00000200) >> 9) 1084 #define ALT_SYSMGR_PARITYINJ_ICDATA_1_SET(value) (((value) << 9) & 0x00000200) 1096 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_LSB 10 1098 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_MSB 10 1100 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_WIDTH 1 1102 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET_MSK 0x00000400 1104 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_CLR_MSK 0xfffffbff 1106 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_RESET 0x0 1108 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_GET(value) (((value) & 0x00000400) >> 10) 1110 #define ALT_SYSMGR_PARITYINJ_ICTAG_0_SET(value) (((value) << 10) & 0x00000400) 1122 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_LSB 11 1124 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_MSB 11 1126 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_WIDTH 1 1128 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET_MSK 0x00000800 1130 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_CLR_MSK 0xfffff7ff 1132 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_RESET 0x0 1134 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_GET(value) (((value) & 0x00000800) >> 11) 1136 #define ALT_SYSMGR_PARITYINJ_ICTAG_1_SET(value) (((value) << 11) & 0x00000800) 1148 #define ALT_SYSMGR_PARITYINJ_GHB_0_LSB 12 1150 #define ALT_SYSMGR_PARITYINJ_GHB_0_MSB 12 1152 #define ALT_SYSMGR_PARITYINJ_GHB_0_WIDTH 1 1154 #define ALT_SYSMGR_PARITYINJ_GHB_0_SET_MSK 0x00001000 1156 #define ALT_SYSMGR_PARITYINJ_GHB_0_CLR_MSK 0xffffefff 1158 #define ALT_SYSMGR_PARITYINJ_GHB_0_RESET 0x0 1160 #define ALT_SYSMGR_PARITYINJ_GHB_0_GET(value) (((value) & 0x00001000) >> 12) 1162 #define ALT_SYSMGR_PARITYINJ_GHB_0_SET(value) (((value) << 12) & 0x00001000) 1174 #define ALT_SYSMGR_PARITYINJ_GHB_1_LSB 13 1176 #define ALT_SYSMGR_PARITYINJ_GHB_1_MSB 13 1178 #define ALT_SYSMGR_PARITYINJ_GHB_1_WIDTH 1 1180 #define ALT_SYSMGR_PARITYINJ_GHB_1_SET_MSK 0x00002000 1182 #define ALT_SYSMGR_PARITYINJ_GHB_1_CLR_MSK 0xffffdfff 1184 #define ALT_SYSMGR_PARITYINJ_GHB_1_RESET 0x0 1186 #define ALT_SYSMGR_PARITYINJ_GHB_1_GET(value) (((value) & 0x00002000) >> 13) 1188 #define ALT_SYSMGR_PARITYINJ_GHB_1_SET(value) (((value) << 13) & 0x00002000) 1200 #define ALT_SYSMGR_PARITYINJ_BTAC_0_LSB 14 1202 #define ALT_SYSMGR_PARITYINJ_BTAC_0_MSB 14 1204 #define ALT_SYSMGR_PARITYINJ_BTAC_0_WIDTH 1 1206 #define ALT_SYSMGR_PARITYINJ_BTAC_0_SET_MSK 0x00004000 1208 #define ALT_SYSMGR_PARITYINJ_BTAC_0_CLR_MSK 0xffffbfff 1210 #define ALT_SYSMGR_PARITYINJ_BTAC_0_RESET 0x0 1212 #define ALT_SYSMGR_PARITYINJ_BTAC_0_GET(value) (((value) & 0x00004000) >> 14) 1214 #define ALT_SYSMGR_PARITYINJ_BTAC_0_SET(value) (((value) << 14) & 0x00004000) 1226 #define ALT_SYSMGR_PARITYINJ_BTAC_1_LSB 15 1228 #define ALT_SYSMGR_PARITYINJ_BTAC_1_MSB 15 1230 #define ALT_SYSMGR_PARITYINJ_BTAC_1_WIDTH 1 1232 #define ALT_SYSMGR_PARITYINJ_BTAC_1_SET_MSK 0x00008000 1234 #define ALT_SYSMGR_PARITYINJ_BTAC_1_CLR_MSK 0xffff7fff 1236 #define ALT_SYSMGR_PARITYINJ_BTAC_1_RESET 0x0 1238 #define ALT_SYSMGR_PARITYINJ_BTAC_1_GET(value) (((value) & 0x00008000) >> 15) 1240 #define ALT_SYSMGR_PARITYINJ_BTAC_1_SET(value) (((value) << 15) & 0x00008000) 1242 #ifndef __ASSEMBLY__ 1255 uint32_t dcdata_0 : 1;
1256 uint32_t dcdata_1 : 1;
1257 uint32_t dctag_0 : 1;
1258 uint32_t dctag_1 : 1;
1259 uint32_t dcouter_0 : 1;
1260 uint32_t dcouter_1 : 1;
1261 uint32_t maintlb_0 : 1;
1262 uint32_t maintlb_1 : 1;
1263 uint32_t icdata_0 : 1;
1264 uint32_t icdata_1 : 1;
1265 uint32_t ictag_0 : 1;
1266 uint32_t ictag_1 : 1;
1269 uint32_t btac_0 : 1;
1270 uint32_t btac_1 : 1;
1279 #define ALT_SYSMGR_PARITYINJ_OFST 0x1c 1335 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_E_DIS 0x0 1345 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_E_EN 0x1 1348 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_LSB 0 1350 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_MSB 0 1352 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_WIDTH 1 1354 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_SET_MSK 0x00000001 1356 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_CLR_MSK 0xfffffffe 1358 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_RESET 0x1 1360 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_GET(value) (((value) & 0x00000001) >> 0) 1362 #define ALT_SYSMGR_FPGAINTF_GBL_INTF_SET(value) (((value) << 0) & 0x00000001) 1364 #ifndef __ASSEMBLY__ 1386 #define ALT_SYSMGR_FPGAINTF_GBL_OFST 0x0 1435 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_E_DIS 0x0 1441 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_E_EN 0x1 1444 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_LSB 0 1446 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_MSB 0 1448 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_WIDTH 1 1450 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_SET_MSK 0x00000001 1452 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_CLR_MSK 0xfffffffe 1454 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_RESET 0x1 1456 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_GET(value) (((value) & 0x00000001) >> 0) 1458 #define ALT_SYSMGR_FPGAINTF_INDIV_RSTREQINTF_SET(value) (((value) << 0) & 0x00000001) 1484 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_E_DIS 0x0 1491 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_E_EN 0x1 1494 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_LSB 1 1496 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_MSB 1 1498 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_WIDTH 1 1500 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_SET_MSK 0x00000002 1502 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_CLR_MSK 0xfffffffd 1504 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_RESET 0x1 1506 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_GET(value) (((value) & 0x00000002) >> 1) 1508 #define ALT_SYSMGR_FPGAINTF_INDIV_JTAGENINTF_SET(value) (((value) << 1) & 0x00000002) 1540 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_E_DIS 0x0 1547 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_E_EN 0x1 1550 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_LSB 2 1552 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_MSB 2 1554 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_WIDTH 1 1556 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_SET_MSK 0x00000004 1558 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_CLR_MSK 0xfffffffb 1560 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_RESET 0x1 1562 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_GET(value) (((value) & 0x00000004) >> 2) 1564 #define ALT_SYSMGR_FPGAINTF_INDIV_CFGIOINTF_SET(value) (((value) << 2) & 0x00000004) 1595 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_E_DIS 0x0 1602 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_E_EN 0x1 1605 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_LSB 3 1607 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_MSB 3 1609 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_WIDTH 1 1611 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_SET_MSK 0x00000008 1613 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_CLR_MSK 0xfffffff7 1615 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_RESET 0x1 1617 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_GET(value) (((value) & 0x00000008) >> 3) 1619 #define ALT_SYSMGR_FPGAINTF_INDIV_BSCANINTF_SET(value) (((value) << 3) & 0x00000008) 1646 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_E_DIS 0x0 1653 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_E_EN 0x1 1656 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_LSB 4 1658 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_MSB 4 1660 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_WIDTH 1 1662 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_SET_MSK 0x00000010 1664 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_CLR_MSK 0xffffffef 1666 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_RESET 0x1 1668 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_GET(value) (((value) & 0x00000010) >> 4) 1670 #define ALT_SYSMGR_FPGAINTF_INDIV_TRACEINTF_SET(value) (((value) << 4) & 0x00000010) 1696 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_E_DIS 0x0 1703 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_E_EN 0x1 1706 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_LSB 6 1708 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_MSB 6 1710 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_WIDTH 1 1712 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_SET_MSK 0x00000040 1714 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_CLR_MSK 0xffffffbf 1716 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_RESET 0x1 1718 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_GET(value) (((value) & 0x00000040) >> 6) 1720 #define ALT_SYSMGR_FPGAINTF_INDIV_STMEVENTINTF_SET(value) (((value) << 6) & 0x00000040) 1744 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_E_DIS 0x0 1750 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_E_EN 0x1 1753 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_LSB 7 1755 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_MSB 7 1757 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_WIDTH 1 1759 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_SET_MSK 0x00000080 1761 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_CLR_MSK 0xffffff7f 1763 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_RESET 0x1 1765 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_GET(value) (((value) & 0x00000080) >> 7) 1767 #define ALT_SYSMGR_FPGAINTF_INDIV_CROSSTRIGINTF_SET(value) (((value) << 7) & 0x00000080) 1769 #ifndef __ASSEMBLY__ 1782 uint32_t rstreqintf : 1;
1783 uint32_t jtagenintf : 1;
1784 uint32_t configiointf : 1;
1785 uint32_t bscanintf : 1;
1786 uint32_t traceintf : 1;
1788 uint32_t stmeventintf : 1;
1789 uint32_t crosstrigintf : 1;
1798 #define ALT_SYSMGR_FPGAINTF_INDIV_OFST 0x4 1840 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_E_DIS 0x0 1846 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_E_EN 0x1 1849 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_LSB 2 1851 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_MSB 2 1853 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_WIDTH 1 1855 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_SET_MSK 0x00000004 1857 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_CLR_MSK 0xfffffffb 1859 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_RESET 0x0 1861 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_GET(value) (((value) & 0x00000004) >> 2) 1863 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_0_SET(value) (((value) << 2) & 0x00000004) 1890 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_E_DIS 0x0 1896 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_E_EN 0x1 1899 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_LSB 3 1901 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_MSB 3 1903 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_WIDTH 1 1905 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_SET_MSK 0x00000008 1907 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_CLR_MSK 0xfffffff7 1909 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_RESET 0x0 1911 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_GET(value) (((value) & 0x00000008) >> 3) 1913 #define ALT_SYSMGR_FPGAINTF_MODULE_EMAC_1_SET(value) (((value) << 3) & 0x00000008) 1915 #ifndef __ASSEMBLY__ 1929 uint32_t emac_0 : 1;
1930 uint32_t emac_1 : 1;
1939 #define ALT_SYSMGR_FPGAINTF_MODULE_OFST 0x8 1941 #ifndef __ASSEMBLY__ 1954 volatile ALT_SYSMGR_FPGAINTF_GBL_t gbl;
1955 volatile ALT_SYSMGR_FPGAINTF_INDIV_t indiv;
1956 volatile ALT_SYSMGR_FPGAINTF_MODULE_t module;
1957 volatile uint32_t _pad_0xc_0x10;
1965 volatile uint32_t gbl;
1966 volatile uint32_t indiv;
1967 volatile uint32_t module;
1968 volatile uint32_t _pad_0xc_0x10;
2020 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_E_FPGAPINS 0x0 2026 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_E_SCANMGR 0x1 2029 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_LSB 0 2031 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_MSB 0 2033 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_WIDTH 1 2035 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_SET_MSK 0x00000001 2037 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_CLR_MSK 0xfffffffe 2039 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_RESET 0x0 2041 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_GET(value) (((value) & 0x00000001) >> 0) 2043 #define ALT_SYSMGR_SCANMGR_CTL_FPGAJTAGEN_SET(value) (((value) << 0) & 0x00000001) 2045 #ifndef __ASSEMBLY__ 2058 uint32_t fpgajtagen : 1;
2067 #define ALT_SYSMGR_SCANMGR_CTL_OFST 0x0 2069 #ifndef __ASSEMBLY__ 2082 volatile ALT_SYSMGR_SCANMGR_CTL_t ctrl;
2090 volatile uint32_t ctrl;
2163 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_E_DIS 0x0 2170 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_E_CFG 0x1 2173 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_LSB 0 2175 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_MSB 0 2177 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_WIDTH 1 2179 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_SET_MSK 0x00000001 2181 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_CLR_MSK 0xfffffffe 2183 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_RESET 0x0 2185 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_GET(value) (((value) & 0x00000001) >> 0) 2187 #define ALT_SYSMGR_FRZCTL_VIOCTL_CFG_SET(value) (((value) << 0) & 0x00000001) 2209 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_E_DIS 0x0 2215 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_E_CFG 0x1 2218 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_LSB 1 2220 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_MSB 1 2222 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_WIDTH 1 2224 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_SET_MSK 0x00000002 2226 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_CLR_MSK 0xfffffffd 2228 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_RESET 0x0 2230 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_GET(value) (((value) & 0x00000002) >> 1) 2232 #define ALT_SYSMGR_FRZCTL_VIOCTL_BUSHOLD_SET(value) (((value) << 1) & 0x00000002) 2254 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_E_EN 0x0 2260 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_E_CFG 0x1 2263 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_LSB 2 2265 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_MSB 2 2267 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_WIDTH 1 2269 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_SET_MSK 0x00000004 2271 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_CLR_MSK 0xfffffffb 2273 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_RESET 0x0 2275 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_GET(value) (((value) & 0x00000004) >> 2) 2277 #define ALT_SYSMGR_FRZCTL_VIOCTL_TRISTATE_SET(value) (((value) << 2) & 0x00000004) 2300 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_E_EN 0x0 2306 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_E_CFG 0x1 2309 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_LSB 3 2311 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_MSB 3 2313 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_WIDTH 1 2315 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_SET_MSK 0x00000008 2317 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_CLR_MSK 0xfffffff7 2319 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_RESET 0x0 2321 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_GET(value) (((value) & 0x00000008) >> 3) 2323 #define ALT_SYSMGR_FRZCTL_VIOCTL_WKPULLUP_SET(value) (((value) << 3) & 0x00000008) 2345 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_E_SLOW 0x0 2351 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_E_CFG 0x1 2354 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_LSB 4 2356 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_MSB 4 2358 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_WIDTH 1 2360 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_SET_MSK 0x00000010 2362 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_CLR_MSK 0xffffffef 2364 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_RESET 0x0 2366 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_GET(value) (((value) & 0x00000010) >> 4) 2368 #define ALT_SYSMGR_FRZCTL_VIOCTL_SLEW_SET(value) (((value) << 4) & 0x00000010) 2370 #ifndef __ASSEMBLY__ 2384 uint32_t bushold : 1;
2385 uint32_t tristate : 1;
2386 uint32_t wkpullup : 1;
2396 #define ALT_SYSMGR_FRZCTL_VIOCTL_OFST 0x0 2449 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_E_DIS 0x0 2456 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_E_CFG 0x1 2459 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_LSB 0 2461 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_MSB 0 2463 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_WIDTH 1 2465 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_SET_MSK 0x00000001 2467 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_CLR_MSK 0xfffffffe 2469 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_RESET 0x0 2471 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_GET(value) (((value) & 0x00000001) >> 0) 2473 #define ALT_SYSMGR_FRZCTL_HIOCTL_CFG_SET(value) (((value) << 0) & 0x00000001) 2495 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_E_DIS 0x0 2501 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_E_CFG 0x1 2504 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_LSB 1 2506 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_MSB 1 2508 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_WIDTH 1 2510 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_SET_MSK 0x00000002 2512 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_CLR_MSK 0xfffffffd 2514 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_RESET 0x0 2516 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_GET(value) (((value) & 0x00000002) >> 1) 2518 #define ALT_SYSMGR_FRZCTL_HIOCTL_BUSHOLD_SET(value) (((value) << 1) & 0x00000002) 2540 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_E_EN 0x0 2546 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_E_CFG 0x1 2549 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_LSB 2 2551 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_MSB 2 2553 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_WIDTH 1 2555 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_SET_MSK 0x00000004 2557 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_CLR_MSK 0xfffffffb 2559 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_RESET 0x0 2561 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_GET(value) (((value) & 0x00000004) >> 2) 2563 #define ALT_SYSMGR_FRZCTL_HIOCTL_TRISTATE_SET(value) (((value) << 2) & 0x00000004) 2586 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_E_EN 0x0 2592 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_E_CFG 0x1 2595 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_LSB 3 2597 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_MSB 3 2599 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_WIDTH 1 2601 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_SET_MSK 0x00000008 2603 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_CLR_MSK 0xfffffff7 2605 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_RESET 0x0 2607 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_GET(value) (((value) & 0x00000008) >> 3) 2609 #define ALT_SYSMGR_FRZCTL_HIOCTL_WKPULLUP_SET(value) (((value) << 3) & 0x00000008) 2631 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_E_SLOW 0x0 2637 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_E_CFG 0x1 2640 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_LSB 4 2642 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_MSB 4 2644 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_WIDTH 1 2646 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_SET_MSK 0x00000010 2648 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_CLR_MSK 0xffffffef 2650 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_RESET 0x0 2652 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_GET(value) (((value) & 0x00000010) >> 4) 2654 #define ALT_SYSMGR_FRZCTL_HIOCTL_SLEW_SET(value) (((value) << 4) & 0x00000010) 2677 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_E_DIS 0x0 2683 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_E_EN 0x1 2686 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_LSB 5 2688 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_MSB 5 2690 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_WIDTH 1 2692 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_SET_MSK 0x00000020 2694 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_CLR_MSK 0xffffffdf 2696 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_RESET 0x1 2698 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_GET(value) (((value) & 0x00000020) >> 5) 2700 #define ALT_SYSMGR_FRZCTL_HIOCTL_DLLRST_SET(value) (((value) << 5) & 0x00000020) 2722 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_E_DIS 0x0 2728 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_E_EN 0x1 2731 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_LSB 6 2733 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_MSB 6 2735 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_WIDTH 1 2737 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_SET_MSK 0x00000040 2739 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_CLR_MSK 0xffffffbf 2741 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_RESET 0x1 2743 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_GET(value) (((value) & 0x00000040) >> 6) 2745 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCTRST_SET(value) (((value) << 6) & 0x00000040) 2767 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_E_DIS 0x0 2773 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_E_EN 0x1 2776 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_LSB 7 2778 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_MSB 7 2780 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_WIDTH 1 2782 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_SET_MSK 0x00000080 2784 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_CLR_MSK 0xffffff7f 2786 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_RESET 0x1 2788 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_GET(value) (((value) & 0x00000080) >> 7) 2790 #define ALT_SYSMGR_FRZCTL_HIOCTL_REGRST_SET(value) (((value) << 7) & 0x00000080) 2814 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_E_DIS 0x0 2821 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_E_EN 0x1 2824 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_LSB 8 2826 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_MSB 8 2828 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_WIDTH 1 2830 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_SET_MSK 0x00000100 2832 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_CLR_MSK 0xfffffeff 2834 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_RESET 0x0 2836 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_GET(value) (((value) & 0x00000100) >> 8) 2838 #define ALT_SYSMGR_FRZCTL_HIOCTL_OCT_CFGEN_CALSTART_SET(value) (((value) << 8) & 0x00000100) 2840 #ifndef __ASSEMBLY__ 2854 uint32_t bushold : 1;
2855 uint32_t tristate : 1;
2856 uint32_t wkpullup : 1;
2858 uint32_t dllrst : 1;
2859 uint32_t octrst : 1;
2860 uint32_t regrst : 1;
2861 uint32_t oct_cfgen_calstart : 1;
2870 #define ALT_SYSMGR_FRZCTL_HIOCTL_OFST 0x10 2917 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_E_SW 0x0 2925 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_E_HW 0x1 2928 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_LSB 0 2930 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_MSB 0 2932 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_WIDTH 1 2934 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_SET_MSK 0x00000001 2936 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_CLR_MSK 0xfffffffe 2938 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_RESET 0x0 2940 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_GET(value) (((value) & 0x00000001) >> 0) 2942 #define ALT_SYSMGR_FRZCTL_SRC_VIO1_SET(value) (((value) << 0) & 0x00000001) 2944 #ifndef __ASSEMBLY__ 2966 #define ALT_SYSMGR_FRZCTL_SRC_OFST 0x14 3014 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_E_REQTHAW 0x0 3020 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_E_REQFRZ 0x1 3023 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_LSB 0 3025 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_MSB 0 3027 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_WIDTH 1 3029 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_SET_MSK 0x00000001 3031 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_CLR_MSK 0xfffffffe 3033 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_RESET 0x1 3035 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_GET(value) (((value) & 0x00000001) >> 0) 3037 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1REQ_SET(value) (((value) << 0) & 0x00000001) 3070 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_THAWED2FROZEN 0x0 3077 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_THAWED 0x1 3085 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_FROZEN 0x2 3091 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_E_FROZEN2THAWED 0x3 3094 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_LSB 1 3096 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_MSB 2 3098 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_WIDTH 2 3100 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_SET_MSK 0x00000006 3102 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_CLR_MSK 0xfffffff9 3104 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_RESET 0x2 3106 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_GET(value) (((value) & 0x00000006) >> 1) 3108 #define ALT_SYSMGR_FRZCTL_HWCTL_VIO1STATE_SET(value) (((value) << 1) & 0x00000006) 3110 #ifndef __ASSEMBLY__ 3123 uint32_t vio1req : 1;
3124 const uint32_t vio1state : 2;
3133 #define ALT_SYSMGR_FRZCTL_HWCTL_OFST 0x18 3135 #ifndef __ASSEMBLY__ 3148 volatile ALT_SYSMGR_FRZCTL_VIOCTL_t vioctrl[3];
3149 volatile uint32_t _pad_0xc_0xf;
3150 volatile ALT_SYSMGR_FRZCTL_HIOCTL_t hioctrl;
3151 volatile ALT_SYSMGR_FRZCTL_SRC_t src;
3152 volatile ALT_SYSMGR_FRZCTL_HWCTL_t hwctrl;
3153 volatile uint32_t _pad_0x1c_0x20;
3161 volatile uint32_t vioctrl[3];
3162 volatile uint32_t _pad_0xc_0xf;
3163 volatile uint32_t hioctrl;
3164 volatile uint32_t src;
3165 volatile uint32_t hwctrl;
3166 volatile uint32_t _pad_0x1c_0x20;
3220 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_GMII_MII 0x0 3226 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_RGMII 0x1 3232 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_E_RMII 0x2 3235 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_LSB 0 3237 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_MSB 1 3239 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_WIDTH 2 3241 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_SET_MSK 0x00000003 3243 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_CLR_MSK 0xfffffffc 3245 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_RESET 0x2 3247 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_GET(value) (((value) & 0x00000003) >> 0) 3249 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_0_SET(value) (((value) << 0) & 0x00000003) 3274 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_GMII_MII 0x0 3280 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_RGMII 0x1 3286 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_E_RMII 0x2 3289 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_LSB 2 3291 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_MSB 3 3293 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_WIDTH 2 3295 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_SET_MSK 0x0000000c 3297 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_CLR_MSK 0xfffffff3 3299 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_RESET 0x2 3301 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_GET(value) (((value) & 0x0000000c) >> 2) 3303 #define ALT_SYSMGR_EMAC_CTL_PHYSEL_1_SET(value) (((value) << 2) & 0x0000000c) 3327 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_E_OSC1_CLK 0x0 3333 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_E_FPGA_PTP_REF_CLK 0x1 3336 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_LSB 4 3338 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_MSB 4 3340 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_WIDTH 1 3342 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_SET_MSK 0x00000010 3344 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_CLR_MSK 0xffffffef 3346 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_RESET 0x0 3348 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_GET(value) (((value) & 0x00000010) >> 4) 3350 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_0_SET(value) (((value) << 4) & 0x00000010) 3374 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_E_OSC1_CLK 0x0 3380 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_E_FPGA_PTP_REF_CLK 0x1 3383 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_LSB 5 3385 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_MSB 5 3387 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_WIDTH 1 3389 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_SET_MSK 0x00000020 3391 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_CLR_MSK 0xffffffdf 3393 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_RESET 0x0 3395 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_GET(value) (((value) & 0x00000020) >> 5) 3397 #define ALT_SYSMGR_EMAC_CTL_PTPCLKSEL_1_SET(value) (((value) << 5) & 0x00000020) 3399 #ifndef __ASSEMBLY__ 3412 uint32_t physel_0 : 2;
3413 uint32_t physel_1 : 2;
3414 uint32_t ptpclksel_0 : 1;
3415 uint32_t ptpclksel_1 : 1;
3424 #define ALT_SYSMGR_EMAC_CTL_OFST 0x0 3487 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_NONCACHE_NONBUFF 0x0 3493 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_BUFF 0x1 3499 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_NONALLOC 0x2 3505 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_BUFF_NONALLOC 0x3 3511 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD1 0x4 3517 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD2 0x5 3523 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6 3529 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7 3535 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD3 0x8 3541 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD4 0x9 3547 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa 3553 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb 3559 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD5 0xc 3565 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_RSVD6 0xd 3571 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe 3577 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_E_CACHE_WRBACK_ALLOC 0xf 3580 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_LSB 0 3582 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_MSB 3 3584 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_WIDTH 4 3586 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_SET_MSK 0x0000000f 3588 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_CLR_MSK 0xfffffff0 3590 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_RESET 0x0 3592 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_GET(value) (((value) & 0x0000000f) >> 0) 3594 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_0_SET(value) (((value) << 0) & 0x0000000f) 3635 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_NONCACHE_NONBUFF 0x0 3641 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_BUFF 0x1 3647 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_NONALLOC 0x2 3653 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_BUFF_NONALLOC 0x3 3659 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD1 0x4 3665 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD2 0x5 3671 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_RDALLOC 0x6 3677 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_RDALLOC 0x7 3683 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD3 0x8 3689 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD4 0x9 3695 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_WRALLOC 0xa 3701 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_WRALLOC 0xb 3707 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD5 0xc 3713 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_RSVD6 0xd 3719 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRTHRU_ALLOC 0xe 3725 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_E_CACHE_WRBACK_ALLOC 0xf 3728 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_LSB 4 3730 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_MSB 7 3732 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_WIDTH 4 3734 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_SET_MSK 0x000000f0 3736 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_CLR_MSK 0xffffff0f 3738 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_RESET 0x0 3740 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_GET(value) (((value) & 0x000000f0) >> 4) 3742 #define ALT_SYSMGR_EMAC_L3MST_ARCACHE_1_SET(value) (((value) << 4) & 0x000000f0) 3783 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_NONCACHE_NONBUFF 0x0 3789 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_BUFF 0x1 3795 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_NONALLOC 0x2 3801 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_BUFF_NONALLOC 0x3 3807 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD1 0x4 3813 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD2 0x5 3819 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6 3825 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7 3831 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD3 0x8 3837 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD4 0x9 3843 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa 3849 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb 3855 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD5 0xc 3861 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_RSVD6 0xd 3867 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe 3873 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_E_CACHE_WRBACK_ALLOC 0xf 3876 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_LSB 8 3878 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_MSB 11 3880 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_WIDTH 4 3882 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_SET_MSK 0x00000f00 3884 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_CLR_MSK 0xfffff0ff 3886 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_RESET 0x0 3888 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_GET(value) (((value) & 0x00000f00) >> 8) 3890 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_0_SET(value) (((value) << 8) & 0x00000f00) 3931 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_NONCACHE_NONBUFF 0x0 3937 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_BUFF 0x1 3943 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_NONALLOC 0x2 3949 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_BUFF_NONALLOC 0x3 3955 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD1 0x4 3961 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD2 0x5 3967 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_RDALLOC 0x6 3973 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_RDALLOC 0x7 3979 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD3 0x8 3985 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD4 0x9 3991 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_WRALLOC 0xa 3997 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_WRALLOC 0xb 4003 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD5 0xc 4009 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_RSVD6 0xd 4015 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRTHRU_ALLOC 0xe 4021 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_E_CACHE_WRBACK_ALLOC 0xf 4024 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_LSB 12 4026 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_MSB 15 4028 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_WIDTH 4 4030 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_SET_MSK 0x0000f000 4032 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_CLR_MSK 0xffff0fff 4034 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_RESET 0x0 4036 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_GET(value) (((value) & 0x0000f000) >> 12) 4038 #define ALT_SYSMGR_EMAC_L3MST_AWCACHE_1_SET(value) (((value) << 12) & 0x0000f000) 4040 #ifndef __ASSEMBLY__ 4053 uint32_t arcache_0 : 4;
4054 uint32_t arcache_1 : 4;
4055 uint32_t awcache_0 : 4;
4056 uint32_t awcache_1 : 4;
4065 #define ALT_SYSMGR_EMAC_L3MST_OFST 0x4 4067 #ifndef __ASSEMBLY__ 4080 volatile ALT_SYSMGR_EMAC_CTL_t ctrl;
4081 volatile ALT_SYSMGR_EMAC_L3MST_t l3master;
4082 volatile uint32_t _pad_0x8_0x10[2];
4090 volatile uint32_t ctrl;
4091 volatile uint32_t l3master;
4092 volatile uint32_t _pad_0x8_0x10[2];
4153 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_E_FPGA 0x0 4159 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_E_CAN 0x1 4162 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_LSB 0 4164 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_MSB 0 4166 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_WIDTH 1 4168 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_SET_MSK 0x00000001 4170 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_CLR_MSK 0xfffffffe 4172 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_RESET 0x0 4174 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_GET(value) (((value) & 0x00000001) >> 0) 4176 #define ALT_SYSMGR_DMA_CTL_CHANSEL_0_SET(value) (((value) << 0) & 0x00000001) 4200 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_E_FPGA 0x0 4206 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_E_CAN 0x1 4209 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_LSB 1 4211 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_MSB 1 4213 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_WIDTH 1 4215 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_SET_MSK 0x00000002 4217 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_CLR_MSK 0xfffffffd 4219 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_RESET 0x0 4221 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_GET(value) (((value) & 0x00000002) >> 1) 4223 #define ALT_SYSMGR_DMA_CTL_CHANSEL_1_SET(value) (((value) << 1) & 0x00000002) 4247 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_E_FPGA 0x0 4253 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_E_CAN 0x1 4256 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_LSB 2 4258 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_MSB 2 4260 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_WIDTH 1 4262 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_SET_MSK 0x00000004 4264 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_CLR_MSK 0xfffffffb 4266 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_RESET 0x0 4268 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_GET(value) (((value) & 0x00000004) >> 2) 4270 #define ALT_SYSMGR_DMA_CTL_CHANSEL_2_SET(value) (((value) << 2) & 0x00000004) 4294 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_E_FPGA 0x0 4300 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_E_CAN 0x1 4303 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_LSB 3 4305 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_MSB 3 4307 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_WIDTH 1 4309 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_SET_MSK 0x00000008 4311 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_CLR_MSK 0xfffffff7 4313 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_RESET 0x0 4315 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_GET(value) (((value) & 0x00000008) >> 3) 4317 #define ALT_SYSMGR_DMA_CTL_CHANSEL_3_SET(value) (((value) << 3) & 0x00000008) 4334 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_LSB 4 4336 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_MSB 4 4338 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_WIDTH 1 4340 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_SET_MSK 0x00000010 4342 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_CLR_MSK 0xffffffef 4344 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_RESET 0x0 4346 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_GET(value) (((value) & 0x00000010) >> 4) 4348 #define ALT_SYSMGR_DMA_CTL_MGRNONSECURE_SET(value) (((value) << 4) & 0x00000010) 4364 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_LSB 5 4366 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_MSB 12 4368 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_WIDTH 8 4370 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_SET_MSK 0x00001fe0 4372 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_CLR_MSK 0xffffe01f 4374 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_RESET 0x0 4376 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_GET(value) (((value) & 0x00001fe0) >> 5) 4378 #define ALT_SYSMGR_DMA_CTL_IRQNONSECURE_SET(value) (((value) << 5) & 0x00001fe0) 4380 #ifndef __ASSEMBLY__ 4393 uint32_t chansel_0 : 1;
4394 uint32_t chansel_1 : 1;
4395 uint32_t chansel_2 : 1;
4396 uint32_t chansel_3 : 1;
4397 uint32_t mgrnonsecure : 1;
4398 uint32_t irqnonsecure : 8;
4407 #define ALT_SYSMGR_DMA_CTL_OFST 0x0 4441 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_LSB 0 4443 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_MSB 31 4445 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_WIDTH 32 4447 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_SET_MSK 0xffffffff 4449 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_CLR_MSK 0x00000000 4451 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_RESET 0x0 4453 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_GET(value) (((value) & 0xffffffff) >> 0) 4455 #define ALT_SYSMGR_DMA_PERSECURITY_NONSECURE_SET(value) (((value) << 0) & 0xffffffff) 4457 #ifndef __ASSEMBLY__ 4470 uint32_t nonsecure : 32;
4478 #define ALT_SYSMGR_DMA_PERSECURITY_OFST 0x4 4480 #ifndef __ASSEMBLY__ 4493 volatile ALT_SYSMGR_DMA_CTL_t ctrl;
4494 volatile ALT_SYSMGR_DMA_PERSECURITY_t persecurity;
4502 volatile uint32_t ctrl;
4503 volatile uint32_t persecurity;
4543 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_LSB 0 4545 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_MSB 31 4547 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_WIDTH 32 4549 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_SET_MSK 0xffffffff 4551 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_CLR_MSK 0x00000000 4553 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_RESET 0x0 4555 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_GET(value) (((value) & 0xffffffff) >> 0) 4557 #define ALT_SYSMGR_ISW_HANDOFF_VALUE_SET(value) (((value) << 0) & 0xffffffff) 4559 #ifndef __ASSEMBLY__ 4572 uint32_t value : 32;
4580 #define ALT_SYSMGR_ISW_HANDOFF_OFST 0x0 4582 #ifndef __ASSEMBLY__ 4595 volatile ALT_SYSMGR_ISW_HANDOFF_t handoff[8];
4603 volatile uint32_t handoff[8];
4659 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_E_DISD 0x0 4665 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_E_END 0x1 4668 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_LSB 0 4670 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_MSB 0 4672 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_WIDTH 1 4674 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_SET_MSK 0x00000001 4676 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_CLR_MSK 0xfffffffe 4678 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_RESET 0x0 4680 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_GET(value) (((value) & 0x00000001) >> 0) 4682 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGPINMUX_SET(value) (((value) << 0) & 0x00000001) 4710 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_E_DISD 0x0 4716 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_E_END 0x1 4719 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_LSB 1 4721 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_MSB 1 4723 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_WIDTH 1 4725 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_SET_MSK 0x00000002 4727 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_CLR_MSK 0xfffffffd 4729 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_RESET 0x0 4731 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_GET(value) (((value) & 0x00000002) >> 1) 4733 #define ALT_SYSMGR_ROMCODE_CTL_WARMRSTCFGIO_SET(value) (((value) << 1) & 0x00000002) 4735 #ifndef __ASSEMBLY__ 4748 uint32_t warmrstcfgpinmux : 1;
4749 uint32_t warmrstcfgio : 1;
4758 #define ALT_SYSMGR_ROMCODE_CTL_OFST 0x0 4784 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_LSB 0 4786 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_MSB 31 4788 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_WIDTH 32 4790 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET_MSK 0xffffffff 4792 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_CLR_MSK 0x00000000 4794 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_RESET 0x0 4796 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_GET(value) (((value) & 0xffffffff) >> 0) 4798 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET(value) (((value) << 0) & 0xffffffff) 4800 #ifndef __ASSEMBLY__ 4813 uint32_t value : 32;
4821 #define ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST 0x4 4855 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_E_INVALID 0x0 4860 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_E_VALID 0x49535756 4863 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_LSB 0 4865 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_MSB 31 4867 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_WIDTH 32 4869 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_SET_MSK 0xffffffff 4871 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_CLR_MSK 0x00000000 4873 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_RESET 0x0 4875 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_GET(value) (((value) & 0xffffffff) >> 0) 4877 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_VALUE_SET(value) (((value) << 0) & 0xffffffff) 4879 #ifndef __ASSEMBLY__ 4892 uint32_t value : 32;
4900 #define ALT_SYSMGR_ROMCODE_INITSWSTATE_OFST 0x8 4925 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_LSB 0 4927 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_MSB 1 4929 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_WIDTH 2 4931 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_SET_MSK 0x00000003 4933 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_CLR_MSK 0xfffffffc 4935 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_RESET 0x0 4937 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_GET(value) (((value) & 0x00000003) >> 0) 4939 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_INDEX_SET(value) (((value) << 0) & 0x00000003) 4941 #ifndef __ASSEMBLY__ 4963 #define ALT_SYSMGR_ROMCODE_INITSWLASTLD_OFST 0xc 4987 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_LSB 0 4989 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_MSB 31 4991 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_WIDTH 32 4993 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_SET_MSK 0xffffffff 4995 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_CLR_MSK 0x00000000 4997 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_RESET 0x0 4999 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_GET(value) (((value) & 0xffffffff) >> 0) 5001 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_VALUE_SET(value) (((value) << 0) & 0xffffffff) 5003 #ifndef __ASSEMBLY__ 5016 uint32_t value : 32;
5024 #define ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_OFST 0x10 5073 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_E_DISD 0x0 5079 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_E_END 0xae9efebc 5082 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_LSB 0 5084 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_MSB 31 5086 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_WIDTH 32 5088 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_SET_MSK 0xffffffff 5090 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_CLR_MSK 0x00000000 5092 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_RESET 0x0 5094 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_GET(value) (((value) & 0xffffffff) >> 0) 5096 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_MAGIC_SET(value) (((value) << 0) & 0xffffffff) 5098 #ifndef __ASSEMBLY__ 5111 uint32_t magic : 32;
5119 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_OFST 0x0 5121 #define ALT_SYSMGR_ROMCODE_WARMRAM_EN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_EN_OFST)) 5148 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_LSB 0 5150 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_MSB 15 5152 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_WIDTH 16 5154 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_SET_MSK 0x0000ffff 5156 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_CLR_MSK 0xffff0000 5158 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_RESET 0x0 5160 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_GET(value) (((value) & 0x0000ffff) >> 0) 5162 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFFSET_SET(value) (((value) << 0) & 0x0000ffff) 5164 #ifndef __ASSEMBLY__ 5177 uint32_t offset : 16;
5186 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFST 0x4 5188 #define ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_OFST)) 5223 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_LSB 0 5225 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_MSB 15 5227 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_WIDTH 16 5229 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_SET_MSK 0x0000ffff 5231 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_CLR_MSK 0xffff0000 5233 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_RESET 0x0 5235 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_GET(value) (((value) & 0x0000ffff) >> 0) 5237 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_SIZE_SET(value) (((value) << 0) & 0x0000ffff) 5239 #ifndef __ASSEMBLY__ 5261 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_OFST 0x8 5263 #define ALT_SYSMGR_ROMCODE_WARMRAM_LEN_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_LEN_OFST)) 5290 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_LSB 0 5292 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_MSB 15 5294 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_WIDTH 16 5296 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_SET_MSK 0x0000ffff 5298 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_CLR_MSK 0xffff0000 5300 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_RESET 0x0 5302 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_GET(value) (((value) & 0x0000ffff) >> 0) 5304 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFFSET_SET(value) (((value) << 0) & 0x0000ffff) 5306 #ifndef __ASSEMBLY__ 5319 uint32_t offset : 16;
5328 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFST 0xc 5330 #define ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_OFST)) 5368 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_LSB 0 5370 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_MSB 31 5372 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_WIDTH 32 5374 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_SET_MSK 0xffffffff 5376 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_CLR_MSK 0x00000000 5378 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_RESET 0xe763552a 5380 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_GET(value) (((value) & 0xffffffff) >> 0) 5382 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_EXPECTED_SET(value) (((value) << 0) & 0xffffffff) 5384 #ifndef __ASSEMBLY__ 5397 uint32_t expected : 32;
5405 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_OFST 0x10 5407 #define ALT_SYSMGR_ROMCODE_WARMRAM_CRC_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_SYSMGR_ROMCODE_WARMRAM_CRC_OFST)) 5409 #ifndef __ASSEMBLY__ 5422 volatile ALT_SYSMGR_ROMCODE_WARMRAM_EN_t enable;
5423 volatile ALT_SYSMGR_ROMCODE_WARMRAM_DATASTART_t datastart;
5424 volatile ALT_SYSMGR_ROMCODE_WARMRAM_LEN_t length;
5425 volatile ALT_SYSMGR_ROMCODE_WARMRAM_EXECUTION_t execution;
5426 volatile ALT_SYSMGR_ROMCODE_WARMRAM_CRC_t crc;
5427 volatile uint32_t _pad_0x14_0x20[3];
5435 volatile uint32_t enable;
5436 volatile uint32_t datastart;
5437 volatile uint32_t length;
5438 volatile uint32_t execution;
5439 volatile uint32_t crc;
5440 volatile uint32_t _pad_0x14_0x20[3];
5448 #ifndef __ASSEMBLY__ 5461 volatile ALT_SYSMGR_ROMCODE_CTL_t ctrl;
5462 volatile ALT_SYSMGR_ROMCODE_CPU1STARTADDR_t cpu1startaddr;
5463 volatile ALT_SYSMGR_ROMCODE_INITSWSTATE_t initswstate;
5464 volatile ALT_SYSMGR_ROMCODE_INITSWLASTLD_t initswlastld;
5465 volatile ALT_SYSMGR_ROMCODE_BOOTROMSWSTATE_t bootromswstate;
5466 volatile uint32_t _pad_0x14_0x1f[3];
5467 volatile ALT_SYSMGR_ROMCODE_WARMRAM_t romcodegrp_warmramgrp;
5475 volatile uint32_t ctrl;
5476 volatile uint32_t cpu1startaddr;
5477 volatile uint32_t initswstate;
5478 volatile uint32_t initswlastld;
5479 volatile uint32_t bootromswstate;
5480 volatile uint32_t _pad_0x14_0x1f[3];
5481 volatile ALT_SYSMGR_ROMCODE_WARMRAM_raw_t romcodegrp_warmramgrp;
5537 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_E_DIS 0x0 5543 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_E_EN 0x1 5546 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_LSB 0 5548 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_MSB 0 5550 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_WIDTH 1 5552 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_SET_MSK 0x00000001 5554 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_CLR_MSK 0xfffffffe 5556 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_RESET 0x0 5558 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_GET(value) (((value) & 0x00000001) >> 0) 5560 #define ALT_SYSMGR_ROMHW_CTL_WAITSTATE_SET(value) (((value) << 0) & 0x00000001) 5589 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_E_DIS 0x0 5598 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_E_EN 0x1 5601 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_LSB 1 5603 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_MSB 1 5605 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_WIDTH 1 5607 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_SET_MSK 0x00000002 5609 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_CLR_MSK 0xfffffffd 5611 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_RESET 0x1 5613 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_GET(value) (((value) & 0x00000002) >> 1) 5615 #define ALT_SYSMGR_ROMHW_CTL_ENSFMDWRU_SET(value) (((value) << 1) & 0x00000002) 5617 #ifndef __ASSEMBLY__ 5630 uint32_t waitstate : 1;
5631 uint32_t ensfmdwru : 1;
5640 #define ALT_SYSMGR_ROMHW_CTL_OFST 0x0 5642 #ifndef __ASSEMBLY__ 5655 volatile ALT_SYSMGR_ROMHW_CTL_t ctrl;
5663 volatile uint32_t ctrl;
5721 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES0 0x0 5727 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES45 0x1 5733 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES90 0x2 5739 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES135 0x3 5745 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES180 0x4 5751 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES225 0x5 5757 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES270 0x6 5763 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_E_DEGREES315 0x7 5766 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_LSB 0 5768 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_MSB 2 5770 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_WIDTH 3 5772 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_SET_MSK 0x00000007 5774 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_CLR_MSK 0xfffffff8 5776 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_RESET 0x0 5778 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_GET(value) (((value) & 0x00000007) >> 0) 5780 #define ALT_SYSMGR_SDMMC_CTL_DRVSEL_SET(value) (((value) << 0) & 0x00000007) 5808 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES0 0x0 5814 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES45 0x1 5820 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES90 0x2 5826 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES135 0x3 5832 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES180 0x4 5838 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES225 0x5 5844 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES270 0x6 5850 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_E_DEGREES315 0x7 5853 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_LSB 3 5855 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_MSB 5 5857 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_WIDTH 3 5859 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_SET_MSK 0x00000038 5861 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_CLR_MSK 0xffffffc7 5863 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_RESET 0x0 5865 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_GET(value) (((value) & 0x00000038) >> 3) 5867 #define ALT_SYSMGR_SDMMC_CTL_SMPLSEL_SET(value) (((value) << 3) & 0x00000038) 5886 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_LSB 6 5888 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_MSB 6 5890 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_WIDTH 1 5892 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_SET_MSK 0x00000040 5894 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_CLR_MSK 0xffffffbf 5896 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_RESET 0x0 5898 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_GET(value) (((value) & 0x00000040) >> 6) 5900 #define ALT_SYSMGR_SDMMC_CTL_FBCLKSEL_SET(value) (((value) << 6) & 0x00000040) 5902 #ifndef __ASSEMBLY__ 5915 uint32_t drvsel : 3;
5916 uint32_t smplsel : 3;
5917 uint32_t fbclksel : 1;
5926 #define ALT_SYSMGR_SDMMC_CTL_OFST 0x0 5970 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_OPCODE 0x0 5976 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_E_DATA 0x1 5979 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_LSB 0 5981 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_MSB 0 5983 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_WIDTH 1 5985 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET_MSK 0x00000001 5987 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe 5989 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_RESET 0x1 5991 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_GET(value) (((value) & 0x00000001) >> 0) 5993 #define ALT_SYSMGR_SDMMC_L3MST_HPROTDATA_0_SET(value) (((value) << 0) & 0x00000001) 6004 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_LSB 1 6006 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_MSB 1 6008 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_WIDTH 1 6010 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET_MSK 0x00000002 6012 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffd 6014 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_RESET 0x1 6016 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_GET(value) (((value) & 0x00000002) >> 1) 6018 #define ALT_SYSMGR_SDMMC_L3MST_HPROTPRIV_0_SET(value) (((value) << 1) & 0x00000002) 6029 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_LSB 2 6031 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_MSB 2 6033 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_WIDTH 1 6035 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET_MSK 0x00000004 6037 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_CLR_MSK 0xfffffffb 6039 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_RESET 0x0 6041 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_GET(value) (((value) & 0x00000004) >> 2) 6043 #define ALT_SYSMGR_SDMMC_L3MST_HPROTBUFF_0_SET(value) (((value) << 2) & 0x00000004) 6054 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_LSB 3 6056 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_MSB 3 6058 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_WIDTH 1 6060 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET_MSK 0x00000008 6062 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_CLR_MSK 0xfffffff7 6064 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_RESET 0x0 6066 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_GET(value) (((value) & 0x00000008) >> 3) 6068 #define ALT_SYSMGR_SDMMC_L3MST_HPROTCACHE_0_SET(value) (((value) << 3) & 0x00000008) 6070 #ifndef __ASSEMBLY__ 6083 uint32_t hprotdata_0 : 1;
6084 uint32_t hprotpriv_0 : 1;
6085 uint32_t hprotbuff_0 : 1;
6086 uint32_t hprotcache_0 : 1;
6095 #define ALT_SYSMGR_SDMMC_L3MST_OFST 0x4 6097 #ifndef __ASSEMBLY__ 6110 volatile ALT_SYSMGR_SDMMC_CTL_t ctrl;
6111 volatile ALT_SYSMGR_SDMMC_L3MST_t l3master;
6119 volatile uint32_t ctrl;
6120 volatile uint32_t l3master;
6165 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_LSB 0 6167 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_MSB 0 6169 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_WIDTH 1 6171 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET_MSK 0x00000001 6173 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_CLR_MSK 0xfffffffe 6175 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_RESET 0x0 6177 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_GET(value) (((value) & 0x00000001) >> 0) 6179 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOINIT_SET(value) (((value) << 0) & 0x00000001) 6190 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_LSB 1 6192 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_MSB 1 6194 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_WIDTH 1 6196 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET_MSK 0x00000002 6198 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_CLR_MSK 0xfffffffd 6200 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_RESET 0x0 6202 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_GET(value) (((value) & 0x00000002) >> 1) 6204 #define ALT_SYSMGR_NAND_BOOTSTRAP_PAGE512_SET(value) (((value) << 1) & 0x00000002) 6216 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_LSB 2 6218 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_MSB 2 6220 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_WIDTH 1 6222 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET_MSK 0x00000004 6224 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_CLR_MSK 0xfffffffb 6226 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_RESET 0x0 6228 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_GET(value) (((value) & 0x00000004) >> 2) 6230 #define ALT_SYSMGR_NAND_BOOTSTRAP_NOLDB0P0_SET(value) (((value) << 2) & 0x00000004) 6242 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_LSB 3 6244 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_MSB 3 6246 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_WIDTH 1 6248 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET_MSK 0x00000008 6250 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_CLR_MSK 0xfffffff7 6252 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_RESET 0x0 6254 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_GET(value) (((value) & 0x00000008) >> 3) 6256 #define ALT_SYSMGR_NAND_BOOTSTRAP_TWOROWADDR_SET(value) (((value) << 3) & 0x00000008) 6258 #ifndef __ASSEMBLY__ 6271 uint32_t noinit : 1;
6272 uint32_t page512 : 1;
6273 uint32_t noloadb0p0 : 1;
6274 uint32_t tworowaddr : 1;
6283 #define ALT_SYSMGR_NAND_BOOTSTRAP_OFST 0x0 6342 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_NONCACHE_NONBUFF 0x0 6348 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_BUFF 0x1 6354 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_NONALLOC 0x2 6360 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_BUFF_NONALLOC 0x3 6366 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD1 0x4 6372 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD2 0x5 6378 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6 6384 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7 6390 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD3 0x8 6396 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD4 0x9 6402 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa 6408 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb 6414 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD5 0xc 6420 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_RSVD6 0xd 6426 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe 6432 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_E_CACHE_WRBACK_ALLOC 0xf 6435 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_LSB 0 6437 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_MSB 3 6439 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_WIDTH 4 6441 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_SET_MSK 0x0000000f 6443 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_CLR_MSK 0xfffffff0 6445 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_RESET 0x0 6447 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_GET(value) (((value) & 0x0000000f) >> 0) 6449 #define ALT_SYSMGR_NAND_L3MST_ARCACHE_0_SET(value) (((value) << 0) & 0x0000000f) 6488 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_NONCACHE_NONBUFF 0x0 6494 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_BUFF 0x1 6500 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_NONALLOC 0x2 6506 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_BUFF_NONALLOC 0x3 6512 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD1 0x4 6518 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD2 0x5 6524 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_RDALLOC 0x6 6530 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_RDALLOC 0x7 6536 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD3 0x8 6542 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD4 0x9 6548 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_WRALLOC 0xa 6554 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_WRALLOC 0xb 6560 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD5 0xc 6566 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_RSVD6 0xd 6572 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRTHRU_ALLOC 0xe 6578 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_E_CACHE_WRBACK_ALLOC 0xf 6581 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_LSB 4 6583 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_MSB 7 6585 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_WIDTH 4 6587 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_SET_MSK 0x000000f0 6589 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_CLR_MSK 0xffffff0f 6591 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_RESET 0x0 6593 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_GET(value) (((value) & 0x000000f0) >> 4) 6595 #define ALT_SYSMGR_NAND_L3MST_AWCACHE_0_SET(value) (((value) << 4) & 0x000000f0) 6597 #ifndef __ASSEMBLY__ 6610 uint32_t arcache_0 : 4;
6611 uint32_t awcache_0 : 4;
6620 #define ALT_SYSMGR_NAND_L3MST_OFST 0x4 6622 #ifndef __ASSEMBLY__ 6635 volatile ALT_SYSMGR_NAND_BOOTSTRAP_t bootstrap;
6636 volatile ALT_SYSMGR_NAND_L3MST_t l3master;
6644 volatile uint32_t bootstrap;
6645 volatile uint32_t l3master;
6709 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_E_OPCODE 0x0 6715 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_E_DATA 0x1 6718 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_LSB 0 6720 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_MSB 0 6722 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_WIDTH 1 6724 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_SET_MSK 0x00000001 6726 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_CLR_MSK 0xfffffffe 6728 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_RESET 0x1 6730 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_GET(value) (((value) & 0x00000001) >> 0) 6732 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_0_SET(value) (((value) << 0) & 0x00000001) 6756 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_E_OPCODE 0x0 6762 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_E_DATA 0x1 6765 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_LSB 1 6767 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_MSB 1 6769 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_WIDTH 1 6771 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_SET_MSK 0x00000002 6773 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_CLR_MSK 0xfffffffd 6775 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_RESET 0x1 6777 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_GET(value) (((value) & 0x00000002) >> 1) 6779 #define ALT_SYSMGR_USB_L3MST_HPROTDATA_1_SET(value) (((value) << 1) & 0x00000002) 6792 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_LSB 2 6794 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_MSB 2 6796 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_WIDTH 1 6798 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_SET_MSK 0x00000004 6800 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_CLR_MSK 0xfffffffb 6802 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_RESET 0x1 6804 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_GET(value) (((value) & 0x00000004) >> 2) 6806 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_0_SET(value) (((value) << 2) & 0x00000004) 6819 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_LSB 3 6821 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_MSB 3 6823 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_WIDTH 1 6825 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_SET_MSK 0x00000008 6827 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_CLR_MSK 0xfffffff7 6829 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_RESET 0x1 6831 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_GET(value) (((value) & 0x00000008) >> 3) 6833 #define ALT_SYSMGR_USB_L3MST_HPROTPRIV_1_SET(value) (((value) << 3) & 0x00000008) 6846 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_LSB 4 6848 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_MSB 4 6850 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_WIDTH 1 6852 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_SET_MSK 0x00000010 6854 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_CLR_MSK 0xffffffef 6856 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_RESET 0x0 6858 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_GET(value) (((value) & 0x00000010) >> 4) 6860 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_0_SET(value) (((value) << 4) & 0x00000010) 6873 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_LSB 5 6875 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_MSB 5 6877 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_WIDTH 1 6879 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_SET_MSK 0x00000020 6881 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_CLR_MSK 0xffffffdf 6883 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_RESET 0x0 6885 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_GET(value) (((value) & 0x00000020) >> 5) 6887 #define ALT_SYSMGR_USB_L3MST_HPROTBUFF_1_SET(value) (((value) << 5) & 0x00000020) 6900 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_LSB 6 6902 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_MSB 6 6904 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_WIDTH 1 6906 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_SET_MSK 0x00000040 6908 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_CLR_MSK 0xffffffbf 6910 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_RESET 0x0 6912 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_GET(value) (((value) & 0x00000040) >> 6) 6914 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_0_SET(value) (((value) << 6) & 0x00000040) 6927 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_LSB 7 6929 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_MSB 7 6931 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_WIDTH 1 6933 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_SET_MSK 0x00000080 6935 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_CLR_MSK 0xffffff7f 6937 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_RESET 0x0 6939 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_GET(value) (((value) & 0x00000080) >> 7) 6941 #define ALT_SYSMGR_USB_L3MST_HPROTCACHE_1_SET(value) (((value) << 7) & 0x00000080) 6943 #ifndef __ASSEMBLY__ 6956 uint32_t hprotdata_0 : 1;
6957 uint32_t hprotdata_1 : 1;
6958 uint32_t hprotpriv_0 : 1;
6959 uint32_t hprotpriv_1 : 1;
6960 uint32_t hprotbuff_0 : 1;
6961 uint32_t hprotbuff_1 : 1;
6962 uint32_t hprotcache_0 : 1;
6963 uint32_t hprotcache_1 : 1;
6972 #define ALT_SYSMGR_USB_L3MST_OFST 0x0 6974 #ifndef __ASSEMBLY__ 6987 volatile ALT_SYSMGR_USB_L3MST_t l3master;
6995 volatile uint32_t l3master;
7038 #define ALT_SYSMGR_ECC_L2_EN_LSB 0 7040 #define ALT_SYSMGR_ECC_L2_EN_MSB 0 7042 #define ALT_SYSMGR_ECC_L2_EN_WIDTH 1 7044 #define ALT_SYSMGR_ECC_L2_EN_SET_MSK 0x00000001 7046 #define ALT_SYSMGR_ECC_L2_EN_CLR_MSK 0xfffffffe 7048 #define ALT_SYSMGR_ECC_L2_EN_RESET 0x0 7050 #define ALT_SYSMGR_ECC_L2_EN_GET(value) (((value) & 0x00000001) >> 0) 7052 #define ALT_SYSMGR_ECC_L2_EN_SET(value) (((value) << 0) & 0x00000001) 7064 #define ALT_SYSMGR_ECC_L2_INJS_LSB 1 7066 #define ALT_SYSMGR_ECC_L2_INJS_MSB 1 7068 #define ALT_SYSMGR_ECC_L2_INJS_WIDTH 1 7070 #define ALT_SYSMGR_ECC_L2_INJS_SET_MSK 0x00000002 7072 #define ALT_SYSMGR_ECC_L2_INJS_CLR_MSK 0xfffffffd 7074 #define ALT_SYSMGR_ECC_L2_INJS_RESET 0x0 7076 #define ALT_SYSMGR_ECC_L2_INJS_GET(value) (((value) & 0x00000002) >> 1) 7078 #define ALT_SYSMGR_ECC_L2_INJS_SET(value) (((value) << 1) & 0x00000002) 7090 #define ALT_SYSMGR_ECC_L2_INJD_LSB 2 7092 #define ALT_SYSMGR_ECC_L2_INJD_MSB 2 7094 #define ALT_SYSMGR_ECC_L2_INJD_WIDTH 1 7096 #define ALT_SYSMGR_ECC_L2_INJD_SET_MSK 0x00000004 7098 #define ALT_SYSMGR_ECC_L2_INJD_CLR_MSK 0xfffffffb 7100 #define ALT_SYSMGR_ECC_L2_INJD_RESET 0x0 7102 #define ALT_SYSMGR_ECC_L2_INJD_GET(value) (((value) & 0x00000004) >> 2) 7104 #define ALT_SYSMGR_ECC_L2_INJD_SET(value) (((value) << 2) & 0x00000004) 7106 #ifndef __ASSEMBLY__ 7130 #define ALT_SYSMGR_ECC_L2_OFST 0x0 7162 #define ALT_SYSMGR_ECC_OCRAM_EN_LSB 0 7164 #define ALT_SYSMGR_ECC_OCRAM_EN_MSB 0 7166 #define ALT_SYSMGR_ECC_OCRAM_EN_WIDTH 1 7168 #define ALT_SYSMGR_ECC_OCRAM_EN_SET_MSK 0x00000001 7170 #define ALT_SYSMGR_ECC_OCRAM_EN_CLR_MSK 0xfffffffe 7172 #define ALT_SYSMGR_ECC_OCRAM_EN_RESET 0x0 7174 #define ALT_SYSMGR_ECC_OCRAM_EN_GET(value) (((value) & 0x00000001) >> 0) 7176 #define ALT_SYSMGR_ECC_OCRAM_EN_SET(value) (((value) << 0) & 0x00000001) 7188 #define ALT_SYSMGR_ECC_OCRAM_INJS_LSB 1 7190 #define ALT_SYSMGR_ECC_OCRAM_INJS_MSB 1 7192 #define ALT_SYSMGR_ECC_OCRAM_INJS_WIDTH 1 7194 #define ALT_SYSMGR_ECC_OCRAM_INJS_SET_MSK 0x00000002 7196 #define ALT_SYSMGR_ECC_OCRAM_INJS_CLR_MSK 0xfffffffd 7198 #define ALT_SYSMGR_ECC_OCRAM_INJS_RESET 0x0 7200 #define ALT_SYSMGR_ECC_OCRAM_INJS_GET(value) (((value) & 0x00000002) >> 1) 7202 #define ALT_SYSMGR_ECC_OCRAM_INJS_SET(value) (((value) << 1) & 0x00000002) 7214 #define ALT_SYSMGR_ECC_OCRAM_INJD_LSB 2 7216 #define ALT_SYSMGR_ECC_OCRAM_INJD_MSB 2 7218 #define ALT_SYSMGR_ECC_OCRAM_INJD_WIDTH 1 7220 #define ALT_SYSMGR_ECC_OCRAM_INJD_SET_MSK 0x00000004 7222 #define ALT_SYSMGR_ECC_OCRAM_INJD_CLR_MSK 0xfffffffb 7224 #define ALT_SYSMGR_ECC_OCRAM_INJD_RESET 0x0 7226 #define ALT_SYSMGR_ECC_OCRAM_INJD_GET(value) (((value) & 0x00000004) >> 2) 7228 #define ALT_SYSMGR_ECC_OCRAM_INJD_SET(value) (((value) << 2) & 0x00000004) 7241 #define ALT_SYSMGR_ECC_OCRAM_SERR_LSB 3 7243 #define ALT_SYSMGR_ECC_OCRAM_SERR_MSB 3 7245 #define ALT_SYSMGR_ECC_OCRAM_SERR_WIDTH 1 7247 #define ALT_SYSMGR_ECC_OCRAM_SERR_SET_MSK 0x00000008 7249 #define ALT_SYSMGR_ECC_OCRAM_SERR_CLR_MSK 0xfffffff7 7251 #define ALT_SYSMGR_ECC_OCRAM_SERR_RESET 0x0 7253 #define ALT_SYSMGR_ECC_OCRAM_SERR_GET(value) (((value) & 0x00000008) >> 3) 7255 #define ALT_SYSMGR_ECC_OCRAM_SERR_SET(value) (((value) << 3) & 0x00000008) 7269 #define ALT_SYSMGR_ECC_OCRAM_DERR_LSB 4 7271 #define ALT_SYSMGR_ECC_OCRAM_DERR_MSB 4 7273 #define ALT_SYSMGR_ECC_OCRAM_DERR_WIDTH 1 7275 #define ALT_SYSMGR_ECC_OCRAM_DERR_SET_MSK 0x00000010 7277 #define ALT_SYSMGR_ECC_OCRAM_DERR_CLR_MSK 0xffffffef 7279 #define ALT_SYSMGR_ECC_OCRAM_DERR_RESET 0x0 7281 #define ALT_SYSMGR_ECC_OCRAM_DERR_GET(value) (((value) & 0x00000010) >> 4) 7283 #define ALT_SYSMGR_ECC_OCRAM_DERR_SET(value) (((value) << 4) & 0x00000010) 7285 #ifndef __ASSEMBLY__ 7311 #define ALT_SYSMGR_ECC_OCRAM_OFST 0x4 7343 #define ALT_SYSMGR_ECC_USB0_EN_LSB 0 7345 #define ALT_SYSMGR_ECC_USB0_EN_MSB 0 7347 #define ALT_SYSMGR_ECC_USB0_EN_WIDTH 1 7349 #define ALT_SYSMGR_ECC_USB0_EN_SET_MSK 0x00000001 7351 #define ALT_SYSMGR_ECC_USB0_EN_CLR_MSK 0xfffffffe 7353 #define ALT_SYSMGR_ECC_USB0_EN_RESET 0x0 7355 #define ALT_SYSMGR_ECC_USB0_EN_GET(value) (((value) & 0x00000001) >> 0) 7357 #define ALT_SYSMGR_ECC_USB0_EN_SET(value) (((value) << 0) & 0x00000001) 7369 #define ALT_SYSMGR_ECC_USB0_INJS_LSB 1 7371 #define ALT_SYSMGR_ECC_USB0_INJS_MSB 1 7373 #define ALT_SYSMGR_ECC_USB0_INJS_WIDTH 1 7375 #define ALT_SYSMGR_ECC_USB0_INJS_SET_MSK 0x00000002 7377 #define ALT_SYSMGR_ECC_USB0_INJS_CLR_MSK 0xfffffffd 7379 #define ALT_SYSMGR_ECC_USB0_INJS_RESET 0x0 7381 #define ALT_SYSMGR_ECC_USB0_INJS_GET(value) (((value) & 0x00000002) >> 1) 7383 #define ALT_SYSMGR_ECC_USB0_INJS_SET(value) (((value) << 1) & 0x00000002) 7395 #define ALT_SYSMGR_ECC_USB0_INJD_LSB 2 7397 #define ALT_SYSMGR_ECC_USB0_INJD_MSB 2 7399 #define ALT_SYSMGR_ECC_USB0_INJD_WIDTH 1 7401 #define ALT_SYSMGR_ECC_USB0_INJD_SET_MSK 0x00000004 7403 #define ALT_SYSMGR_ECC_USB0_INJD_CLR_MSK 0xfffffffb 7405 #define ALT_SYSMGR_ECC_USB0_INJD_RESET 0x0 7407 #define ALT_SYSMGR_ECC_USB0_INJD_GET(value) (((value) & 0x00000004) >> 2) 7409 #define ALT_SYSMGR_ECC_USB0_INJD_SET(value) (((value) << 2) & 0x00000004) 7422 #define ALT_SYSMGR_ECC_USB0_SERR_LSB 3 7424 #define ALT_SYSMGR_ECC_USB0_SERR_MSB 3 7426 #define ALT_SYSMGR_ECC_USB0_SERR_WIDTH 1 7428 #define ALT_SYSMGR_ECC_USB0_SERR_SET_MSK 0x00000008 7430 #define ALT_SYSMGR_ECC_USB0_SERR_CLR_MSK 0xfffffff7 7432 #define ALT_SYSMGR_ECC_USB0_SERR_RESET 0x0 7434 #define ALT_SYSMGR_ECC_USB0_SERR_GET(value) (((value) & 0x00000008) >> 3) 7436 #define ALT_SYSMGR_ECC_USB0_SERR_SET(value) (((value) << 3) & 0x00000008) 7449 #define ALT_SYSMGR_ECC_USB0_DERR_LSB 4 7451 #define ALT_SYSMGR_ECC_USB0_DERR_MSB 4 7453 #define ALT_SYSMGR_ECC_USB0_DERR_WIDTH 1 7455 #define ALT_SYSMGR_ECC_USB0_DERR_SET_MSK 0x00000010 7457 #define ALT_SYSMGR_ECC_USB0_DERR_CLR_MSK 0xffffffef 7459 #define ALT_SYSMGR_ECC_USB0_DERR_RESET 0x0 7461 #define ALT_SYSMGR_ECC_USB0_DERR_GET(value) (((value) & 0x00000010) >> 4) 7463 #define ALT_SYSMGR_ECC_USB0_DERR_SET(value) (((value) << 4) & 0x00000010) 7465 #ifndef __ASSEMBLY__ 7491 #define ALT_SYSMGR_ECC_USB0_OFST 0x8 7523 #define ALT_SYSMGR_ECC_USB1_EN_LSB 0 7525 #define ALT_SYSMGR_ECC_USB1_EN_MSB 0 7527 #define ALT_SYSMGR_ECC_USB1_EN_WIDTH 1 7529 #define ALT_SYSMGR_ECC_USB1_EN_SET_MSK 0x00000001 7531 #define ALT_SYSMGR_ECC_USB1_EN_CLR_MSK 0xfffffffe 7533 #define ALT_SYSMGR_ECC_USB1_EN_RESET 0x0 7535 #define ALT_SYSMGR_ECC_USB1_EN_GET(value) (((value) & 0x00000001) >> 0) 7537 #define ALT_SYSMGR_ECC_USB1_EN_SET(value) (((value) << 0) & 0x00000001) 7549 #define ALT_SYSMGR_ECC_USB1_INJS_LSB 1 7551 #define ALT_SYSMGR_ECC_USB1_INJS_MSB 1 7553 #define ALT_SYSMGR_ECC_USB1_INJS_WIDTH 1 7555 #define ALT_SYSMGR_ECC_USB1_INJS_SET_MSK 0x00000002 7557 #define ALT_SYSMGR_ECC_USB1_INJS_CLR_MSK 0xfffffffd 7559 #define ALT_SYSMGR_ECC_USB1_INJS_RESET 0x0 7561 #define ALT_SYSMGR_ECC_USB1_INJS_GET(value) (((value) & 0x00000002) >> 1) 7563 #define ALT_SYSMGR_ECC_USB1_INJS_SET(value) (((value) << 1) & 0x00000002) 7575 #define ALT_SYSMGR_ECC_USB1_INJD_LSB 2 7577 #define ALT_SYSMGR_ECC_USB1_INJD_MSB 2 7579 #define ALT_SYSMGR_ECC_USB1_INJD_WIDTH 1 7581 #define ALT_SYSMGR_ECC_USB1_INJD_SET_MSK 0x00000004 7583 #define ALT_SYSMGR_ECC_USB1_INJD_CLR_MSK 0xfffffffb 7585 #define ALT_SYSMGR_ECC_USB1_INJD_RESET 0x0 7587 #define ALT_SYSMGR_ECC_USB1_INJD_GET(value) (((value) & 0x00000004) >> 2) 7589 #define ALT_SYSMGR_ECC_USB1_INJD_SET(value) (((value) << 2) & 0x00000004) 7602 #define ALT_SYSMGR_ECC_USB1_SERR_LSB 3 7604 #define ALT_SYSMGR_ECC_USB1_SERR_MSB 3 7606 #define ALT_SYSMGR_ECC_USB1_SERR_WIDTH 1 7608 #define ALT_SYSMGR_ECC_USB1_SERR_SET_MSK 0x00000008 7610 #define ALT_SYSMGR_ECC_USB1_SERR_CLR_MSK 0xfffffff7 7612 #define ALT_SYSMGR_ECC_USB1_SERR_RESET 0x0 7614 #define ALT_SYSMGR_ECC_USB1_SERR_GET(value) (((value) & 0x00000008) >> 3) 7616 #define ALT_SYSMGR_ECC_USB1_SERR_SET(value) (((value) << 3) & 0x00000008) 7629 #define ALT_SYSMGR_ECC_USB1_DERR_LSB 4 7631 #define ALT_SYSMGR_ECC_USB1_DERR_MSB 4 7633 #define ALT_SYSMGR_ECC_USB1_DERR_WIDTH 1 7635 #define ALT_SYSMGR_ECC_USB1_DERR_SET_MSK 0x00000010 7637 #define ALT_SYSMGR_ECC_USB1_DERR_CLR_MSK 0xffffffef 7639 #define ALT_SYSMGR_ECC_USB1_DERR_RESET 0x0 7641 #define ALT_SYSMGR_ECC_USB1_DERR_GET(value) (((value) & 0x00000010) >> 4) 7643 #define ALT_SYSMGR_ECC_USB1_DERR_SET(value) (((value) << 4) & 0x00000010) 7645 #ifndef __ASSEMBLY__ 7671 #define ALT_SYSMGR_ECC_USB1_OFST 0xc 7707 #define ALT_SYSMGR_ECC_EMAC0_EN_LSB 0 7709 #define ALT_SYSMGR_ECC_EMAC0_EN_MSB 0 7711 #define ALT_SYSMGR_ECC_EMAC0_EN_WIDTH 1 7713 #define ALT_SYSMGR_ECC_EMAC0_EN_SET_MSK 0x00000001 7715 #define ALT_SYSMGR_ECC_EMAC0_EN_CLR_MSK 0xfffffffe 7717 #define ALT_SYSMGR_ECC_EMAC0_EN_RESET 0x0 7719 #define ALT_SYSMGR_ECC_EMAC0_EN_GET(value) (((value) & 0x00000001) >> 0) 7721 #define ALT_SYSMGR_ECC_EMAC0_EN_SET(value) (((value) << 0) & 0x00000001) 7733 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_LSB 1 7735 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_MSB 1 7737 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_WIDTH 1 7739 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_SET_MSK 0x00000002 7741 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_CLR_MSK 0xfffffffd 7743 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_RESET 0x0 7745 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_GET(value) (((value) & 0x00000002) >> 1) 7747 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJS_SET(value) (((value) << 1) & 0x00000002) 7760 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_LSB 2 7762 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_MSB 2 7764 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_WIDTH 1 7766 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_SET_MSK 0x00000004 7768 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_CLR_MSK 0xfffffffb 7770 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_RESET 0x0 7772 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_GET(value) (((value) & 0x00000004) >> 2) 7774 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOINJD_SET(value) (((value) << 2) & 0x00000004) 7786 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_LSB 3 7788 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_MSB 3 7790 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_WIDTH 1 7792 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_SET_MSK 0x00000008 7794 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_CLR_MSK 0xfffffff7 7796 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_RESET 0x0 7798 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_GET(value) (((value) & 0x00000008) >> 3) 7800 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJS_SET(value) (((value) << 3) & 0x00000008) 7813 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_LSB 4 7815 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_MSB 4 7817 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_WIDTH 1 7819 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_SET_MSK 0x00000010 7821 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_CLR_MSK 0xffffffef 7823 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_RESET 0x0 7825 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_GET(value) (((value) & 0x00000010) >> 4) 7827 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOINJD_SET(value) (((value) << 4) & 0x00000010) 7841 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_LSB 5 7843 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_MSB 5 7845 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_WIDTH 1 7847 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_SET_MSK 0x00000020 7849 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_CLR_MSK 0xffffffdf 7851 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_RESET 0x0 7853 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_GET(value) (((value) & 0x00000020) >> 5) 7855 #define ALT_SYSMGR_ECC_EMAC0_TXFIFOSERR_SET(value) (((value) << 5) & 0x00000020) 7869 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_LSB 6 7871 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_MSB 6 7873 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_WIDTH 1 7875 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_SET_MSK 0x00000040 7877 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_CLR_MSK 0xffffffbf 7879 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_RESET 0x0 7881 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_GET(value) (((value) & 0x00000040) >> 6) 7883 #define ALT_SYSMGR_ECC_EMAC0_TXFIFODERR_SET(value) (((value) << 6) & 0x00000040) 7897 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_LSB 7 7899 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_MSB 7 7901 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_WIDTH 1 7903 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_SET_MSK 0x00000080 7905 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_CLR_MSK 0xffffff7f 7907 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_RESET 0x0 7909 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_GET(value) (((value) & 0x00000080) >> 7) 7911 #define ALT_SYSMGR_ECC_EMAC0_RXFIFOSERR_SET(value) (((value) << 7) & 0x00000080) 7925 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_LSB 8 7927 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_MSB 8 7929 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_WIDTH 1 7931 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_SET_MSK 0x00000100 7933 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_CLR_MSK 0xfffffeff 7935 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_RESET 0x0 7937 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_GET(value) (((value) & 0x00000100) >> 8) 7939 #define ALT_SYSMGR_ECC_EMAC0_RXFIFODERR_SET(value) (((value) << 8) & 0x00000100) 7941 #ifndef __ASSEMBLY__ 7955 uint32_t txfifoinjs : 1;
7956 uint32_t txfifoinjd : 1;
7957 uint32_t rxfifoinjs : 1;
7958 uint32_t rxfifoinjd : 1;
7959 uint32_t txfifoserr : 1;
7960 uint32_t txfifoderr : 1;
7961 uint32_t rxfifoserr : 1;
7962 uint32_t rxfifoderr : 1;
7971 #define ALT_SYSMGR_ECC_EMAC0_OFST 0x10 8007 #define ALT_SYSMGR_ECC_EMAC1_EN_LSB 0 8009 #define ALT_SYSMGR_ECC_EMAC1_EN_MSB 0 8011 #define ALT_SYSMGR_ECC_EMAC1_EN_WIDTH 1 8013 #define ALT_SYSMGR_ECC_EMAC1_EN_SET_MSK 0x00000001 8015 #define ALT_SYSMGR_ECC_EMAC1_EN_CLR_MSK 0xfffffffe 8017 #define ALT_SYSMGR_ECC_EMAC1_EN_RESET 0x0 8019 #define ALT_SYSMGR_ECC_EMAC1_EN_GET(value) (((value) & 0x00000001) >> 0) 8021 #define ALT_SYSMGR_ECC_EMAC1_EN_SET(value) (((value) << 0) & 0x00000001) 8033 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_LSB 1 8035 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_MSB 1 8037 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_WIDTH 1 8039 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_SET_MSK 0x00000002 8041 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_CLR_MSK 0xfffffffd 8043 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_RESET 0x0 8045 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_GET(value) (((value) & 0x00000002) >> 1) 8047 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJS_SET(value) (((value) << 1) & 0x00000002) 8060 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_LSB 2 8062 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_MSB 2 8064 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_WIDTH 1 8066 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_SET_MSK 0x00000004 8068 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_CLR_MSK 0xfffffffb 8070 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_RESET 0x0 8072 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_GET(value) (((value) & 0x00000004) >> 2) 8074 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOINJD_SET(value) (((value) << 2) & 0x00000004) 8086 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_LSB 3 8088 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_MSB 3 8090 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_WIDTH 1 8092 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_SET_MSK 0x00000008 8094 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_CLR_MSK 0xfffffff7 8096 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_RESET 0x0 8098 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_GET(value) (((value) & 0x00000008) >> 3) 8100 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJS_SET(value) (((value) << 3) & 0x00000008) 8113 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_LSB 4 8115 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_MSB 4 8117 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_WIDTH 1 8119 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_SET_MSK 0x00000010 8121 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_CLR_MSK 0xffffffef 8123 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_RESET 0x0 8125 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_GET(value) (((value) & 0x00000010) >> 4) 8127 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOINJD_SET(value) (((value) << 4) & 0x00000010) 8141 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_LSB 5 8143 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_MSB 5 8145 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_WIDTH 1 8147 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_SET_MSK 0x00000020 8149 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_CLR_MSK 0xffffffdf 8151 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_RESET 0x0 8153 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_GET(value) (((value) & 0x00000020) >> 5) 8155 #define ALT_SYSMGR_ECC_EMAC1_TXFIFOSERR_SET(value) (((value) << 5) & 0x00000020) 8169 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_LSB 6 8171 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_MSB 6 8173 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_WIDTH 1 8175 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_SET_MSK 0x00000040 8177 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_CLR_MSK 0xffffffbf 8179 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_RESET 0x0 8181 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_GET(value) (((value) & 0x00000040) >> 6) 8183 #define ALT_SYSMGR_ECC_EMAC1_TXFIFODERR_SET(value) (((value) << 6) & 0x00000040) 8197 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_LSB 7 8199 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_MSB 7 8201 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_WIDTH 1 8203 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_SET_MSK 0x00000080 8205 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_CLR_MSK 0xffffff7f 8207 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_RESET 0x0 8209 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_GET(value) (((value) & 0x00000080) >> 7) 8211 #define ALT_SYSMGR_ECC_EMAC1_RXFIFOSERR_SET(value) (((value) << 7) & 0x00000080) 8225 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_LSB 8 8227 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_MSB 8 8229 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_WIDTH 1 8231 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_SET_MSK 0x00000100 8233 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_CLR_MSK 0xfffffeff 8235 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_RESET 0x0 8237 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_GET(value) (((value) & 0x00000100) >> 8) 8239 #define ALT_SYSMGR_ECC_EMAC1_RXFIFODERR_SET(value) (((value) << 8) & 0x00000100) 8241 #ifndef __ASSEMBLY__ 8255 uint32_t txfifoinjs : 1;
8256 uint32_t txfifoinjd : 1;
8257 uint32_t rxfifoinjs : 1;
8258 uint32_t rxfifoinjd : 1;
8259 uint32_t txfifoserr : 1;
8260 uint32_t txfifoderr : 1;
8261 uint32_t rxfifoserr : 1;
8262 uint32_t rxfifoderr : 1;
8271 #define ALT_SYSMGR_ECC_EMAC1_OFST 0x14 8303 #define ALT_SYSMGR_ECC_DMA_EN_LSB 0 8305 #define ALT_SYSMGR_ECC_DMA_EN_MSB 0 8307 #define ALT_SYSMGR_ECC_DMA_EN_WIDTH 1 8309 #define ALT_SYSMGR_ECC_DMA_EN_SET_MSK 0x00000001 8311 #define ALT_SYSMGR_ECC_DMA_EN_CLR_MSK 0xfffffffe 8313 #define ALT_SYSMGR_ECC_DMA_EN_RESET 0x0 8315 #define ALT_SYSMGR_ECC_DMA_EN_GET(value) (((value) & 0x00000001) >> 0) 8317 #define ALT_SYSMGR_ECC_DMA_EN_SET(value) (((value) << 0) & 0x00000001) 8329 #define ALT_SYSMGR_ECC_DMA_INJS_LSB 1 8331 #define ALT_SYSMGR_ECC_DMA_INJS_MSB 1 8333 #define ALT_SYSMGR_ECC_DMA_INJS_WIDTH 1 8335 #define ALT_SYSMGR_ECC_DMA_INJS_SET_MSK 0x00000002 8337 #define ALT_SYSMGR_ECC_DMA_INJS_CLR_MSK 0xfffffffd 8339 #define ALT_SYSMGR_ECC_DMA_INJS_RESET 0x0 8341 #define ALT_SYSMGR_ECC_DMA_INJS_GET(value) (((value) & 0x00000002) >> 1) 8343 #define ALT_SYSMGR_ECC_DMA_INJS_SET(value) (((value) << 1) & 0x00000002) 8355 #define ALT_SYSMGR_ECC_DMA_INJD_LSB 2 8357 #define ALT_SYSMGR_ECC_DMA_INJD_MSB 2 8359 #define ALT_SYSMGR_ECC_DMA_INJD_WIDTH 1 8361 #define ALT_SYSMGR_ECC_DMA_INJD_SET_MSK 0x00000004 8363 #define ALT_SYSMGR_ECC_DMA_INJD_CLR_MSK 0xfffffffb 8365 #define ALT_SYSMGR_ECC_DMA_INJD_RESET 0x0 8367 #define ALT_SYSMGR_ECC_DMA_INJD_GET(value) (((value) & 0x00000004) >> 2) 8369 #define ALT_SYSMGR_ECC_DMA_INJD_SET(value) (((value) << 2) & 0x00000004) 8382 #define ALT_SYSMGR_ECC_DMA_SERR_LSB 3 8384 #define ALT_SYSMGR_ECC_DMA_SERR_MSB 3 8386 #define ALT_SYSMGR_ECC_DMA_SERR_WIDTH 1 8388 #define ALT_SYSMGR_ECC_DMA_SERR_SET_MSK 0x00000008 8390 #define ALT_SYSMGR_ECC_DMA_SERR_CLR_MSK 0xfffffff7 8392 #define ALT_SYSMGR_ECC_DMA_SERR_RESET 0x0 8394 #define ALT_SYSMGR_ECC_DMA_SERR_GET(value) (((value) & 0x00000008) >> 3) 8396 #define ALT_SYSMGR_ECC_DMA_SERR_SET(value) (((value) << 3) & 0x00000008) 8409 #define ALT_SYSMGR_ECC_DMA_DERR_LSB 4 8411 #define ALT_SYSMGR_ECC_DMA_DERR_MSB 4 8413 #define ALT_SYSMGR_ECC_DMA_DERR_WIDTH 1 8415 #define ALT_SYSMGR_ECC_DMA_DERR_SET_MSK 0x00000010 8417 #define ALT_SYSMGR_ECC_DMA_DERR_CLR_MSK 0xffffffef 8419 #define ALT_SYSMGR_ECC_DMA_DERR_RESET 0x0 8421 #define ALT_SYSMGR_ECC_DMA_DERR_GET(value) (((value) & 0x00000010) >> 4) 8423 #define ALT_SYSMGR_ECC_DMA_DERR_SET(value) (((value) << 4) & 0x00000010) 8425 #ifndef __ASSEMBLY__ 8451 #define ALT_SYSMGR_ECC_DMA_OFST 0x18 8483 #define ALT_SYSMGR_ECC_CAN0_EN_LSB 0 8485 #define ALT_SYSMGR_ECC_CAN0_EN_MSB 0 8487 #define ALT_SYSMGR_ECC_CAN0_EN_WIDTH 1 8489 #define ALT_SYSMGR_ECC_CAN0_EN_SET_MSK 0x00000001 8491 #define ALT_SYSMGR_ECC_CAN0_EN_CLR_MSK 0xfffffffe 8493 #define ALT_SYSMGR_ECC_CAN0_EN_RESET 0x0 8495 #define ALT_SYSMGR_ECC_CAN0_EN_GET(value) (((value) & 0x00000001) >> 0) 8497 #define ALT_SYSMGR_ECC_CAN0_EN_SET(value) (((value) << 0) & 0x00000001) 8509 #define ALT_SYSMGR_ECC_CAN0_INJS_LSB 1 8511 #define ALT_SYSMGR_ECC_CAN0_INJS_MSB 1 8513 #define ALT_SYSMGR_ECC_CAN0_INJS_WIDTH 1 8515 #define ALT_SYSMGR_ECC_CAN0_INJS_SET_MSK 0x00000002 8517 #define ALT_SYSMGR_ECC_CAN0_INJS_CLR_MSK 0xfffffffd 8519 #define ALT_SYSMGR_ECC_CAN0_INJS_RESET 0x0 8521 #define ALT_SYSMGR_ECC_CAN0_INJS_GET(value) (((value) & 0x00000002) >> 1) 8523 #define ALT_SYSMGR_ECC_CAN0_INJS_SET(value) (((value) << 1) & 0x00000002) 8535 #define ALT_SYSMGR_ECC_CAN0_INJD_LSB 2 8537 #define ALT_SYSMGR_ECC_CAN0_INJD_MSB 2 8539 #define ALT_SYSMGR_ECC_CAN0_INJD_WIDTH 1 8541 #define ALT_SYSMGR_ECC_CAN0_INJD_SET_MSK 0x00000004 8543 #define ALT_SYSMGR_ECC_CAN0_INJD_CLR_MSK 0xfffffffb 8545 #define ALT_SYSMGR_ECC_CAN0_INJD_RESET 0x0 8547 #define ALT_SYSMGR_ECC_CAN0_INJD_GET(value) (((value) & 0x00000004) >> 2) 8549 #define ALT_SYSMGR_ECC_CAN0_INJD_SET(value) (((value) << 2) & 0x00000004) 8562 #define ALT_SYSMGR_ECC_CAN0_SERR_LSB 3 8564 #define ALT_SYSMGR_ECC_CAN0_SERR_MSB 3 8566 #define ALT_SYSMGR_ECC_CAN0_SERR_WIDTH 1 8568 #define ALT_SYSMGR_ECC_CAN0_SERR_SET_MSK 0x00000008 8570 #define ALT_SYSMGR_ECC_CAN0_SERR_CLR_MSK 0xfffffff7 8572 #define ALT_SYSMGR_ECC_CAN0_SERR_RESET 0x0 8574 #define ALT_SYSMGR_ECC_CAN0_SERR_GET(value) (((value) & 0x00000008) >> 3) 8576 #define ALT_SYSMGR_ECC_CAN0_SERR_SET(value) (((value) << 3) & 0x00000008) 8589 #define ALT_SYSMGR_ECC_CAN0_DERR_LSB 4 8591 #define ALT_SYSMGR_ECC_CAN0_DERR_MSB 4 8593 #define ALT_SYSMGR_ECC_CAN0_DERR_WIDTH 1 8595 #define ALT_SYSMGR_ECC_CAN0_DERR_SET_MSK 0x00000010 8597 #define ALT_SYSMGR_ECC_CAN0_DERR_CLR_MSK 0xffffffef 8599 #define ALT_SYSMGR_ECC_CAN0_DERR_RESET 0x0 8601 #define ALT_SYSMGR_ECC_CAN0_DERR_GET(value) (((value) & 0x00000010) >> 4) 8603 #define ALT_SYSMGR_ECC_CAN0_DERR_SET(value) (((value) << 4) & 0x00000010) 8605 #ifndef __ASSEMBLY__ 8631 #define ALT_SYSMGR_ECC_CAN0_OFST 0x1c 8663 #define ALT_SYSMGR_ECC_CAN1_EN_LSB 0 8665 #define ALT_SYSMGR_ECC_CAN1_EN_MSB 0 8667 #define ALT_SYSMGR_ECC_CAN1_EN_WIDTH 1 8669 #define ALT_SYSMGR_ECC_CAN1_EN_SET_MSK 0x00000001 8671 #define ALT_SYSMGR_ECC_CAN1_EN_CLR_MSK 0xfffffffe 8673 #define ALT_SYSMGR_ECC_CAN1_EN_RESET 0x0 8675 #define ALT_SYSMGR_ECC_CAN1_EN_GET(value) (((value) & 0x00000001) >> 0) 8677 #define ALT_SYSMGR_ECC_CAN1_EN_SET(value) (((value) << 0) & 0x00000001) 8689 #define ALT_SYSMGR_ECC_CAN1_INJS_LSB 1 8691 #define ALT_SYSMGR_ECC_CAN1_INJS_MSB 1 8693 #define ALT_SYSMGR_ECC_CAN1_INJS_WIDTH 1 8695 #define ALT_SYSMGR_ECC_CAN1_INJS_SET_MSK 0x00000002 8697 #define ALT_SYSMGR_ECC_CAN1_INJS_CLR_MSK 0xfffffffd 8699 #define ALT_SYSMGR_ECC_CAN1_INJS_RESET 0x0 8701 #define ALT_SYSMGR_ECC_CAN1_INJS_GET(value) (((value) & 0x00000002) >> 1) 8703 #define ALT_SYSMGR_ECC_CAN1_INJS_SET(value) (((value) << 1) & 0x00000002) 8715 #define ALT_SYSMGR_ECC_CAN1_INJD_LSB 2 8717 #define ALT_SYSMGR_ECC_CAN1_INJD_MSB 2 8719 #define ALT_SYSMGR_ECC_CAN1_INJD_WIDTH 1 8721 #define ALT_SYSMGR_ECC_CAN1_INJD_SET_MSK 0x00000004 8723 #define ALT_SYSMGR_ECC_CAN1_INJD_CLR_MSK 0xfffffffb 8725 #define ALT_SYSMGR_ECC_CAN1_INJD_RESET 0x0 8727 #define ALT_SYSMGR_ECC_CAN1_INJD_GET(value) (((value) & 0x00000004) >> 2) 8729 #define ALT_SYSMGR_ECC_CAN1_INJD_SET(value) (((value) << 2) & 0x00000004) 8742 #define ALT_SYSMGR_ECC_CAN1_SERR_LSB 3 8744 #define ALT_SYSMGR_ECC_CAN1_SERR_MSB 3 8746 #define ALT_SYSMGR_ECC_CAN1_SERR_WIDTH 1 8748 #define ALT_SYSMGR_ECC_CAN1_SERR_SET_MSK 0x00000008 8750 #define ALT_SYSMGR_ECC_CAN1_SERR_CLR_MSK 0xfffffff7 8752 #define ALT_SYSMGR_ECC_CAN1_SERR_RESET 0x0 8754 #define ALT_SYSMGR_ECC_CAN1_SERR_GET(value) (((value) & 0x00000008) >> 3) 8756 #define ALT_SYSMGR_ECC_CAN1_SERR_SET(value) (((value) << 3) & 0x00000008) 8769 #define ALT_SYSMGR_ECC_CAN1_DERR_LSB 4 8771 #define ALT_SYSMGR_ECC_CAN1_DERR_MSB 4 8773 #define ALT_SYSMGR_ECC_CAN1_DERR_WIDTH 1 8775 #define ALT_SYSMGR_ECC_CAN1_DERR_SET_MSK 0x00000010 8777 #define ALT_SYSMGR_ECC_CAN1_DERR_CLR_MSK 0xffffffef 8779 #define ALT_SYSMGR_ECC_CAN1_DERR_RESET 0x0 8781 #define ALT_SYSMGR_ECC_CAN1_DERR_GET(value) (((value) & 0x00000010) >> 4) 8783 #define ALT_SYSMGR_ECC_CAN1_DERR_SET(value) (((value) << 4) & 0x00000010) 8785 #ifndef __ASSEMBLY__ 8811 #define ALT_SYSMGR_ECC_CAN1_OFST 0x20 8851 #define ALT_SYSMGR_ECC_NAND_EN_LSB 0 8853 #define ALT_SYSMGR_ECC_NAND_EN_MSB 0 8855 #define ALT_SYSMGR_ECC_NAND_EN_WIDTH 1 8857 #define ALT_SYSMGR_ECC_NAND_EN_SET_MSK 0x00000001 8859 #define ALT_SYSMGR_ECC_NAND_EN_CLR_MSK 0xfffffffe 8861 #define ALT_SYSMGR_ECC_NAND_EN_RESET 0x0 8863 #define ALT_SYSMGR_ECC_NAND_EN_GET(value) (((value) & 0x00000001) >> 0) 8865 #define ALT_SYSMGR_ECC_NAND_EN_SET(value) (((value) << 0) & 0x00000001) 8877 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_LSB 1 8879 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_MSB 1 8881 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_WIDTH 1 8883 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_SET_MSK 0x00000002 8885 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_CLR_MSK 0xfffffffd 8887 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_RESET 0x0 8889 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_GET(value) (((value) & 0x00000002) >> 1) 8891 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJS_SET(value) (((value) << 1) & 0x00000002) 8904 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_LSB 2 8906 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_MSB 2 8908 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_WIDTH 1 8910 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_SET_MSK 0x00000004 8912 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_CLR_MSK 0xfffffffb 8914 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_RESET 0x0 8916 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_GET(value) (((value) & 0x00000004) >> 2) 8918 #define ALT_SYSMGR_ECC_NAND_ECCBUFINJD_SET(value) (((value) << 2) & 0x00000004) 8930 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_LSB 3 8932 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_MSB 3 8934 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_WIDTH 1 8936 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_SET_MSK 0x00000008 8938 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_CLR_MSK 0xfffffff7 8940 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_RESET 0x0 8942 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_GET(value) (((value) & 0x00000008) >> 3) 8944 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJS_SET(value) (((value) << 3) & 0x00000008) 8957 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_LSB 4 8959 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_MSB 4 8961 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_WIDTH 1 8963 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_SET_MSK 0x00000010 8965 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_CLR_MSK 0xffffffef 8967 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_RESET 0x0 8969 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_GET(value) (((value) & 0x00000010) >> 4) 8971 #define ALT_SYSMGR_ECC_NAND_WRFIFOINJD_SET(value) (((value) << 4) & 0x00000010) 8983 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_LSB 5 8985 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_MSB 5 8987 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_WIDTH 1 8989 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_SET_MSK 0x00000020 8991 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_CLR_MSK 0xffffffdf 8993 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_RESET 0x0 8995 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_GET(value) (((value) & 0x00000020) >> 5) 8997 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJS_SET(value) (((value) << 5) & 0x00000020) 9010 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_LSB 6 9012 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_MSB 6 9014 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_WIDTH 1 9016 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_SET_MSK 0x00000040 9018 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_CLR_MSK 0xffffffbf 9020 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_RESET 0x0 9022 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_GET(value) (((value) & 0x00000040) >> 6) 9024 #define ALT_SYSMGR_ECC_NAND_RDFIFOINJD_SET(value) (((value) << 6) & 0x00000040) 9038 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_LSB 7 9040 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_MSB 7 9042 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_WIDTH 1 9044 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_SET_MSK 0x00000080 9046 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_CLR_MSK 0xffffff7f 9048 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_RESET 0x0 9050 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_GET(value) (((value) & 0x00000080) >> 7) 9052 #define ALT_SYSMGR_ECC_NAND_ECCBUFSERR_SET(value) (((value) << 7) & 0x00000080) 9066 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_LSB 8 9068 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_MSB 8 9070 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_WIDTH 1 9072 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_SET_MSK 0x00000100 9074 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_CLR_MSK 0xfffffeff 9076 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_RESET 0x0 9078 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_GET(value) (((value) & 0x00000100) >> 8) 9080 #define ALT_SYSMGR_ECC_NAND_ECCBUFDERR_SET(value) (((value) << 8) & 0x00000100) 9094 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_LSB 9 9096 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_MSB 9 9098 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_WIDTH 1 9100 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_SET_MSK 0x00000200 9102 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_CLR_MSK 0xfffffdff 9104 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_RESET 0x0 9106 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_GET(value) (((value) & 0x00000200) >> 9) 9108 #define ALT_SYSMGR_ECC_NAND_WRFIFOSERR_SET(value) (((value) << 9) & 0x00000200) 9122 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_LSB 10 9124 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_MSB 10 9126 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_WIDTH 1 9128 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_SET_MSK 0x00000400 9130 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_CLR_MSK 0xfffffbff 9132 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_RESET 0x0 9134 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_GET(value) (((value) & 0x00000400) >> 10) 9136 #define ALT_SYSMGR_ECC_NAND_WRFIFODERR_SET(value) (((value) << 10) & 0x00000400) 9150 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_LSB 11 9152 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_MSB 11 9154 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_WIDTH 1 9156 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_SET_MSK 0x00000800 9158 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_CLR_MSK 0xfffff7ff 9160 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_RESET 0x0 9162 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_GET(value) (((value) & 0x00000800) >> 11) 9164 #define ALT_SYSMGR_ECC_NAND_RDFIFOSERR_SET(value) (((value) << 11) & 0x00000800) 9178 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_LSB 12 9180 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_MSB 12 9182 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_WIDTH 1 9184 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_SET_MSK 0x00001000 9186 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_CLR_MSK 0xffffefff 9188 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_RESET 0x0 9190 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_GET(value) (((value) & 0x00001000) >> 12) 9192 #define ALT_SYSMGR_ECC_NAND_RDFIFODERR_SET(value) (((value) << 12) & 0x00001000) 9194 #ifndef __ASSEMBLY__ 9208 uint32_t eccbufinjs : 1;
9209 uint32_t eccbufinjd : 1;
9210 uint32_t wrfifoinjs : 1;
9211 uint32_t wrfifoinjd : 1;
9212 uint32_t rdfifoinjs : 1;
9213 uint32_t rdfifoinjd : 1;
9214 uint32_t eccbufserr : 1;
9215 uint32_t eccbufderr : 1;
9216 uint32_t wrfifoserr : 1;
9217 uint32_t wrfifoderr : 1;
9218 uint32_t rdfifoserr : 1;
9219 uint32_t rdfifoderr : 1;
9228 #define ALT_SYSMGR_ECC_NAND_OFST 0x24 9260 #define ALT_SYSMGR_ECC_QSPI_EN_LSB 0 9262 #define ALT_SYSMGR_ECC_QSPI_EN_MSB 0 9264 #define ALT_SYSMGR_ECC_QSPI_EN_WIDTH 1 9266 #define ALT_SYSMGR_ECC_QSPI_EN_SET_MSK 0x00000001 9268 #define ALT_SYSMGR_ECC_QSPI_EN_CLR_MSK 0xfffffffe 9270 #define ALT_SYSMGR_ECC_QSPI_EN_RESET 0x0 9272 #define ALT_SYSMGR_ECC_QSPI_EN_GET(value) (((value) & 0x00000001) >> 0) 9274 #define ALT_SYSMGR_ECC_QSPI_EN_SET(value) (((value) << 0) & 0x00000001) 9286 #define ALT_SYSMGR_ECC_QSPI_INJS_LSB 1 9288 #define ALT_SYSMGR_ECC_QSPI_INJS_MSB 1 9290 #define ALT_SYSMGR_ECC_QSPI_INJS_WIDTH 1 9292 #define ALT_SYSMGR_ECC_QSPI_INJS_SET_MSK 0x00000002 9294 #define ALT_SYSMGR_ECC_QSPI_INJS_CLR_MSK 0xfffffffd 9296 #define ALT_SYSMGR_ECC_QSPI_INJS_RESET 0x0 9298 #define ALT_SYSMGR_ECC_QSPI_INJS_GET(value) (((value) & 0x00000002) >> 1) 9300 #define ALT_SYSMGR_ECC_QSPI_INJS_SET(value) (((value) << 1) & 0x00000002) 9312 #define ALT_SYSMGR_ECC_QSPI_INJD_LSB 2 9314 #define ALT_SYSMGR_ECC_QSPI_INJD_MSB 2 9316 #define ALT_SYSMGR_ECC_QSPI_INJD_WIDTH 1 9318 #define ALT_SYSMGR_ECC_QSPI_INJD_SET_MSK 0x00000004 9320 #define ALT_SYSMGR_ECC_QSPI_INJD_CLR_MSK 0xfffffffb 9322 #define ALT_SYSMGR_ECC_QSPI_INJD_RESET 0x0 9324 #define ALT_SYSMGR_ECC_QSPI_INJD_GET(value) (((value) & 0x00000004) >> 2) 9326 #define ALT_SYSMGR_ECC_QSPI_INJD_SET(value) (((value) << 2) & 0x00000004) 9339 #define ALT_SYSMGR_ECC_QSPI_SERR_LSB 3 9341 #define ALT_SYSMGR_ECC_QSPI_SERR_MSB 3 9343 #define ALT_SYSMGR_ECC_QSPI_SERR_WIDTH 1 9345 #define ALT_SYSMGR_ECC_QSPI_SERR_SET_MSK 0x00000008 9347 #define ALT_SYSMGR_ECC_QSPI_SERR_CLR_MSK 0xfffffff7 9349 #define ALT_SYSMGR_ECC_QSPI_SERR_RESET 0x0 9351 #define ALT_SYSMGR_ECC_QSPI_SERR_GET(value) (((value) & 0x00000008) >> 3) 9353 #define ALT_SYSMGR_ECC_QSPI_SERR_SET(value) (((value) << 3) & 0x00000008) 9366 #define ALT_SYSMGR_ECC_QSPI_DERR_LSB 4 9368 #define ALT_SYSMGR_ECC_QSPI_DERR_MSB 4 9370 #define ALT_SYSMGR_ECC_QSPI_DERR_WIDTH 1 9372 #define ALT_SYSMGR_ECC_QSPI_DERR_SET_MSK 0x00000010 9374 #define ALT_SYSMGR_ECC_QSPI_DERR_CLR_MSK 0xffffffef 9376 #define ALT_SYSMGR_ECC_QSPI_DERR_RESET 0x0 9378 #define ALT_SYSMGR_ECC_QSPI_DERR_GET(value) (((value) & 0x00000010) >> 4) 9380 #define ALT_SYSMGR_ECC_QSPI_DERR_SET(value) (((value) << 4) & 0x00000010) 9382 #ifndef __ASSEMBLY__ 9408 #define ALT_SYSMGR_ECC_QSPI_OFST 0x28 9443 #define ALT_SYSMGR_ECC_SDMMC_EN_LSB 0 9445 #define ALT_SYSMGR_ECC_SDMMC_EN_MSB 0 9447 #define ALT_SYSMGR_ECC_SDMMC_EN_WIDTH 1 9449 #define ALT_SYSMGR_ECC_SDMMC_EN_SET_MSK 0x00000001 9451 #define ALT_SYSMGR_ECC_SDMMC_EN_CLR_MSK 0xfffffffe 9453 #define ALT_SYSMGR_ECC_SDMMC_EN_RESET 0x0 9455 #define ALT_SYSMGR_ECC_SDMMC_EN_GET(value) (((value) & 0x00000001) >> 0) 9457 #define ALT_SYSMGR_ECC_SDMMC_EN_SET(value) (((value) << 0) & 0x00000001) 9469 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_LSB 1 9471 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_MSB 1 9473 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_WIDTH 1 9475 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET_MSK 0x00000002 9477 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_CLR_MSK 0xfffffffd 9479 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_RESET 0x0 9481 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_GET(value) (((value) & 0x00000002) >> 1) 9483 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTA_SET(value) (((value) << 1) & 0x00000002) 9496 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_LSB 2 9498 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_MSB 2 9500 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_WIDTH 1 9502 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET_MSK 0x00000004 9504 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_CLR_MSK 0xfffffffb 9506 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_RESET 0x0 9508 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_GET(value) (((value) & 0x00000004) >> 2) 9510 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTA_SET(value) (((value) << 2) & 0x00000004) 9522 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_LSB 3 9524 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_MSB 3 9526 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_WIDTH 1 9528 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET_MSK 0x00000008 9530 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_CLR_MSK 0xfffffff7 9532 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_RESET 0x0 9534 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_GET(value) (((value) & 0x00000008) >> 3) 9536 #define ALT_SYSMGR_ECC_SDMMC_INJSPORTB_SET(value) (((value) << 3) & 0x00000008) 9549 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_LSB 4 9551 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_MSB 4 9553 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_WIDTH 1 9555 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET_MSK 0x00000010 9557 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_CLR_MSK 0xffffffef 9559 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_RESET 0x0 9561 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_GET(value) (((value) & 0x00000010) >> 4) 9563 #define ALT_SYSMGR_ECC_SDMMC_INJDPORTB_SET(value) (((value) << 4) & 0x00000010) 9576 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_LSB 5 9578 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_MSB 5 9580 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_WIDTH 1 9582 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET_MSK 0x00000020 9584 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_CLR_MSK 0xffffffdf 9586 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_RESET 0x0 9588 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_GET(value) (((value) & 0x00000020) >> 5) 9590 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTA_SET(value) (((value) << 5) & 0x00000020) 9604 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_LSB 6 9606 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_MSB 6 9608 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_WIDTH 1 9610 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET_MSK 0x00000040 9612 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_CLR_MSK 0xffffffbf 9614 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_RESET 0x0 9616 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_GET(value) (((value) & 0x00000040) >> 6) 9618 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTA_SET(value) (((value) << 6) & 0x00000040) 9631 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_LSB 7 9633 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_MSB 7 9635 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_WIDTH 1 9637 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET_MSK 0x00000080 9639 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_CLR_MSK 0xffffff7f 9641 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_RESET 0x0 9643 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_GET(value) (((value) & 0x00000080) >> 7) 9645 #define ALT_SYSMGR_ECC_SDMMC_SERRPORTB_SET(value) (((value) << 7) & 0x00000080) 9659 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_LSB 8 9661 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_MSB 8 9663 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_WIDTH 1 9665 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET_MSK 0x00000100 9667 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_CLR_MSK 0xfffffeff 9669 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_RESET 0x0 9671 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_GET(value) (((value) & 0x00000100) >> 8) 9673 #define ALT_SYSMGR_ECC_SDMMC_DERRPORTB_SET(value) (((value) << 8) & 0x00000100) 9675 #ifndef __ASSEMBLY__ 9689 uint32_t injsporta : 1;
9690 uint32_t injdporta : 1;
9691 uint32_t injsportb : 1;
9692 uint32_t injdportb : 1;
9693 uint32_t serrporta : 1;
9694 uint32_t derrporta : 1;
9695 uint32_t serrportb : 1;
9696 uint32_t derrportb : 1;
9705 #define ALT_SYSMGR_ECC_SDMMC_OFST 0x2c 9707 #ifndef __ASSEMBLY__ 9720 volatile ALT_SYSMGR_ECC_L2_t l2;
9721 volatile ALT_SYSMGR_ECC_OCRAM_t ocram;
9722 volatile ALT_SYSMGR_ECC_USB0_t usb0;
9723 volatile ALT_SYSMGR_ECC_USB1_t usb1;
9724 volatile ALT_SYSMGR_ECC_EMAC0_t emac0;
9725 volatile ALT_SYSMGR_ECC_EMAC1_t emac1;
9726 volatile ALT_SYSMGR_ECC_DMA_t dma;
9727 volatile ALT_SYSMGR_ECC_CAN0_t can0;
9728 volatile ALT_SYSMGR_ECC_CAN1_t can1;
9729 volatile ALT_SYSMGR_ECC_NAND_t nand;
9730 volatile ALT_SYSMGR_ECC_QSPI_t qspi;
9731 volatile ALT_SYSMGR_ECC_SDMMC_t sdmmc;
9732 volatile uint32_t _pad_0x30_0x40[4];
9740 volatile uint32_t l2;
9741 volatile uint32_t ocram;
9742 volatile uint32_t usb0;
9743 volatile uint32_t usb1;
9744 volatile uint32_t emac0;
9745 volatile uint32_t emac1;
9746 volatile uint32_t dma;
9747 volatile uint32_t can0;
9748 volatile uint32_t can1;
9749 volatile uint32_t nand;
9750 volatile uint32_t qspi;
9751 volatile uint32_t sdmmc;
9752 volatile uint32_t _pad_0x30_0x40[4];
9805 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_LSB 0 9807 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_MSB 1 9809 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_WIDTH 2 9811 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_SET_MSK 0x00000003 9813 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_CLR_MSK 0xfffffffc 9815 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_RESET 0x0 9817 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_GET(value) (((value) & 0x00000003) >> 0) 9819 #define ALT_SYSMGR_PINMUX_EMACIO0_SEL_SET(value) (((value) << 0) & 0x00000003) 9821 #ifndef __ASSEMBLY__ 9843 #define ALT_SYSMGR_PINMUX_EMACIO0_OFST 0x0 9880 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_LSB 0 9882 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_MSB 1 9884 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_WIDTH 2 9886 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_SET_MSK 0x00000003 9888 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_CLR_MSK 0xfffffffc 9890 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_RESET 0x0 9892 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_GET(value) (((value) & 0x00000003) >> 0) 9894 #define ALT_SYSMGR_PINMUX_EMACIO1_SEL_SET(value) (((value) << 0) & 0x00000003) 9896 #ifndef __ASSEMBLY__ 9918 #define ALT_SYSMGR_PINMUX_EMACIO1_OFST 0x4 9955 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_LSB 0 9957 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_MSB 1 9959 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_WIDTH 2 9961 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_SET_MSK 0x00000003 9963 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_CLR_MSK 0xfffffffc 9965 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_RESET 0x0 9967 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_GET(value) (((value) & 0x00000003) >> 0) 9969 #define ALT_SYSMGR_PINMUX_EMACIO2_SEL_SET(value) (((value) << 0) & 0x00000003) 9971 #ifndef __ASSEMBLY__ 9993 #define ALT_SYSMGR_PINMUX_EMACIO2_OFST 0x8 10030 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_LSB 0 10032 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_MSB 1 10034 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_WIDTH 2 10036 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_SET_MSK 0x00000003 10038 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_CLR_MSK 0xfffffffc 10040 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_RESET 0x0 10042 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_GET(value) (((value) & 0x00000003) >> 0) 10044 #define ALT_SYSMGR_PINMUX_EMACIO3_SEL_SET(value) (((value) << 0) & 0x00000003) 10046 #ifndef __ASSEMBLY__ 10068 #define ALT_SYSMGR_PINMUX_EMACIO3_OFST 0xc 10105 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_LSB 0 10107 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_MSB 1 10109 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_WIDTH 2 10111 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_SET_MSK 0x00000003 10113 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_CLR_MSK 0xfffffffc 10115 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_RESET 0x0 10117 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_GET(value) (((value) & 0x00000003) >> 0) 10119 #define ALT_SYSMGR_PINMUX_EMACIO4_SEL_SET(value) (((value) << 0) & 0x00000003) 10121 #ifndef __ASSEMBLY__ 10143 #define ALT_SYSMGR_PINMUX_EMACIO4_OFST 0x10 10180 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_LSB 0 10182 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_MSB 1 10184 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_WIDTH 2 10186 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_SET_MSK 0x00000003 10188 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_CLR_MSK 0xfffffffc 10190 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_RESET 0x0 10192 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_GET(value) (((value) & 0x00000003) >> 0) 10194 #define ALT_SYSMGR_PINMUX_EMACIO5_SEL_SET(value) (((value) << 0) & 0x00000003) 10196 #ifndef __ASSEMBLY__ 10218 #define ALT_SYSMGR_PINMUX_EMACIO5_OFST 0x14 10255 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_LSB 0 10257 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_MSB 1 10259 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_WIDTH 2 10261 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_SET_MSK 0x00000003 10263 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_CLR_MSK 0xfffffffc 10265 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_RESET 0x0 10267 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_GET(value) (((value) & 0x00000003) >> 0) 10269 #define ALT_SYSMGR_PINMUX_EMACIO6_SEL_SET(value) (((value) << 0) & 0x00000003) 10271 #ifndef __ASSEMBLY__ 10293 #define ALT_SYSMGR_PINMUX_EMACIO6_OFST 0x18 10330 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_LSB 0 10332 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_MSB 1 10334 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_WIDTH 2 10336 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_SET_MSK 0x00000003 10338 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_CLR_MSK 0xfffffffc 10340 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_RESET 0x0 10342 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_GET(value) (((value) & 0x00000003) >> 0) 10344 #define ALT_SYSMGR_PINMUX_EMACIO7_SEL_SET(value) (((value) << 0) & 0x00000003) 10346 #ifndef __ASSEMBLY__ 10368 #define ALT_SYSMGR_PINMUX_EMACIO7_OFST 0x1c 10405 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_LSB 0 10407 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_MSB 1 10409 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_WIDTH 2 10411 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_SET_MSK 0x00000003 10413 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_CLR_MSK 0xfffffffc 10415 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_RESET 0x0 10417 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_GET(value) (((value) & 0x00000003) >> 0) 10419 #define ALT_SYSMGR_PINMUX_EMACIO8_SEL_SET(value) (((value) << 0) & 0x00000003) 10421 #ifndef __ASSEMBLY__ 10443 #define ALT_SYSMGR_PINMUX_EMACIO8_OFST 0x20 10480 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_LSB 0 10482 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_MSB 1 10484 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_WIDTH 2 10486 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_SET_MSK 0x00000003 10488 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_CLR_MSK 0xfffffffc 10490 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_RESET 0x0 10492 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_GET(value) (((value) & 0x00000003) >> 0) 10494 #define ALT_SYSMGR_PINMUX_EMACIO9_SEL_SET(value) (((value) << 0) & 0x00000003) 10496 #ifndef __ASSEMBLY__ 10518 #define ALT_SYSMGR_PINMUX_EMACIO9_OFST 0x24 10555 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_LSB 0 10557 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_MSB 1 10559 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_WIDTH 2 10561 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_SET_MSK 0x00000003 10563 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_CLR_MSK 0xfffffffc 10565 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_RESET 0x0 10567 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_GET(value) (((value) & 0x00000003) >> 0) 10569 #define ALT_SYSMGR_PINMUX_EMACIO10_SEL_SET(value) (((value) << 0) & 0x00000003) 10571 #ifndef __ASSEMBLY__ 10593 #define ALT_SYSMGR_PINMUX_EMACIO10_OFST 0x28 10630 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_LSB 0 10632 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_MSB 1 10634 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_WIDTH 2 10636 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_SET_MSK 0x00000003 10638 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_CLR_MSK 0xfffffffc 10640 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_RESET 0x0 10642 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_GET(value) (((value) & 0x00000003) >> 0) 10644 #define ALT_SYSMGR_PINMUX_EMACIO11_SEL_SET(value) (((value) << 0) & 0x00000003) 10646 #ifndef __ASSEMBLY__ 10668 #define ALT_SYSMGR_PINMUX_EMACIO11_OFST 0x2c 10705 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_LSB 0 10707 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_MSB 1 10709 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_WIDTH 2 10711 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_SET_MSK 0x00000003 10713 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_CLR_MSK 0xfffffffc 10715 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_RESET 0x0 10717 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_GET(value) (((value) & 0x00000003) >> 0) 10719 #define ALT_SYSMGR_PINMUX_EMACIO12_SEL_SET(value) (((value) << 0) & 0x00000003) 10721 #ifndef __ASSEMBLY__ 10743 #define ALT_SYSMGR_PINMUX_EMACIO12_OFST 0x30 10780 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_LSB 0 10782 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_MSB 1 10784 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_WIDTH 2 10786 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_SET_MSK 0x00000003 10788 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_CLR_MSK 0xfffffffc 10790 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_RESET 0x0 10792 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_GET(value) (((value) & 0x00000003) >> 0) 10794 #define ALT_SYSMGR_PINMUX_EMACIO13_SEL_SET(value) (((value) << 0) & 0x00000003) 10796 #ifndef __ASSEMBLY__ 10818 #define ALT_SYSMGR_PINMUX_EMACIO13_OFST 0x34 10855 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_LSB 0 10857 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_MSB 1 10859 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_WIDTH 2 10861 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_SET_MSK 0x00000003 10863 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_CLR_MSK 0xfffffffc 10865 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_RESET 0x0 10867 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_GET(value) (((value) & 0x00000003) >> 0) 10869 #define ALT_SYSMGR_PINMUX_EMACIO14_SEL_SET(value) (((value) << 0) & 0x00000003) 10871 #ifndef __ASSEMBLY__ 10893 #define ALT_SYSMGR_PINMUX_EMACIO14_OFST 0x38 10930 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_LSB 0 10932 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_MSB 1 10934 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_WIDTH 2 10936 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_SET_MSK 0x00000003 10938 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_CLR_MSK 0xfffffffc 10940 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_RESET 0x0 10942 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_GET(value) (((value) & 0x00000003) >> 0) 10944 #define ALT_SYSMGR_PINMUX_EMACIO15_SEL_SET(value) (((value) << 0) & 0x00000003) 10946 #ifndef __ASSEMBLY__ 10968 #define ALT_SYSMGR_PINMUX_EMACIO15_OFST 0x3c 11005 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_LSB 0 11007 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_MSB 1 11009 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_WIDTH 2 11011 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_SET_MSK 0x00000003 11013 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_CLR_MSK 0xfffffffc 11015 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_RESET 0x0 11017 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_GET(value) (((value) & 0x00000003) >> 0) 11019 #define ALT_SYSMGR_PINMUX_EMACIO16_SEL_SET(value) (((value) << 0) & 0x00000003) 11021 #ifndef __ASSEMBLY__ 11043 #define ALT_SYSMGR_PINMUX_EMACIO16_OFST 0x40 11080 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_LSB 0 11082 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_MSB 1 11084 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_WIDTH 2 11086 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_SET_MSK 0x00000003 11088 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_CLR_MSK 0xfffffffc 11090 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_RESET 0x0 11092 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_GET(value) (((value) & 0x00000003) >> 0) 11094 #define ALT_SYSMGR_PINMUX_EMACIO17_SEL_SET(value) (((value) << 0) & 0x00000003) 11096 #ifndef __ASSEMBLY__ 11118 #define ALT_SYSMGR_PINMUX_EMACIO17_OFST 0x44 11155 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_LSB 0 11157 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_MSB 1 11159 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_WIDTH 2 11161 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_SET_MSK 0x00000003 11163 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_CLR_MSK 0xfffffffc 11165 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_RESET 0x0 11167 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_GET(value) (((value) & 0x00000003) >> 0) 11169 #define ALT_SYSMGR_PINMUX_EMACIO18_SEL_SET(value) (((value) << 0) & 0x00000003) 11171 #ifndef __ASSEMBLY__ 11193 #define ALT_SYSMGR_PINMUX_EMACIO18_OFST 0x48 11230 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_LSB 0 11232 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_MSB 1 11234 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_WIDTH 2 11236 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_SET_MSK 0x00000003 11238 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_CLR_MSK 0xfffffffc 11240 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_RESET 0x0 11242 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_GET(value) (((value) & 0x00000003) >> 0) 11244 #define ALT_SYSMGR_PINMUX_EMACIO19_SEL_SET(value) (((value) << 0) & 0x00000003) 11246 #ifndef __ASSEMBLY__ 11268 #define ALT_SYSMGR_PINMUX_EMACIO19_OFST 0x4c 11305 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_LSB 0 11307 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_MSB 1 11309 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_WIDTH 2 11311 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_SET_MSK 0x00000003 11313 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_CLR_MSK 0xfffffffc 11315 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_RESET 0x0 11317 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_GET(value) (((value) & 0x00000003) >> 0) 11319 #define ALT_SYSMGR_PINMUX_FLSHIO0_SEL_SET(value) (((value) << 0) & 0x00000003) 11321 #ifndef __ASSEMBLY__ 11343 #define ALT_SYSMGR_PINMUX_FLSHIO0_OFST 0x50 11380 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_LSB 0 11382 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_MSB 1 11384 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_WIDTH 2 11386 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_SET_MSK 0x00000003 11388 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_CLR_MSK 0xfffffffc 11390 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_RESET 0x0 11392 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_GET(value) (((value) & 0x00000003) >> 0) 11394 #define ALT_SYSMGR_PINMUX_FLSHIO1_SEL_SET(value) (((value) << 0) & 0x00000003) 11396 #ifndef __ASSEMBLY__ 11418 #define ALT_SYSMGR_PINMUX_FLSHIO1_OFST 0x54 11455 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_LSB 0 11457 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_MSB 1 11459 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_WIDTH 2 11461 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_SET_MSK 0x00000003 11463 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_CLR_MSK 0xfffffffc 11465 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_RESET 0x0 11467 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_GET(value) (((value) & 0x00000003) >> 0) 11469 #define ALT_SYSMGR_PINMUX_FLSHIO2_SEL_SET(value) (((value) << 0) & 0x00000003) 11471 #ifndef __ASSEMBLY__ 11493 #define ALT_SYSMGR_PINMUX_FLSHIO2_OFST 0x58 11530 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_LSB 0 11532 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_MSB 1 11534 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_WIDTH 2 11536 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_SET_MSK 0x00000003 11538 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_CLR_MSK 0xfffffffc 11540 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_RESET 0x0 11542 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_GET(value) (((value) & 0x00000003) >> 0) 11544 #define ALT_SYSMGR_PINMUX_FLSHIO3_SEL_SET(value) (((value) << 0) & 0x00000003) 11546 #ifndef __ASSEMBLY__ 11568 #define ALT_SYSMGR_PINMUX_FLSHIO3_OFST 0x5c 11605 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_LSB 0 11607 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_MSB 1 11609 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_WIDTH 2 11611 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_SET_MSK 0x00000003 11613 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_CLR_MSK 0xfffffffc 11615 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_RESET 0x0 11617 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_GET(value) (((value) & 0x00000003) >> 0) 11619 #define ALT_SYSMGR_PINMUX_FLSHIO4_SEL_SET(value) (((value) << 0) & 0x00000003) 11621 #ifndef __ASSEMBLY__ 11643 #define ALT_SYSMGR_PINMUX_FLSHIO4_OFST 0x60 11680 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_LSB 0 11682 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_MSB 1 11684 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_WIDTH 2 11686 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_SET_MSK 0x00000003 11688 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_CLR_MSK 0xfffffffc 11690 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_RESET 0x0 11692 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_GET(value) (((value) & 0x00000003) >> 0) 11694 #define ALT_SYSMGR_PINMUX_FLSHIO5_SEL_SET(value) (((value) << 0) & 0x00000003) 11696 #ifndef __ASSEMBLY__ 11718 #define ALT_SYSMGR_PINMUX_FLSHIO5_OFST 0x64 11755 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_LSB 0 11757 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_MSB 1 11759 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_WIDTH 2 11761 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_SET_MSK 0x00000003 11763 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_CLR_MSK 0xfffffffc 11765 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_RESET 0x0 11767 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_GET(value) (((value) & 0x00000003) >> 0) 11769 #define ALT_SYSMGR_PINMUX_FLSHIO6_SEL_SET(value) (((value) << 0) & 0x00000003) 11771 #ifndef __ASSEMBLY__ 11793 #define ALT_SYSMGR_PINMUX_FLSHIO6_OFST 0x68 11830 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_LSB 0 11832 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_MSB 1 11834 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_WIDTH 2 11836 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_SET_MSK 0x00000003 11838 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_CLR_MSK 0xfffffffc 11840 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_RESET 0x0 11842 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_GET(value) (((value) & 0x00000003) >> 0) 11844 #define ALT_SYSMGR_PINMUX_FLSHIO7_SEL_SET(value) (((value) << 0) & 0x00000003) 11846 #ifndef __ASSEMBLY__ 11868 #define ALT_SYSMGR_PINMUX_FLSHIO7_OFST 0x6c 11905 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_LSB 0 11907 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_MSB 1 11909 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_WIDTH 2 11911 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_SET_MSK 0x00000003 11913 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_CLR_MSK 0xfffffffc 11915 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_RESET 0x0 11917 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_GET(value) (((value) & 0x00000003) >> 0) 11919 #define ALT_SYSMGR_PINMUX_FLSHIO8_SEL_SET(value) (((value) << 0) & 0x00000003) 11921 #ifndef __ASSEMBLY__ 11943 #define ALT_SYSMGR_PINMUX_FLSHIO8_OFST 0x70 11980 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_LSB 0 11982 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_MSB 1 11984 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_WIDTH 2 11986 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_SET_MSK 0x00000003 11988 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_CLR_MSK 0xfffffffc 11990 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_RESET 0x0 11992 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_GET(value) (((value) & 0x00000003) >> 0) 11994 #define ALT_SYSMGR_PINMUX_FLSHIO9_SEL_SET(value) (((value) << 0) & 0x00000003) 11996 #ifndef __ASSEMBLY__ 12018 #define ALT_SYSMGR_PINMUX_FLSHIO9_OFST 0x74 12055 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_LSB 0 12057 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_MSB 1 12059 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_WIDTH 2 12061 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_SET_MSK 0x00000003 12063 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_CLR_MSK 0xfffffffc 12065 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_RESET 0x0 12067 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_GET(value) (((value) & 0x00000003) >> 0) 12069 #define ALT_SYSMGR_PINMUX_FLSHIO10_SEL_SET(value) (((value) << 0) & 0x00000003) 12071 #ifndef __ASSEMBLY__ 12093 #define ALT_SYSMGR_PINMUX_FLSHIO10_OFST 0x78 12130 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_LSB 0 12132 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_MSB 1 12134 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_WIDTH 2 12136 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_SET_MSK 0x00000003 12138 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_CLR_MSK 0xfffffffc 12140 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_RESET 0x0 12142 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_GET(value) (((value) & 0x00000003) >> 0) 12144 #define ALT_SYSMGR_PINMUX_FLSHIO11_SEL_SET(value) (((value) << 0) & 0x00000003) 12146 #ifndef __ASSEMBLY__ 12168 #define ALT_SYSMGR_PINMUX_FLSHIO11_OFST 0x7c 12205 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_LSB 0 12207 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_MSB 1 12209 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_WIDTH 2 12211 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_SET_MSK 0x00000003 12213 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_CLR_MSK 0xfffffffc 12215 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_RESET 0x0 12217 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_GET(value) (((value) & 0x00000003) >> 0) 12219 #define ALT_SYSMGR_PINMUX_GENERALIO0_SEL_SET(value) (((value) << 0) & 0x00000003) 12221 #ifndef __ASSEMBLY__ 12243 #define ALT_SYSMGR_PINMUX_GENERALIO0_OFST 0x80 12280 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_LSB 0 12282 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_MSB 1 12284 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_WIDTH 2 12286 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_SET_MSK 0x00000003 12288 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_CLR_MSK 0xfffffffc 12290 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_RESET 0x0 12292 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_GET(value) (((value) & 0x00000003) >> 0) 12294 #define ALT_SYSMGR_PINMUX_GENERALIO1_SEL_SET(value) (((value) << 0) & 0x00000003) 12296 #ifndef __ASSEMBLY__ 12318 #define ALT_SYSMGR_PINMUX_GENERALIO1_OFST 0x84 12355 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_LSB 0 12357 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_MSB 1 12359 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_WIDTH 2 12361 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_SET_MSK 0x00000003 12363 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_CLR_MSK 0xfffffffc 12365 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_RESET 0x0 12367 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_GET(value) (((value) & 0x00000003) >> 0) 12369 #define ALT_SYSMGR_PINMUX_GENERALIO2_SEL_SET(value) (((value) << 0) & 0x00000003) 12371 #ifndef __ASSEMBLY__ 12393 #define ALT_SYSMGR_PINMUX_GENERALIO2_OFST 0x88 12430 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_LSB 0 12432 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_MSB 1 12434 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_WIDTH 2 12436 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_SET_MSK 0x00000003 12438 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_CLR_MSK 0xfffffffc 12440 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_RESET 0x0 12442 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_GET(value) (((value) & 0x00000003) >> 0) 12444 #define ALT_SYSMGR_PINMUX_GENERALIO3_SEL_SET(value) (((value) << 0) & 0x00000003) 12446 #ifndef __ASSEMBLY__ 12468 #define ALT_SYSMGR_PINMUX_GENERALIO3_OFST 0x8c 12505 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_LSB 0 12507 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_MSB 1 12509 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_WIDTH 2 12511 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_SET_MSK 0x00000003 12513 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_CLR_MSK 0xfffffffc 12515 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_RESET 0x0 12517 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_GET(value) (((value) & 0x00000003) >> 0) 12519 #define ALT_SYSMGR_PINMUX_GENERALIO4_SEL_SET(value) (((value) << 0) & 0x00000003) 12521 #ifndef __ASSEMBLY__ 12543 #define ALT_SYSMGR_PINMUX_GENERALIO4_OFST 0x90 12580 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_LSB 0 12582 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_MSB 1 12584 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_WIDTH 2 12586 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_SET_MSK 0x00000003 12588 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_CLR_MSK 0xfffffffc 12590 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_RESET 0x0 12592 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_GET(value) (((value) & 0x00000003) >> 0) 12594 #define ALT_SYSMGR_PINMUX_GENERALIO5_SEL_SET(value) (((value) << 0) & 0x00000003) 12596 #ifndef __ASSEMBLY__ 12618 #define ALT_SYSMGR_PINMUX_GENERALIO5_OFST 0x94 12655 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_LSB 0 12657 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_MSB 1 12659 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_WIDTH 2 12661 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_SET_MSK 0x00000003 12663 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_CLR_MSK 0xfffffffc 12665 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_RESET 0x0 12667 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_GET(value) (((value) & 0x00000003) >> 0) 12669 #define ALT_SYSMGR_PINMUX_GENERALIO6_SEL_SET(value) (((value) << 0) & 0x00000003) 12671 #ifndef __ASSEMBLY__ 12693 #define ALT_SYSMGR_PINMUX_GENERALIO6_OFST 0x98 12730 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_LSB 0 12732 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_MSB 1 12734 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_WIDTH 2 12736 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_SET_MSK 0x00000003 12738 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_CLR_MSK 0xfffffffc 12740 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_RESET 0x0 12742 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_GET(value) (((value) & 0x00000003) >> 0) 12744 #define ALT_SYSMGR_PINMUX_GENERALIO7_SEL_SET(value) (((value) << 0) & 0x00000003) 12746 #ifndef __ASSEMBLY__ 12768 #define ALT_SYSMGR_PINMUX_GENERALIO7_OFST 0x9c 12805 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_LSB 0 12807 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_MSB 1 12809 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_WIDTH 2 12811 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_SET_MSK 0x00000003 12813 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_CLR_MSK 0xfffffffc 12815 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_RESET 0x0 12817 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_GET(value) (((value) & 0x00000003) >> 0) 12819 #define ALT_SYSMGR_PINMUX_GENERALIO8_SEL_SET(value) (((value) << 0) & 0x00000003) 12821 #ifndef __ASSEMBLY__ 12843 #define ALT_SYSMGR_PINMUX_GENERALIO8_OFST 0xa0 12880 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_LSB 0 12882 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_MSB 1 12884 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_WIDTH 2 12886 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_SET_MSK 0x00000003 12888 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_CLR_MSK 0xfffffffc 12890 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_RESET 0x0 12892 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_GET(value) (((value) & 0x00000003) >> 0) 12894 #define ALT_SYSMGR_PINMUX_GENERALIO9_SEL_SET(value) (((value) << 0) & 0x00000003) 12896 #ifndef __ASSEMBLY__ 12918 #define ALT_SYSMGR_PINMUX_GENERALIO9_OFST 0xa4 12955 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_LSB 0 12957 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_MSB 1 12959 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_WIDTH 2 12961 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_SET_MSK 0x00000003 12963 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_CLR_MSK 0xfffffffc 12965 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_RESET 0x0 12967 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_GET(value) (((value) & 0x00000003) >> 0) 12969 #define ALT_SYSMGR_PINMUX_GENERALIO10_SEL_SET(value) (((value) << 0) & 0x00000003) 12971 #ifndef __ASSEMBLY__ 12993 #define ALT_SYSMGR_PINMUX_GENERALIO10_OFST 0xa8 13030 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_LSB 0 13032 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_MSB 1 13034 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_WIDTH 2 13036 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_SET_MSK 0x00000003 13038 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_CLR_MSK 0xfffffffc 13040 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_RESET 0x0 13042 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_GET(value) (((value) & 0x00000003) >> 0) 13044 #define ALT_SYSMGR_PINMUX_GENERALIO11_SEL_SET(value) (((value) << 0) & 0x00000003) 13046 #ifndef __ASSEMBLY__ 13068 #define ALT_SYSMGR_PINMUX_GENERALIO11_OFST 0xac 13105 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_LSB 0 13107 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_MSB 1 13109 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_WIDTH 2 13111 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_SET_MSK 0x00000003 13113 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_CLR_MSK 0xfffffffc 13115 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_RESET 0x0 13117 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_GET(value) (((value) & 0x00000003) >> 0) 13119 #define ALT_SYSMGR_PINMUX_GENERALIO12_SEL_SET(value) (((value) << 0) & 0x00000003) 13121 #ifndef __ASSEMBLY__ 13143 #define ALT_SYSMGR_PINMUX_GENERALIO12_OFST 0xb0 13180 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_LSB 0 13182 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_MSB 1 13184 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_WIDTH 2 13186 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_SET_MSK 0x00000003 13188 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_CLR_MSK 0xfffffffc 13190 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_RESET 0x0 13192 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_GET(value) (((value) & 0x00000003) >> 0) 13194 #define ALT_SYSMGR_PINMUX_GENERALIO13_SEL_SET(value) (((value) << 0) & 0x00000003) 13196 #ifndef __ASSEMBLY__ 13218 #define ALT_SYSMGR_PINMUX_GENERALIO13_OFST 0xb4 13255 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_LSB 0 13257 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_MSB 1 13259 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_WIDTH 2 13261 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_SET_MSK 0x00000003 13263 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_CLR_MSK 0xfffffffc 13265 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_RESET 0x0 13267 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_GET(value) (((value) & 0x00000003) >> 0) 13269 #define ALT_SYSMGR_PINMUX_GENERALIO14_SEL_SET(value) (((value) << 0) & 0x00000003) 13271 #ifndef __ASSEMBLY__ 13293 #define ALT_SYSMGR_PINMUX_GENERALIO14_OFST 0xb8 13330 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_LSB 0 13332 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_MSB 1 13334 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_WIDTH 2 13336 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_SET_MSK 0x00000003 13338 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_CLR_MSK 0xfffffffc 13340 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_RESET 0x0 13342 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_GET(value) (((value) & 0x00000003) >> 0) 13344 #define ALT_SYSMGR_PINMUX_GENERALIO15_SEL_SET(value) (((value) << 0) & 0x00000003) 13346 #ifndef __ASSEMBLY__ 13368 #define ALT_SYSMGR_PINMUX_GENERALIO15_OFST 0xbc 13405 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_LSB 0 13407 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_MSB 1 13409 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_WIDTH 2 13411 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_SET_MSK 0x00000003 13413 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_CLR_MSK 0xfffffffc 13415 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_RESET 0x0 13417 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_GET(value) (((value) & 0x00000003) >> 0) 13419 #define ALT_SYSMGR_PINMUX_GENERALIO16_SEL_SET(value) (((value) << 0) & 0x00000003) 13421 #ifndef __ASSEMBLY__ 13443 #define ALT_SYSMGR_PINMUX_GENERALIO16_OFST 0xc0 13480 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_LSB 0 13482 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_MSB 1 13484 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_WIDTH 2 13486 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_SET_MSK 0x00000003 13488 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_CLR_MSK 0xfffffffc 13490 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_RESET 0x0 13492 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_GET(value) (((value) & 0x00000003) >> 0) 13494 #define ALT_SYSMGR_PINMUX_GENERALIO17_SEL_SET(value) (((value) << 0) & 0x00000003) 13496 #ifndef __ASSEMBLY__ 13518 #define ALT_SYSMGR_PINMUX_GENERALIO17_OFST 0xc4 13555 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_LSB 0 13557 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_MSB 1 13559 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_WIDTH 2 13561 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_SET_MSK 0x00000003 13563 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_CLR_MSK 0xfffffffc 13565 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_RESET 0x0 13567 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_GET(value) (((value) & 0x00000003) >> 0) 13569 #define ALT_SYSMGR_PINMUX_GENERALIO18_SEL_SET(value) (((value) << 0) & 0x00000003) 13571 #ifndef __ASSEMBLY__ 13593 #define ALT_SYSMGR_PINMUX_GENERALIO18_OFST 0xc8 13630 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_LSB 0 13632 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_MSB 1 13634 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_WIDTH 2 13636 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_SET_MSK 0x00000003 13638 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_CLR_MSK 0xfffffffc 13640 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_RESET 0x0 13642 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_GET(value) (((value) & 0x00000003) >> 0) 13644 #define ALT_SYSMGR_PINMUX_GENERALIO19_SEL_SET(value) (((value) << 0) & 0x00000003) 13646 #ifndef __ASSEMBLY__ 13668 #define ALT_SYSMGR_PINMUX_GENERALIO19_OFST 0xcc 13705 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_LSB 0 13707 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_MSB 1 13709 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_WIDTH 2 13711 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_SET_MSK 0x00000003 13713 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_CLR_MSK 0xfffffffc 13715 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_RESET 0x0 13717 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_GET(value) (((value) & 0x00000003) >> 0) 13719 #define ALT_SYSMGR_PINMUX_GENERALIO20_SEL_SET(value) (((value) << 0) & 0x00000003) 13721 #ifndef __ASSEMBLY__ 13743 #define ALT_SYSMGR_PINMUX_GENERALIO20_OFST 0xd0 13780 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_LSB 0 13782 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_MSB 1 13784 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_WIDTH 2 13786 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_SET_MSK 0x00000003 13788 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_CLR_MSK 0xfffffffc 13790 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_RESET 0x0 13792 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_GET(value) (((value) & 0x00000003) >> 0) 13794 #define ALT_SYSMGR_PINMUX_GENERALIO21_SEL_SET(value) (((value) << 0) & 0x00000003) 13796 #ifndef __ASSEMBLY__ 13818 #define ALT_SYSMGR_PINMUX_GENERALIO21_OFST 0xd4 13855 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_LSB 0 13857 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_MSB 1 13859 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_WIDTH 2 13861 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_SET_MSK 0x00000003 13863 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_CLR_MSK 0xfffffffc 13865 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_RESET 0x0 13867 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_GET(value) (((value) & 0x00000003) >> 0) 13869 #define ALT_SYSMGR_PINMUX_GENERALIO22_SEL_SET(value) (((value) << 0) & 0x00000003) 13871 #ifndef __ASSEMBLY__ 13893 #define ALT_SYSMGR_PINMUX_GENERALIO22_OFST 0xd8 13930 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_LSB 0 13932 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_MSB 1 13934 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_WIDTH 2 13936 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_SET_MSK 0x00000003 13938 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_CLR_MSK 0xfffffffc 13940 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_RESET 0x0 13942 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_GET(value) (((value) & 0x00000003) >> 0) 13944 #define ALT_SYSMGR_PINMUX_GENERALIO23_SEL_SET(value) (((value) << 0) & 0x00000003) 13946 #ifndef __ASSEMBLY__ 13968 #define ALT_SYSMGR_PINMUX_GENERALIO23_OFST 0xdc 14005 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_LSB 0 14007 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_MSB 1 14009 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_WIDTH 2 14011 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_SET_MSK 0x00000003 14013 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_CLR_MSK 0xfffffffc 14015 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_RESET 0x0 14017 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_GET(value) (((value) & 0x00000003) >> 0) 14019 #define ALT_SYSMGR_PINMUX_GENERALIO24_SEL_SET(value) (((value) << 0) & 0x00000003) 14021 #ifndef __ASSEMBLY__ 14043 #define ALT_SYSMGR_PINMUX_GENERALIO24_OFST 0xe0 14080 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_LSB 0 14082 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_MSB 1 14084 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_WIDTH 2 14086 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_SET_MSK 0x00000003 14088 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_CLR_MSK 0xfffffffc 14090 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_RESET 0x0 14092 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_GET(value) (((value) & 0x00000003) >> 0) 14094 #define ALT_SYSMGR_PINMUX_GENERALIO25_SEL_SET(value) (((value) << 0) & 0x00000003) 14096 #ifndef __ASSEMBLY__ 14118 #define ALT_SYSMGR_PINMUX_GENERALIO25_OFST 0xe4 14155 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_LSB 0 14157 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_MSB 1 14159 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_WIDTH 2 14161 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_SET_MSK 0x00000003 14163 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_CLR_MSK 0xfffffffc 14165 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_RESET 0x0 14167 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_GET(value) (((value) & 0x00000003) >> 0) 14169 #define ALT_SYSMGR_PINMUX_GENERALIO26_SEL_SET(value) (((value) << 0) & 0x00000003) 14171 #ifndef __ASSEMBLY__ 14193 #define ALT_SYSMGR_PINMUX_GENERALIO26_OFST 0xe8 14230 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_LSB 0 14232 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_MSB 1 14234 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_WIDTH 2 14236 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_SET_MSK 0x00000003 14238 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_CLR_MSK 0xfffffffc 14240 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_RESET 0x0 14242 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_GET(value) (((value) & 0x00000003) >> 0) 14244 #define ALT_SYSMGR_PINMUX_GENERALIO27_SEL_SET(value) (((value) << 0) & 0x00000003) 14246 #ifndef __ASSEMBLY__ 14268 #define ALT_SYSMGR_PINMUX_GENERALIO27_OFST 0xec 14305 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_LSB 0 14307 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_MSB 1 14309 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_WIDTH 2 14311 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_SET_MSK 0x00000003 14313 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_CLR_MSK 0xfffffffc 14315 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_RESET 0x0 14317 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_GET(value) (((value) & 0x00000003) >> 0) 14319 #define ALT_SYSMGR_PINMUX_GENERALIO28_SEL_SET(value) (((value) << 0) & 0x00000003) 14321 #ifndef __ASSEMBLY__ 14343 #define ALT_SYSMGR_PINMUX_GENERALIO28_OFST 0xf0 14380 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_LSB 0 14382 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_MSB 1 14384 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_WIDTH 2 14386 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_SET_MSK 0x00000003 14388 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_CLR_MSK 0xfffffffc 14390 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_RESET 0x0 14392 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_GET(value) (((value) & 0x00000003) >> 0) 14394 #define ALT_SYSMGR_PINMUX_GENERALIO29_SEL_SET(value) (((value) << 0) & 0x00000003) 14396 #ifndef __ASSEMBLY__ 14418 #define ALT_SYSMGR_PINMUX_GENERALIO29_OFST 0xf4 14455 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_LSB 0 14457 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_MSB 1 14459 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_WIDTH 2 14461 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_SET_MSK 0x00000003 14463 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_CLR_MSK 0xfffffffc 14465 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_RESET 0x0 14467 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_GET(value) (((value) & 0x00000003) >> 0) 14469 #define ALT_SYSMGR_PINMUX_GENERALIO30_SEL_SET(value) (((value) << 0) & 0x00000003) 14471 #ifndef __ASSEMBLY__ 14493 #define ALT_SYSMGR_PINMUX_GENERALIO30_OFST 0xf8 14530 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_LSB 0 14532 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_MSB 1 14534 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_WIDTH 2 14536 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_SET_MSK 0x00000003 14538 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_CLR_MSK 0xfffffffc 14540 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_RESET 0x0 14542 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_GET(value) (((value) & 0x00000003) >> 0) 14544 #define ALT_SYSMGR_PINMUX_GENERALIO31_SEL_SET(value) (((value) << 0) & 0x00000003) 14546 #ifndef __ASSEMBLY__ 14568 #define ALT_SYSMGR_PINMUX_GENERALIO31_OFST 0xfc 14605 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_LSB 0 14607 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_MSB 1 14609 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_WIDTH 2 14611 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_SET_MSK 0x00000003 14613 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_CLR_MSK 0xfffffffc 14615 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_RESET 0x0 14617 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_GET(value) (((value) & 0x00000003) >> 0) 14619 #define ALT_SYSMGR_PINMUX_MIXED1IO0_SEL_SET(value) (((value) << 0) & 0x00000003) 14621 #ifndef __ASSEMBLY__ 14643 #define ALT_SYSMGR_PINMUX_MIXED1IO0_OFST 0x100 14680 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_LSB 0 14682 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_MSB 1 14684 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_WIDTH 2 14686 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_SET_MSK 0x00000003 14688 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_CLR_MSK 0xfffffffc 14690 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_RESET 0x0 14692 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_GET(value) (((value) & 0x00000003) >> 0) 14694 #define ALT_SYSMGR_PINMUX_MIXED1IO1_SEL_SET(value) (((value) << 0) & 0x00000003) 14696 #ifndef __ASSEMBLY__ 14718 #define ALT_SYSMGR_PINMUX_MIXED1IO1_OFST 0x104 14755 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_LSB 0 14757 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_MSB 1 14759 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_WIDTH 2 14761 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_SET_MSK 0x00000003 14763 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_CLR_MSK 0xfffffffc 14765 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_RESET 0x0 14767 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_GET(value) (((value) & 0x00000003) >> 0) 14769 #define ALT_SYSMGR_PINMUX_MIXED1IO2_SEL_SET(value) (((value) << 0) & 0x00000003) 14771 #ifndef __ASSEMBLY__ 14793 #define ALT_SYSMGR_PINMUX_MIXED1IO2_OFST 0x108 14830 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_LSB 0 14832 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_MSB 1 14834 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_WIDTH 2 14836 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_SET_MSK 0x00000003 14838 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_CLR_MSK 0xfffffffc 14840 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_RESET 0x0 14842 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_GET(value) (((value) & 0x00000003) >> 0) 14844 #define ALT_SYSMGR_PINMUX_MIXED1IO3_SEL_SET(value) (((value) << 0) & 0x00000003) 14846 #ifndef __ASSEMBLY__ 14868 #define ALT_SYSMGR_PINMUX_MIXED1IO3_OFST 0x10c 14905 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_LSB 0 14907 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_MSB 1 14909 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_WIDTH 2 14911 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_SET_MSK 0x00000003 14913 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_CLR_MSK 0xfffffffc 14915 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_RESET 0x0 14917 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_GET(value) (((value) & 0x00000003) >> 0) 14919 #define ALT_SYSMGR_PINMUX_MIXED1IO4_SEL_SET(value) (((value) << 0) & 0x00000003) 14921 #ifndef __ASSEMBLY__ 14943 #define ALT_SYSMGR_PINMUX_MIXED1IO4_OFST 0x110 14980 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_LSB 0 14982 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_MSB 1 14984 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_WIDTH 2 14986 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_SET_MSK 0x00000003 14988 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_CLR_MSK 0xfffffffc 14990 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_RESET 0x0 14992 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_GET(value) (((value) & 0x00000003) >> 0) 14994 #define ALT_SYSMGR_PINMUX_MIXED1IO5_SEL_SET(value) (((value) << 0) & 0x00000003) 14996 #ifndef __ASSEMBLY__ 15018 #define ALT_SYSMGR_PINMUX_MIXED1IO5_OFST 0x114 15055 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_LSB 0 15057 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_MSB 1 15059 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_WIDTH 2 15061 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_SET_MSK 0x00000003 15063 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_CLR_MSK 0xfffffffc 15065 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_RESET 0x0 15067 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_GET(value) (((value) & 0x00000003) >> 0) 15069 #define ALT_SYSMGR_PINMUX_MIXED1IO6_SEL_SET(value) (((value) << 0) & 0x00000003) 15071 #ifndef __ASSEMBLY__ 15093 #define ALT_SYSMGR_PINMUX_MIXED1IO6_OFST 0x118 15130 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_LSB 0 15132 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_MSB 1 15134 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_WIDTH 2 15136 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_SET_MSK 0x00000003 15138 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_CLR_MSK 0xfffffffc 15140 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_RESET 0x0 15142 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_GET(value) (((value) & 0x00000003) >> 0) 15144 #define ALT_SYSMGR_PINMUX_MIXED1IO7_SEL_SET(value) (((value) << 0) & 0x00000003) 15146 #ifndef __ASSEMBLY__ 15168 #define ALT_SYSMGR_PINMUX_MIXED1IO7_OFST 0x11c 15205 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_LSB 0 15207 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_MSB 1 15209 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_WIDTH 2 15211 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_SET_MSK 0x00000003 15213 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_CLR_MSK 0xfffffffc 15215 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_RESET 0x0 15217 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_GET(value) (((value) & 0x00000003) >> 0) 15219 #define ALT_SYSMGR_PINMUX_MIXED1IO8_SEL_SET(value) (((value) << 0) & 0x00000003) 15221 #ifndef __ASSEMBLY__ 15243 #define ALT_SYSMGR_PINMUX_MIXED1IO8_OFST 0x120 15280 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_LSB 0 15282 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_MSB 1 15284 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_WIDTH 2 15286 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_SET_MSK 0x00000003 15288 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_CLR_MSK 0xfffffffc 15290 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_RESET 0x0 15292 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_GET(value) (((value) & 0x00000003) >> 0) 15294 #define ALT_SYSMGR_PINMUX_MIXED1IO9_SEL_SET(value) (((value) << 0) & 0x00000003) 15296 #ifndef __ASSEMBLY__ 15318 #define ALT_SYSMGR_PINMUX_MIXED1IO9_OFST 0x124 15355 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_LSB 0 15357 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_MSB 1 15359 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_WIDTH 2 15361 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_SET_MSK 0x00000003 15363 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_CLR_MSK 0xfffffffc 15365 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_RESET 0x0 15367 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_GET(value) (((value) & 0x00000003) >> 0) 15369 #define ALT_SYSMGR_PINMUX_MIXED1IO10_SEL_SET(value) (((value) << 0) & 0x00000003) 15371 #ifndef __ASSEMBLY__ 15393 #define ALT_SYSMGR_PINMUX_MIXED1IO10_OFST 0x128 15430 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_LSB 0 15432 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_MSB 1 15434 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_WIDTH 2 15436 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_SET_MSK 0x00000003 15438 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_CLR_MSK 0xfffffffc 15440 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_RESET 0x0 15442 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_GET(value) (((value) & 0x00000003) >> 0) 15444 #define ALT_SYSMGR_PINMUX_MIXED1IO11_SEL_SET(value) (((value) << 0) & 0x00000003) 15446 #ifndef __ASSEMBLY__ 15468 #define ALT_SYSMGR_PINMUX_MIXED1IO11_OFST 0x12c 15505 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_LSB 0 15507 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_MSB 1 15509 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_WIDTH 2 15511 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_SET_MSK 0x00000003 15513 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_CLR_MSK 0xfffffffc 15515 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_RESET 0x0 15517 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_GET(value) (((value) & 0x00000003) >> 0) 15519 #define ALT_SYSMGR_PINMUX_MIXED1IO12_SEL_SET(value) (((value) << 0) & 0x00000003) 15521 #ifndef __ASSEMBLY__ 15543 #define ALT_SYSMGR_PINMUX_MIXED1IO12_OFST 0x130 15580 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_LSB 0 15582 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_MSB 1 15584 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_WIDTH 2 15586 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_SET_MSK 0x00000003 15588 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_CLR_MSK 0xfffffffc 15590 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_RESET 0x0 15592 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_GET(value) (((value) & 0x00000003) >> 0) 15594 #define ALT_SYSMGR_PINMUX_MIXED1IO13_SEL_SET(value) (((value) << 0) & 0x00000003) 15596 #ifndef __ASSEMBLY__ 15618 #define ALT_SYSMGR_PINMUX_MIXED1IO13_OFST 0x134 15655 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_LSB 0 15657 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_MSB 1 15659 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_WIDTH 2 15661 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_SET_MSK 0x00000003 15663 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_CLR_MSK 0xfffffffc 15665 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_RESET 0x0 15667 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_GET(value) (((value) & 0x00000003) >> 0) 15669 #define ALT_SYSMGR_PINMUX_MIXED1IO14_SEL_SET(value) (((value) << 0) & 0x00000003) 15671 #ifndef __ASSEMBLY__ 15693 #define ALT_SYSMGR_PINMUX_MIXED1IO14_OFST 0x138 15730 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_LSB 0 15732 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_MSB 1 15734 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_WIDTH 2 15736 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_SET_MSK 0x00000003 15738 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_CLR_MSK 0xfffffffc 15740 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_RESET 0x0 15742 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_GET(value) (((value) & 0x00000003) >> 0) 15744 #define ALT_SYSMGR_PINMUX_MIXED1IO15_SEL_SET(value) (((value) << 0) & 0x00000003) 15746 #ifndef __ASSEMBLY__ 15768 #define ALT_SYSMGR_PINMUX_MIXED1IO15_OFST 0x13c 15805 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_LSB 0 15807 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_MSB 1 15809 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_WIDTH 2 15811 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_SET_MSK 0x00000003 15813 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_CLR_MSK 0xfffffffc 15815 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_RESET 0x0 15817 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_GET(value) (((value) & 0x00000003) >> 0) 15819 #define ALT_SYSMGR_PINMUX_MIXED1IO16_SEL_SET(value) (((value) << 0) & 0x00000003) 15821 #ifndef __ASSEMBLY__ 15843 #define ALT_SYSMGR_PINMUX_MIXED1IO16_OFST 0x140 15880 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_LSB 0 15882 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_MSB 1 15884 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_WIDTH 2 15886 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_SET_MSK 0x00000003 15888 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_CLR_MSK 0xfffffffc 15890 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_RESET 0x0 15892 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_GET(value) (((value) & 0x00000003) >> 0) 15894 #define ALT_SYSMGR_PINMUX_MIXED1IO17_SEL_SET(value) (((value) << 0) & 0x00000003) 15896 #ifndef __ASSEMBLY__ 15918 #define ALT_SYSMGR_PINMUX_MIXED1IO17_OFST 0x144 15955 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_LSB 0 15957 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_MSB 1 15959 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_WIDTH 2 15961 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_SET_MSK 0x00000003 15963 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_CLR_MSK 0xfffffffc 15965 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_RESET 0x0 15967 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_GET(value) (((value) & 0x00000003) >> 0) 15969 #define ALT_SYSMGR_PINMUX_MIXED1IO18_SEL_SET(value) (((value) << 0) & 0x00000003) 15971 #ifndef __ASSEMBLY__ 15993 #define ALT_SYSMGR_PINMUX_MIXED1IO18_OFST 0x148 16030 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_LSB 0 16032 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_MSB 1 16034 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_WIDTH 2 16036 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_SET_MSK 0x00000003 16038 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_CLR_MSK 0xfffffffc 16040 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_RESET 0x0 16042 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_GET(value) (((value) & 0x00000003) >> 0) 16044 #define ALT_SYSMGR_PINMUX_MIXED1IO19_SEL_SET(value) (((value) << 0) & 0x00000003) 16046 #ifndef __ASSEMBLY__ 16068 #define ALT_SYSMGR_PINMUX_MIXED1IO19_OFST 0x14c 16105 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_LSB 0 16107 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_MSB 1 16109 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_WIDTH 2 16111 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_SET_MSK 0x00000003 16113 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_CLR_MSK 0xfffffffc 16115 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_RESET 0x0 16117 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_GET(value) (((value) & 0x00000003) >> 0) 16119 #define ALT_SYSMGR_PINMUX_MIXED1IO20_SEL_SET(value) (((value) << 0) & 0x00000003) 16121 #ifndef __ASSEMBLY__ 16143 #define ALT_SYSMGR_PINMUX_MIXED1IO20_OFST 0x150 16180 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_LSB 0 16182 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_MSB 1 16184 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_WIDTH 2 16186 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_SET_MSK 0x00000003 16188 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_CLR_MSK 0xfffffffc 16190 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_RESET 0x0 16192 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_GET(value) (((value) & 0x00000003) >> 0) 16194 #define ALT_SYSMGR_PINMUX_MIXED1IO21_SEL_SET(value) (((value) << 0) & 0x00000003) 16196 #ifndef __ASSEMBLY__ 16218 #define ALT_SYSMGR_PINMUX_MIXED1IO21_OFST 0x154 16255 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_LSB 0 16257 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_MSB 1 16259 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_WIDTH 2 16261 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_SET_MSK 0x00000003 16263 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_CLR_MSK 0xfffffffc 16265 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_RESET 0x0 16267 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_GET(value) (((value) & 0x00000003) >> 0) 16269 #define ALT_SYSMGR_PINMUX_MIXED2IO0_SEL_SET(value) (((value) << 0) & 0x00000003) 16271 #ifndef __ASSEMBLY__ 16293 #define ALT_SYSMGR_PINMUX_MIXED2IO0_OFST 0x158 16330 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_LSB 0 16332 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_MSB 1 16334 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_WIDTH 2 16336 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_SET_MSK 0x00000003 16338 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_CLR_MSK 0xfffffffc 16340 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_RESET 0x0 16342 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_GET(value) (((value) & 0x00000003) >> 0) 16344 #define ALT_SYSMGR_PINMUX_MIXED2IO1_SEL_SET(value) (((value) << 0) & 0x00000003) 16346 #ifndef __ASSEMBLY__ 16368 #define ALT_SYSMGR_PINMUX_MIXED2IO1_OFST 0x15c 16405 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_LSB 0 16407 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_MSB 1 16409 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_WIDTH 2 16411 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_SET_MSK 0x00000003 16413 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_CLR_MSK 0xfffffffc 16415 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_RESET 0x0 16417 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_GET(value) (((value) & 0x00000003) >> 0) 16419 #define ALT_SYSMGR_PINMUX_MIXED2IO2_SEL_SET(value) (((value) << 0) & 0x00000003) 16421 #ifndef __ASSEMBLY__ 16443 #define ALT_SYSMGR_PINMUX_MIXED2IO2_OFST 0x160 16480 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_LSB 0 16482 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_MSB 1 16484 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_WIDTH 2 16486 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_SET_MSK 0x00000003 16488 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_CLR_MSK 0xfffffffc 16490 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_RESET 0x0 16492 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_GET(value) (((value) & 0x00000003) >> 0) 16494 #define ALT_SYSMGR_PINMUX_MIXED2IO3_SEL_SET(value) (((value) << 0) & 0x00000003) 16496 #ifndef __ASSEMBLY__ 16518 #define ALT_SYSMGR_PINMUX_MIXED2IO3_OFST 0x164 16555 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_LSB 0 16557 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_MSB 1 16559 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_WIDTH 2 16561 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_SET_MSK 0x00000003 16563 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_CLR_MSK 0xfffffffc 16565 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_RESET 0x0 16567 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_GET(value) (((value) & 0x00000003) >> 0) 16569 #define ALT_SYSMGR_PINMUX_MIXED2IO4_SEL_SET(value) (((value) << 0) & 0x00000003) 16571 #ifndef __ASSEMBLY__ 16593 #define ALT_SYSMGR_PINMUX_MIXED2IO4_OFST 0x168 16630 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_LSB 0 16632 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_MSB 1 16634 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_WIDTH 2 16636 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_SET_MSK 0x00000003 16638 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_CLR_MSK 0xfffffffc 16640 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_RESET 0x0 16642 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_GET(value) (((value) & 0x00000003) >> 0) 16644 #define ALT_SYSMGR_PINMUX_MIXED2IO5_SEL_SET(value) (((value) << 0) & 0x00000003) 16646 #ifndef __ASSEMBLY__ 16668 #define ALT_SYSMGR_PINMUX_MIXED2IO5_OFST 0x16c 16705 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_LSB 0 16707 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_MSB 1 16709 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_WIDTH 2 16711 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_SET_MSK 0x00000003 16713 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_CLR_MSK 0xfffffffc 16715 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_RESET 0x0 16717 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_GET(value) (((value) & 0x00000003) >> 0) 16719 #define ALT_SYSMGR_PINMUX_MIXED2IO6_SEL_SET(value) (((value) << 0) & 0x00000003) 16721 #ifndef __ASSEMBLY__ 16743 #define ALT_SYSMGR_PINMUX_MIXED2IO6_OFST 0x170 16780 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_LSB 0 16782 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_MSB 1 16784 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_WIDTH 2 16786 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_SET_MSK 0x00000003 16788 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_CLR_MSK 0xfffffffc 16790 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_RESET 0x0 16792 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_GET(value) (((value) & 0x00000003) >> 0) 16794 #define ALT_SYSMGR_PINMUX_MIXED2IO7_SEL_SET(value) (((value) << 0) & 0x00000003) 16796 #ifndef __ASSEMBLY__ 16818 #define ALT_SYSMGR_PINMUX_MIXED2IO7_OFST 0x174 16852 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_LSB 0 16854 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_MSB 0 16856 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_WIDTH 1 16858 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_SET_MSK 0x00000001 16860 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_CLR_MSK 0xfffffffe 16862 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_RESET 0x0 16864 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_GET(value) (((value) & 0x00000001) >> 0) 16866 #define ALT_SYSMGR_PINMUX_GPLINMUX48_SEL_SET(value) (((value) << 0) & 0x00000001) 16868 #ifndef __ASSEMBLY__ 16890 #define ALT_SYSMGR_PINMUX_GPLINMUX48_OFST 0x178 16924 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_LSB 0 16926 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_MSB 0 16928 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_WIDTH 1 16930 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_SET_MSK 0x00000001 16932 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_CLR_MSK 0xfffffffe 16934 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_RESET 0x0 16936 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_GET(value) (((value) & 0x00000001) >> 0) 16938 #define ALT_SYSMGR_PINMUX_GPLINMUX49_SEL_SET(value) (((value) << 0) & 0x00000001) 16940 #ifndef __ASSEMBLY__ 16962 #define ALT_SYSMGR_PINMUX_GPLINMUX49_OFST 0x17c 16996 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_LSB 0 16998 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_MSB 0 17000 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_WIDTH 1 17002 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_SET_MSK 0x00000001 17004 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_CLR_MSK 0xfffffffe 17006 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_RESET 0x0 17008 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_GET(value) (((value) & 0x00000001) >> 0) 17010 #define ALT_SYSMGR_PINMUX_GPLINMUX50_SEL_SET(value) (((value) << 0) & 0x00000001) 17012 #ifndef __ASSEMBLY__ 17034 #define ALT_SYSMGR_PINMUX_GPLINMUX50_OFST 0x180 17068 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_LSB 0 17070 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_MSB 0 17072 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_WIDTH 1 17074 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_SET_MSK 0x00000001 17076 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_CLR_MSK 0xfffffffe 17078 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_RESET 0x0 17080 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_GET(value) (((value) & 0x00000001) >> 0) 17082 #define ALT_SYSMGR_PINMUX_GPLINMUX51_SEL_SET(value) (((value) << 0) & 0x00000001) 17084 #ifndef __ASSEMBLY__ 17106 #define ALT_SYSMGR_PINMUX_GPLINMUX51_OFST 0x184 17140 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_LSB 0 17142 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_MSB 0 17144 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_WIDTH 1 17146 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_SET_MSK 0x00000001 17148 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_CLR_MSK 0xfffffffe 17150 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_RESET 0x0 17152 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_GET(value) (((value) & 0x00000001) >> 0) 17154 #define ALT_SYSMGR_PINMUX_GPLINMUX52_SEL_SET(value) (((value) << 0) & 0x00000001) 17156 #ifndef __ASSEMBLY__ 17178 #define ALT_SYSMGR_PINMUX_GPLINMUX52_OFST 0x188 17212 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_LSB 0 17214 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_MSB 0 17216 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_WIDTH 1 17218 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_SET_MSK 0x00000001 17220 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_CLR_MSK 0xfffffffe 17222 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_RESET 0x0 17224 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_GET(value) (((value) & 0x00000001) >> 0) 17226 #define ALT_SYSMGR_PINMUX_GPLINMUX53_SEL_SET(value) (((value) << 0) & 0x00000001) 17228 #ifndef __ASSEMBLY__ 17250 #define ALT_SYSMGR_PINMUX_GPLINMUX53_OFST 0x18c 17284 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_LSB 0 17286 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_MSB 0 17288 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_WIDTH 1 17290 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_SET_MSK 0x00000001 17292 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_CLR_MSK 0xfffffffe 17294 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_RESET 0x0 17296 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_GET(value) (((value) & 0x00000001) >> 0) 17298 #define ALT_SYSMGR_PINMUX_GPLINMUX54_SEL_SET(value) (((value) << 0) & 0x00000001) 17300 #ifndef __ASSEMBLY__ 17322 #define ALT_SYSMGR_PINMUX_GPLINMUX54_OFST 0x190 17356 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_LSB 0 17358 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_MSB 0 17360 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_WIDTH 1 17362 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_SET_MSK 0x00000001 17364 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_CLR_MSK 0xfffffffe 17366 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_RESET 0x0 17368 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_GET(value) (((value) & 0x00000001) >> 0) 17370 #define ALT_SYSMGR_PINMUX_GPLINMUX55_SEL_SET(value) (((value) << 0) & 0x00000001) 17372 #ifndef __ASSEMBLY__ 17394 #define ALT_SYSMGR_PINMUX_GPLINMUX55_OFST 0x194 17428 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_LSB 0 17430 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_MSB 0 17432 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_WIDTH 1 17434 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_SET_MSK 0x00000001 17436 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_CLR_MSK 0xfffffffe 17438 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_RESET 0x0 17440 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_GET(value) (((value) & 0x00000001) >> 0) 17442 #define ALT_SYSMGR_PINMUX_GPLINMUX56_SEL_SET(value) (((value) << 0) & 0x00000001) 17444 #ifndef __ASSEMBLY__ 17466 #define ALT_SYSMGR_PINMUX_GPLINMUX56_OFST 0x198 17500 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_LSB 0 17502 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_MSB 0 17504 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_WIDTH 1 17506 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_SET_MSK 0x00000001 17508 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_CLR_MSK 0xfffffffe 17510 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_RESET 0x0 17512 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_GET(value) (((value) & 0x00000001) >> 0) 17514 #define ALT_SYSMGR_PINMUX_GPLINMUX57_SEL_SET(value) (((value) << 0) & 0x00000001) 17516 #ifndef __ASSEMBLY__ 17538 #define ALT_SYSMGR_PINMUX_GPLINMUX57_OFST 0x19c 17572 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_LSB 0 17574 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_MSB 0 17576 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_WIDTH 1 17578 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_SET_MSK 0x00000001 17580 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_CLR_MSK 0xfffffffe 17582 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_RESET 0x0 17584 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_GET(value) (((value) & 0x00000001) >> 0) 17586 #define ALT_SYSMGR_PINMUX_GPLINMUX58_SEL_SET(value) (((value) << 0) & 0x00000001) 17588 #ifndef __ASSEMBLY__ 17610 #define ALT_SYSMGR_PINMUX_GPLINMUX58_OFST 0x1a0 17644 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_LSB 0 17646 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_MSB 0 17648 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_WIDTH 1 17650 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_SET_MSK 0x00000001 17652 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_CLR_MSK 0xfffffffe 17654 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_RESET 0x0 17656 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_GET(value) (((value) & 0x00000001) >> 0) 17658 #define ALT_SYSMGR_PINMUX_GPLINMUX59_SEL_SET(value) (((value) << 0) & 0x00000001) 17660 #ifndef __ASSEMBLY__ 17682 #define ALT_SYSMGR_PINMUX_GPLINMUX59_OFST 0x1a4 17716 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_LSB 0 17718 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_MSB 0 17720 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_WIDTH 1 17722 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_SET_MSK 0x00000001 17724 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_CLR_MSK 0xfffffffe 17726 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_RESET 0x0 17728 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_GET(value) (((value) & 0x00000001) >> 0) 17730 #define ALT_SYSMGR_PINMUX_GPLINMUX60_SEL_SET(value) (((value) << 0) & 0x00000001) 17732 #ifndef __ASSEMBLY__ 17754 #define ALT_SYSMGR_PINMUX_GPLINMUX60_OFST 0x1a8 17788 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_LSB 0 17790 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_MSB 0 17792 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_WIDTH 1 17794 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_SET_MSK 0x00000001 17796 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_CLR_MSK 0xfffffffe 17798 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_RESET 0x0 17800 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_GET(value) (((value) & 0x00000001) >> 0) 17802 #define ALT_SYSMGR_PINMUX_GPLINMUX61_SEL_SET(value) (((value) << 0) & 0x00000001) 17804 #ifndef __ASSEMBLY__ 17826 #define ALT_SYSMGR_PINMUX_GPLINMUX61_OFST 0x1ac 17860 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_LSB 0 17862 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_MSB 0 17864 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_WIDTH 1 17866 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_SET_MSK 0x00000001 17868 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_CLR_MSK 0xfffffffe 17870 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_RESET 0x0 17872 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_GET(value) (((value) & 0x00000001) >> 0) 17874 #define ALT_SYSMGR_PINMUX_GPLINMUX62_SEL_SET(value) (((value) << 0) & 0x00000001) 17876 #ifndef __ASSEMBLY__ 17898 #define ALT_SYSMGR_PINMUX_GPLINMUX62_OFST 0x1b0 17932 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_LSB 0 17934 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_MSB 0 17936 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_WIDTH 1 17938 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_SET_MSK 0x00000001 17940 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_CLR_MSK 0xfffffffe 17942 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_RESET 0x0 17944 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_GET(value) (((value) & 0x00000001) >> 0) 17946 #define ALT_SYSMGR_PINMUX_GPLINMUX63_SEL_SET(value) (((value) << 0) & 0x00000001) 17948 #ifndef __ASSEMBLY__ 17970 #define ALT_SYSMGR_PINMUX_GPLINMUX63_OFST 0x1b4 18004 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_LSB 0 18006 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_MSB 0 18008 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_WIDTH 1 18010 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_SET_MSK 0x00000001 18012 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_CLR_MSK 0xfffffffe 18014 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_RESET 0x0 18016 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_GET(value) (((value) & 0x00000001) >> 0) 18018 #define ALT_SYSMGR_PINMUX_GPLINMUX64_SEL_SET(value) (((value) << 0) & 0x00000001) 18020 #ifndef __ASSEMBLY__ 18042 #define ALT_SYSMGR_PINMUX_GPLINMUX64_OFST 0x1b8 18076 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_LSB 0 18078 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_MSB 0 18080 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_WIDTH 1 18082 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_SET_MSK 0x00000001 18084 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_CLR_MSK 0xfffffffe 18086 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_RESET 0x0 18088 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_GET(value) (((value) & 0x00000001) >> 0) 18090 #define ALT_SYSMGR_PINMUX_GPLINMUX65_SEL_SET(value) (((value) << 0) & 0x00000001) 18092 #ifndef __ASSEMBLY__ 18114 #define ALT_SYSMGR_PINMUX_GPLINMUX65_OFST 0x1bc 18148 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_LSB 0 18150 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_MSB 0 18152 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_WIDTH 1 18154 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_SET_MSK 0x00000001 18156 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_CLR_MSK 0xfffffffe 18158 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_RESET 0x0 18160 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_GET(value) (((value) & 0x00000001) >> 0) 18162 #define ALT_SYSMGR_PINMUX_GPLINMUX66_SEL_SET(value) (((value) << 0) & 0x00000001) 18164 #ifndef __ASSEMBLY__ 18186 #define ALT_SYSMGR_PINMUX_GPLINMUX66_OFST 0x1c0 18220 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_LSB 0 18222 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_MSB 0 18224 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_WIDTH 1 18226 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_SET_MSK 0x00000001 18228 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_CLR_MSK 0xfffffffe 18230 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_RESET 0x0 18232 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_GET(value) (((value) & 0x00000001) >> 0) 18234 #define ALT_SYSMGR_PINMUX_GPLINMUX67_SEL_SET(value) (((value) << 0) & 0x00000001) 18236 #ifndef __ASSEMBLY__ 18258 #define ALT_SYSMGR_PINMUX_GPLINMUX67_OFST 0x1c4 18292 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_LSB 0 18294 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_MSB 0 18296 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_WIDTH 1 18298 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_SET_MSK 0x00000001 18300 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_CLR_MSK 0xfffffffe 18302 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_RESET 0x0 18304 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_GET(value) (((value) & 0x00000001) >> 0) 18306 #define ALT_SYSMGR_PINMUX_GPLINMUX68_SEL_SET(value) (((value) << 0) & 0x00000001) 18308 #ifndef __ASSEMBLY__ 18330 #define ALT_SYSMGR_PINMUX_GPLINMUX68_OFST 0x1c8 18364 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_LSB 0 18366 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_MSB 0 18368 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_WIDTH 1 18370 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_SET_MSK 0x00000001 18372 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_CLR_MSK 0xfffffffe 18374 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_RESET 0x0 18376 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_GET(value) (((value) & 0x00000001) >> 0) 18378 #define ALT_SYSMGR_PINMUX_GPLINMUX69_SEL_SET(value) (((value) << 0) & 0x00000001) 18380 #ifndef __ASSEMBLY__ 18402 #define ALT_SYSMGR_PINMUX_GPLINMUX69_OFST 0x1cc 18436 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_LSB 0 18438 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_MSB 0 18440 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_WIDTH 1 18442 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_SET_MSK 0x00000001 18444 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_CLR_MSK 0xfffffffe 18446 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_RESET 0x0 18448 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_GET(value) (((value) & 0x00000001) >> 0) 18450 #define ALT_SYSMGR_PINMUX_GPLINMUX70_SEL_SET(value) (((value) << 0) & 0x00000001) 18452 #ifndef __ASSEMBLY__ 18474 #define ALT_SYSMGR_PINMUX_GPLINMUX70_OFST 0x1d0 18509 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_LSB 0 18511 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_MSB 0 18513 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_WIDTH 1 18515 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_SET_MSK 0x00000001 18517 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_CLR_MSK 0xfffffffe 18519 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_RESET 0x0 18521 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_GET(value) (((value) & 0x00000001) >> 0) 18523 #define ALT_SYSMGR_PINMUX_GPLMUX0_SEL_SET(value) (((value) << 0) & 0x00000001) 18525 #ifndef __ASSEMBLY__ 18547 #define ALT_SYSMGR_PINMUX_GPLMUX0_OFST 0x1d4 18582 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_LSB 0 18584 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_MSB 0 18586 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_WIDTH 1 18588 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_SET_MSK 0x00000001 18590 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_CLR_MSK 0xfffffffe 18592 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_RESET 0x0 18594 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_GET(value) (((value) & 0x00000001) >> 0) 18596 #define ALT_SYSMGR_PINMUX_GPLMUX1_SEL_SET(value) (((value) << 0) & 0x00000001) 18598 #ifndef __ASSEMBLY__ 18620 #define ALT_SYSMGR_PINMUX_GPLMUX1_OFST 0x1d8 18655 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_LSB 0 18657 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_MSB 0 18659 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_WIDTH 1 18661 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_SET_MSK 0x00000001 18663 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_CLR_MSK 0xfffffffe 18665 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_RESET 0x0 18667 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_GET(value) (((value) & 0x00000001) >> 0) 18669 #define ALT_SYSMGR_PINMUX_GPLMUX2_SEL_SET(value) (((value) << 0) & 0x00000001) 18671 #ifndef __ASSEMBLY__ 18693 #define ALT_SYSMGR_PINMUX_GPLMUX2_OFST 0x1dc 18728 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_LSB 0 18730 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_MSB 0 18732 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_WIDTH 1 18734 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_SET_MSK 0x00000001 18736 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_CLR_MSK 0xfffffffe 18738 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_RESET 0x0 18740 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_GET(value) (((value) & 0x00000001) >> 0) 18742 #define ALT_SYSMGR_PINMUX_GPLMUX3_SEL_SET(value) (((value) << 0) & 0x00000001) 18744 #ifndef __ASSEMBLY__ 18766 #define ALT_SYSMGR_PINMUX_GPLMUX3_OFST 0x1e0 18801 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_LSB 0 18803 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_MSB 0 18805 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_WIDTH 1 18807 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_SET_MSK 0x00000001 18809 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_CLR_MSK 0xfffffffe 18811 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_RESET 0x0 18813 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_GET(value) (((value) & 0x00000001) >> 0) 18815 #define ALT_SYSMGR_PINMUX_GPLMUX4_SEL_SET(value) (((value) << 0) & 0x00000001) 18817 #ifndef __ASSEMBLY__ 18839 #define ALT_SYSMGR_PINMUX_GPLMUX4_OFST 0x1e4 18874 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_LSB 0 18876 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_MSB 0 18878 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_WIDTH 1 18880 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_SET_MSK 0x00000001 18882 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_CLR_MSK 0xfffffffe 18884 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_RESET 0x0 18886 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_GET(value) (((value) & 0x00000001) >> 0) 18888 #define ALT_SYSMGR_PINMUX_GPLMUX5_SEL_SET(value) (((value) << 0) & 0x00000001) 18890 #ifndef __ASSEMBLY__ 18912 #define ALT_SYSMGR_PINMUX_GPLMUX5_OFST 0x1e8 18947 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_LSB 0 18949 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_MSB 0 18951 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_WIDTH 1 18953 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_SET_MSK 0x00000001 18955 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_CLR_MSK 0xfffffffe 18957 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_RESET 0x0 18959 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_GET(value) (((value) & 0x00000001) >> 0) 18961 #define ALT_SYSMGR_PINMUX_GPLMUX6_SEL_SET(value) (((value) << 0) & 0x00000001) 18963 #ifndef __ASSEMBLY__ 18985 #define ALT_SYSMGR_PINMUX_GPLMUX6_OFST 0x1ec 19020 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_LSB 0 19022 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_MSB 0 19024 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_WIDTH 1 19026 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_SET_MSK 0x00000001 19028 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_CLR_MSK 0xfffffffe 19030 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_RESET 0x0 19032 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_GET(value) (((value) & 0x00000001) >> 0) 19034 #define ALT_SYSMGR_PINMUX_GPLMUX7_SEL_SET(value) (((value) << 0) & 0x00000001) 19036 #ifndef __ASSEMBLY__ 19058 #define ALT_SYSMGR_PINMUX_GPLMUX7_OFST 0x1f0 19093 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_LSB 0 19095 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_MSB 0 19097 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_WIDTH 1 19099 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_SET_MSK 0x00000001 19101 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_CLR_MSK 0xfffffffe 19103 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_RESET 0x0 19105 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_GET(value) (((value) & 0x00000001) >> 0) 19107 #define ALT_SYSMGR_PINMUX_GPLMUX8_SEL_SET(value) (((value) << 0) & 0x00000001) 19109 #ifndef __ASSEMBLY__ 19131 #define ALT_SYSMGR_PINMUX_GPLMUX8_OFST 0x1f4 19166 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_LSB 0 19168 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_MSB 0 19170 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_WIDTH 1 19172 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_SET_MSK 0x00000001 19174 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_CLR_MSK 0xfffffffe 19176 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_RESET 0x0 19178 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_GET(value) (((value) & 0x00000001) >> 0) 19180 #define ALT_SYSMGR_PINMUX_GPLMUX9_SEL_SET(value) (((value) << 0) & 0x00000001) 19182 #ifndef __ASSEMBLY__ 19204 #define ALT_SYSMGR_PINMUX_GPLMUX9_OFST 0x1f8 19239 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_LSB 0 19241 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_MSB 0 19243 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_WIDTH 1 19245 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_SET_MSK 0x00000001 19247 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_CLR_MSK 0xfffffffe 19249 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_RESET 0x0 19251 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_GET(value) (((value) & 0x00000001) >> 0) 19253 #define ALT_SYSMGR_PINMUX_GPLMUX10_SEL_SET(value) (((value) << 0) & 0x00000001) 19255 #ifndef __ASSEMBLY__ 19277 #define ALT_SYSMGR_PINMUX_GPLMUX10_OFST 0x1fc 19312 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_LSB 0 19314 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_MSB 0 19316 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_WIDTH 1 19318 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_SET_MSK 0x00000001 19320 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_CLR_MSK 0xfffffffe 19322 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_RESET 0x0 19324 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_GET(value) (((value) & 0x00000001) >> 0) 19326 #define ALT_SYSMGR_PINMUX_GPLMUX11_SEL_SET(value) (((value) << 0) & 0x00000001) 19328 #ifndef __ASSEMBLY__ 19350 #define ALT_SYSMGR_PINMUX_GPLMUX11_OFST 0x200 19385 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_LSB 0 19387 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_MSB 0 19389 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_WIDTH 1 19391 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_SET_MSK 0x00000001 19393 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_CLR_MSK 0xfffffffe 19395 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_RESET 0x0 19397 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_GET(value) (((value) & 0x00000001) >> 0) 19399 #define ALT_SYSMGR_PINMUX_GPLMUX12_SEL_SET(value) (((value) << 0) & 0x00000001) 19401 #ifndef __ASSEMBLY__ 19423 #define ALT_SYSMGR_PINMUX_GPLMUX12_OFST 0x204 19458 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_LSB 0 19460 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_MSB 0 19462 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_WIDTH 1 19464 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_SET_MSK 0x00000001 19466 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_CLR_MSK 0xfffffffe 19468 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_RESET 0x0 19470 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_GET(value) (((value) & 0x00000001) >> 0) 19472 #define ALT_SYSMGR_PINMUX_GPLMUX13_SEL_SET(value) (((value) << 0) & 0x00000001) 19474 #ifndef __ASSEMBLY__ 19496 #define ALT_SYSMGR_PINMUX_GPLMUX13_OFST 0x208 19531 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_LSB 0 19533 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_MSB 0 19535 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_WIDTH 1 19537 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_SET_MSK 0x00000001 19539 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_CLR_MSK 0xfffffffe 19541 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_RESET 0x0 19543 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_GET(value) (((value) & 0x00000001) >> 0) 19545 #define ALT_SYSMGR_PINMUX_GPLMUX14_SEL_SET(value) (((value) << 0) & 0x00000001) 19547 #ifndef __ASSEMBLY__ 19569 #define ALT_SYSMGR_PINMUX_GPLMUX14_OFST 0x20c 19604 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_LSB 0 19606 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_MSB 0 19608 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_WIDTH 1 19610 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_SET_MSK 0x00000001 19612 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_CLR_MSK 0xfffffffe 19614 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_RESET 0x0 19616 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_GET(value) (((value) & 0x00000001) >> 0) 19618 #define ALT_SYSMGR_PINMUX_GPLMUX15_SEL_SET(value) (((value) << 0) & 0x00000001) 19620 #ifndef __ASSEMBLY__ 19642 #define ALT_SYSMGR_PINMUX_GPLMUX15_OFST 0x210 19677 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_LSB 0 19679 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_MSB 0 19681 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_WIDTH 1 19683 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_SET_MSK 0x00000001 19685 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_CLR_MSK 0xfffffffe 19687 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_RESET 0x0 19689 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_GET(value) (((value) & 0x00000001) >> 0) 19691 #define ALT_SYSMGR_PINMUX_GPLMUX16_SEL_SET(value) (((value) << 0) & 0x00000001) 19693 #ifndef __ASSEMBLY__ 19715 #define ALT_SYSMGR_PINMUX_GPLMUX16_OFST 0x214 19750 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_LSB 0 19752 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_MSB 0 19754 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_WIDTH 1 19756 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_SET_MSK 0x00000001 19758 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_CLR_MSK 0xfffffffe 19760 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_RESET 0x0 19762 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_GET(value) (((value) & 0x00000001) >> 0) 19764 #define ALT_SYSMGR_PINMUX_GPLMUX17_SEL_SET(value) (((value) << 0) & 0x00000001) 19766 #ifndef __ASSEMBLY__ 19788 #define ALT_SYSMGR_PINMUX_GPLMUX17_OFST 0x218 19823 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_LSB 0 19825 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_MSB 0 19827 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_WIDTH 1 19829 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_SET_MSK 0x00000001 19831 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_CLR_MSK 0xfffffffe 19833 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_RESET 0x0 19835 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_GET(value) (((value) & 0x00000001) >> 0) 19837 #define ALT_SYSMGR_PINMUX_GPLMUX18_SEL_SET(value) (((value) << 0) & 0x00000001) 19839 #ifndef __ASSEMBLY__ 19861 #define ALT_SYSMGR_PINMUX_GPLMUX18_OFST 0x21c 19896 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_LSB 0 19898 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_MSB 0 19900 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_WIDTH 1 19902 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_SET_MSK 0x00000001 19904 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_CLR_MSK 0xfffffffe 19906 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_RESET 0x0 19908 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_GET(value) (((value) & 0x00000001) >> 0) 19910 #define ALT_SYSMGR_PINMUX_GPLMUX19_SEL_SET(value) (((value) << 0) & 0x00000001) 19912 #ifndef __ASSEMBLY__ 19934 #define ALT_SYSMGR_PINMUX_GPLMUX19_OFST 0x220 19969 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_LSB 0 19971 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_MSB 0 19973 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_WIDTH 1 19975 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_SET_MSK 0x00000001 19977 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_CLR_MSK 0xfffffffe 19979 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_RESET 0x0 19981 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_GET(value) (((value) & 0x00000001) >> 0) 19983 #define ALT_SYSMGR_PINMUX_GPLMUX20_SEL_SET(value) (((value) << 0) & 0x00000001) 19985 #ifndef __ASSEMBLY__ 20007 #define ALT_SYSMGR_PINMUX_GPLMUX20_OFST 0x224 20042 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_LSB 0 20044 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_MSB 0 20046 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_WIDTH 1 20048 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_SET_MSK 0x00000001 20050 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_CLR_MSK 0xfffffffe 20052 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_RESET 0x0 20054 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_GET(value) (((value) & 0x00000001) >> 0) 20056 #define ALT_SYSMGR_PINMUX_GPLMUX21_SEL_SET(value) (((value) << 0) & 0x00000001) 20058 #ifndef __ASSEMBLY__ 20080 #define ALT_SYSMGR_PINMUX_GPLMUX21_OFST 0x228 20115 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_LSB 0 20117 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_MSB 0 20119 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_WIDTH 1 20121 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_SET_MSK 0x00000001 20123 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_CLR_MSK 0xfffffffe 20125 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_RESET 0x0 20127 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_GET(value) (((value) & 0x00000001) >> 0) 20129 #define ALT_SYSMGR_PINMUX_GPLMUX22_SEL_SET(value) (((value) << 0) & 0x00000001) 20131 #ifndef __ASSEMBLY__ 20153 #define ALT_SYSMGR_PINMUX_GPLMUX22_OFST 0x22c 20188 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_LSB 0 20190 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_MSB 0 20192 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_WIDTH 1 20194 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_SET_MSK 0x00000001 20196 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_CLR_MSK 0xfffffffe 20198 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_RESET 0x0 20200 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_GET(value) (((value) & 0x00000001) >> 0) 20202 #define ALT_SYSMGR_PINMUX_GPLMUX23_SEL_SET(value) (((value) << 0) & 0x00000001) 20204 #ifndef __ASSEMBLY__ 20226 #define ALT_SYSMGR_PINMUX_GPLMUX23_OFST 0x230 20261 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_LSB 0 20263 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_MSB 0 20265 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_WIDTH 1 20267 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_SET_MSK 0x00000001 20269 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_CLR_MSK 0xfffffffe 20271 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_RESET 0x0 20273 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_GET(value) (((value) & 0x00000001) >> 0) 20275 #define ALT_SYSMGR_PINMUX_GPLMUX24_SEL_SET(value) (((value) << 0) & 0x00000001) 20277 #ifndef __ASSEMBLY__ 20299 #define ALT_SYSMGR_PINMUX_GPLMUX24_OFST 0x234 20334 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_LSB 0 20336 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_MSB 0 20338 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_WIDTH 1 20340 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_SET_MSK 0x00000001 20342 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_CLR_MSK 0xfffffffe 20344 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_RESET 0x0 20346 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_GET(value) (((value) & 0x00000001) >> 0) 20348 #define ALT_SYSMGR_PINMUX_GPLMUX25_SEL_SET(value) (((value) << 0) & 0x00000001) 20350 #ifndef __ASSEMBLY__ 20372 #define ALT_SYSMGR_PINMUX_GPLMUX25_OFST 0x238 20407 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_LSB 0 20409 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_MSB 0 20411 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_WIDTH 1 20413 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_SET_MSK 0x00000001 20415 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_CLR_MSK 0xfffffffe 20417 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_RESET 0x0 20419 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_GET(value) (((value) & 0x00000001) >> 0) 20421 #define ALT_SYSMGR_PINMUX_GPLMUX26_SEL_SET(value) (((value) << 0) & 0x00000001) 20423 #ifndef __ASSEMBLY__ 20445 #define ALT_SYSMGR_PINMUX_GPLMUX26_OFST 0x23c 20480 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_LSB 0 20482 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_MSB 0 20484 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_WIDTH 1 20486 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_SET_MSK 0x00000001 20488 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_CLR_MSK 0xfffffffe 20490 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_RESET 0x0 20492 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_GET(value) (((value) & 0x00000001) >> 0) 20494 #define ALT_SYSMGR_PINMUX_GPLMUX27_SEL_SET(value) (((value) << 0) & 0x00000001) 20496 #ifndef __ASSEMBLY__ 20518 #define ALT_SYSMGR_PINMUX_GPLMUX27_OFST 0x240 20553 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_LSB 0 20555 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_MSB 0 20557 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_WIDTH 1 20559 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_SET_MSK 0x00000001 20561 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_CLR_MSK 0xfffffffe 20563 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_RESET 0x0 20565 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_GET(value) (((value) & 0x00000001) >> 0) 20567 #define ALT_SYSMGR_PINMUX_GPLMUX28_SEL_SET(value) (((value) << 0) & 0x00000001) 20569 #ifndef __ASSEMBLY__ 20591 #define ALT_SYSMGR_PINMUX_GPLMUX28_OFST 0x244 20626 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_LSB 0 20628 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_MSB 0 20630 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_WIDTH 1 20632 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_SET_MSK 0x00000001 20634 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_CLR_MSK 0xfffffffe 20636 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_RESET 0x0 20638 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_GET(value) (((value) & 0x00000001) >> 0) 20640 #define ALT_SYSMGR_PINMUX_GPLMUX29_SEL_SET(value) (((value) << 0) & 0x00000001) 20642 #ifndef __ASSEMBLY__ 20664 #define ALT_SYSMGR_PINMUX_GPLMUX29_OFST 0x248 20699 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_LSB 0 20701 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_MSB 0 20703 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_WIDTH 1 20705 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_SET_MSK 0x00000001 20707 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_CLR_MSK 0xfffffffe 20709 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_RESET 0x0 20711 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_GET(value) (((value) & 0x00000001) >> 0) 20713 #define ALT_SYSMGR_PINMUX_GPLMUX30_SEL_SET(value) (((value) << 0) & 0x00000001) 20715 #ifndef __ASSEMBLY__ 20737 #define ALT_SYSMGR_PINMUX_GPLMUX30_OFST 0x24c 20772 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_LSB 0 20774 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_MSB 0 20776 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_WIDTH 1 20778 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_SET_MSK 0x00000001 20780 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_CLR_MSK 0xfffffffe 20782 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_RESET 0x0 20784 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_GET(value) (((value) & 0x00000001) >> 0) 20786 #define ALT_SYSMGR_PINMUX_GPLMUX31_SEL_SET(value) (((value) << 0) & 0x00000001) 20788 #ifndef __ASSEMBLY__ 20810 #define ALT_SYSMGR_PINMUX_GPLMUX31_OFST 0x250 20845 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_LSB 0 20847 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_MSB 0 20849 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_WIDTH 1 20851 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_SET_MSK 0x00000001 20853 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_CLR_MSK 0xfffffffe 20855 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_RESET 0x0 20857 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_GET(value) (((value) & 0x00000001) >> 0) 20859 #define ALT_SYSMGR_PINMUX_GPLMUX32_SEL_SET(value) (((value) << 0) & 0x00000001) 20861 #ifndef __ASSEMBLY__ 20883 #define ALT_SYSMGR_PINMUX_GPLMUX32_OFST 0x254 20918 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_LSB 0 20920 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_MSB 0 20922 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_WIDTH 1 20924 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_SET_MSK 0x00000001 20926 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_CLR_MSK 0xfffffffe 20928 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_RESET 0x0 20930 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_GET(value) (((value) & 0x00000001) >> 0) 20932 #define ALT_SYSMGR_PINMUX_GPLMUX33_SEL_SET(value) (((value) << 0) & 0x00000001) 20934 #ifndef __ASSEMBLY__ 20956 #define ALT_SYSMGR_PINMUX_GPLMUX33_OFST 0x258 20991 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_LSB 0 20993 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_MSB 0 20995 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_WIDTH 1 20997 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_SET_MSK 0x00000001 20999 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_CLR_MSK 0xfffffffe 21001 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_RESET 0x0 21003 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_GET(value) (((value) & 0x00000001) >> 0) 21005 #define ALT_SYSMGR_PINMUX_GPLMUX34_SEL_SET(value) (((value) << 0) & 0x00000001) 21007 #ifndef __ASSEMBLY__ 21029 #define ALT_SYSMGR_PINMUX_GPLMUX34_OFST 0x25c 21064 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_LSB 0 21066 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_MSB 0 21068 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_WIDTH 1 21070 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_SET_MSK 0x00000001 21072 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_CLR_MSK 0xfffffffe 21074 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_RESET 0x0 21076 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_GET(value) (((value) & 0x00000001) >> 0) 21078 #define ALT_SYSMGR_PINMUX_GPLMUX35_SEL_SET(value) (((value) << 0) & 0x00000001) 21080 #ifndef __ASSEMBLY__ 21102 #define ALT_SYSMGR_PINMUX_GPLMUX35_OFST 0x260 21137 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_LSB 0 21139 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_MSB 0 21141 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_WIDTH 1 21143 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_SET_MSK 0x00000001 21145 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_CLR_MSK 0xfffffffe 21147 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_RESET 0x0 21149 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_GET(value) (((value) & 0x00000001) >> 0) 21151 #define ALT_SYSMGR_PINMUX_GPLMUX36_SEL_SET(value) (((value) << 0) & 0x00000001) 21153 #ifndef __ASSEMBLY__ 21175 #define ALT_SYSMGR_PINMUX_GPLMUX36_OFST 0x264 21210 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_LSB 0 21212 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_MSB 0 21214 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_WIDTH 1 21216 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_SET_MSK 0x00000001 21218 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_CLR_MSK 0xfffffffe 21220 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_RESET 0x0 21222 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_GET(value) (((value) & 0x00000001) >> 0) 21224 #define ALT_SYSMGR_PINMUX_GPLMUX37_SEL_SET(value) (((value) << 0) & 0x00000001) 21226 #ifndef __ASSEMBLY__ 21248 #define ALT_SYSMGR_PINMUX_GPLMUX37_OFST 0x268 21283 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_LSB 0 21285 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_MSB 0 21287 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_WIDTH 1 21289 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_SET_MSK 0x00000001 21291 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_CLR_MSK 0xfffffffe 21293 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_RESET 0x0 21295 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_GET(value) (((value) & 0x00000001) >> 0) 21297 #define ALT_SYSMGR_PINMUX_GPLMUX38_SEL_SET(value) (((value) << 0) & 0x00000001) 21299 #ifndef __ASSEMBLY__ 21321 #define ALT_SYSMGR_PINMUX_GPLMUX38_OFST 0x26c 21356 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_LSB 0 21358 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_MSB 0 21360 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_WIDTH 1 21362 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_SET_MSK 0x00000001 21364 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_CLR_MSK 0xfffffffe 21366 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_RESET 0x0 21368 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_GET(value) (((value) & 0x00000001) >> 0) 21370 #define ALT_SYSMGR_PINMUX_GPLMUX39_SEL_SET(value) (((value) << 0) & 0x00000001) 21372 #ifndef __ASSEMBLY__ 21394 #define ALT_SYSMGR_PINMUX_GPLMUX39_OFST 0x270 21429 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_LSB 0 21431 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_MSB 0 21433 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_WIDTH 1 21435 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_SET_MSK 0x00000001 21437 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_CLR_MSK 0xfffffffe 21439 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_RESET 0x0 21441 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_GET(value) (((value) & 0x00000001) >> 0) 21443 #define ALT_SYSMGR_PINMUX_GPLMUX40_SEL_SET(value) (((value) << 0) & 0x00000001) 21445 #ifndef __ASSEMBLY__ 21467 #define ALT_SYSMGR_PINMUX_GPLMUX40_OFST 0x274 21502 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_LSB 0 21504 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_MSB 0 21506 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_WIDTH 1 21508 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_SET_MSK 0x00000001 21510 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_CLR_MSK 0xfffffffe 21512 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_RESET 0x0 21514 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_GET(value) (((value) & 0x00000001) >> 0) 21516 #define ALT_SYSMGR_PINMUX_GPLMUX41_SEL_SET(value) (((value) << 0) & 0x00000001) 21518 #ifndef __ASSEMBLY__ 21540 #define ALT_SYSMGR_PINMUX_GPLMUX41_OFST 0x278 21575 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_LSB 0 21577 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_MSB 0 21579 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_WIDTH 1 21581 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_SET_MSK 0x00000001 21583 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_CLR_MSK 0xfffffffe 21585 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_RESET 0x0 21587 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_GET(value) (((value) & 0x00000001) >> 0) 21589 #define ALT_SYSMGR_PINMUX_GPLMUX42_SEL_SET(value) (((value) << 0) & 0x00000001) 21591 #ifndef __ASSEMBLY__ 21613 #define ALT_SYSMGR_PINMUX_GPLMUX42_OFST 0x27c 21648 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_LSB 0 21650 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_MSB 0 21652 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_WIDTH 1 21654 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_SET_MSK 0x00000001 21656 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_CLR_MSK 0xfffffffe 21658 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_RESET 0x0 21660 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_GET(value) (((value) & 0x00000001) >> 0) 21662 #define ALT_SYSMGR_PINMUX_GPLMUX43_SEL_SET(value) (((value) << 0) & 0x00000001) 21664 #ifndef __ASSEMBLY__ 21686 #define ALT_SYSMGR_PINMUX_GPLMUX43_OFST 0x280 21721 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_LSB 0 21723 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_MSB 0 21725 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_WIDTH 1 21727 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_SET_MSK 0x00000001 21729 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_CLR_MSK 0xfffffffe 21731 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_RESET 0x0 21733 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_GET(value) (((value) & 0x00000001) >> 0) 21735 #define ALT_SYSMGR_PINMUX_GPLMUX44_SEL_SET(value) (((value) << 0) & 0x00000001) 21737 #ifndef __ASSEMBLY__ 21759 #define ALT_SYSMGR_PINMUX_GPLMUX44_OFST 0x284 21794 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_LSB 0 21796 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_MSB 0 21798 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_WIDTH 1 21800 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_SET_MSK 0x00000001 21802 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_CLR_MSK 0xfffffffe 21804 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_RESET 0x0 21806 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_GET(value) (((value) & 0x00000001) >> 0) 21808 #define ALT_SYSMGR_PINMUX_GPLMUX45_SEL_SET(value) (((value) << 0) & 0x00000001) 21810 #ifndef __ASSEMBLY__ 21832 #define ALT_SYSMGR_PINMUX_GPLMUX45_OFST 0x288 21867 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_LSB 0 21869 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_MSB 0 21871 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_WIDTH 1 21873 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_SET_MSK 0x00000001 21875 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_CLR_MSK 0xfffffffe 21877 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_RESET 0x0 21879 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_GET(value) (((value) & 0x00000001) >> 0) 21881 #define ALT_SYSMGR_PINMUX_GPLMUX46_SEL_SET(value) (((value) << 0) & 0x00000001) 21883 #ifndef __ASSEMBLY__ 21905 #define ALT_SYSMGR_PINMUX_GPLMUX46_OFST 0x28c 21940 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_LSB 0 21942 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_MSB 0 21944 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_WIDTH 1 21946 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_SET_MSK 0x00000001 21948 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_CLR_MSK 0xfffffffe 21950 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_RESET 0x0 21952 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_GET(value) (((value) & 0x00000001) >> 0) 21954 #define ALT_SYSMGR_PINMUX_GPLMUX47_SEL_SET(value) (((value) << 0) & 0x00000001) 21956 #ifndef __ASSEMBLY__ 21978 #define ALT_SYSMGR_PINMUX_GPLMUX47_OFST 0x290 22013 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_LSB 0 22015 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_MSB 0 22017 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_WIDTH 1 22019 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_SET_MSK 0x00000001 22021 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_CLR_MSK 0xfffffffe 22023 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_RESET 0x0 22025 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_GET(value) (((value) & 0x00000001) >> 0) 22027 #define ALT_SYSMGR_PINMUX_GPLMUX48_SEL_SET(value) (((value) << 0) & 0x00000001) 22029 #ifndef __ASSEMBLY__ 22051 #define ALT_SYSMGR_PINMUX_GPLMUX48_OFST 0x294 22086 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_LSB 0 22088 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_MSB 0 22090 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_WIDTH 1 22092 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_SET_MSK 0x00000001 22094 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_CLR_MSK 0xfffffffe 22096 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_RESET 0x0 22098 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_GET(value) (((value) & 0x00000001) >> 0) 22100 #define ALT_SYSMGR_PINMUX_GPLMUX49_SEL_SET(value) (((value) << 0) & 0x00000001) 22102 #ifndef __ASSEMBLY__ 22124 #define ALT_SYSMGR_PINMUX_GPLMUX49_OFST 0x298 22159 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_LSB 0 22161 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_MSB 0 22163 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_WIDTH 1 22165 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_SET_MSK 0x00000001 22167 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_CLR_MSK 0xfffffffe 22169 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_RESET 0x0 22171 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_GET(value) (((value) & 0x00000001) >> 0) 22173 #define ALT_SYSMGR_PINMUX_GPLMUX50_SEL_SET(value) (((value) << 0) & 0x00000001) 22175 #ifndef __ASSEMBLY__ 22197 #define ALT_SYSMGR_PINMUX_GPLMUX50_OFST 0x29c 22232 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_LSB 0 22234 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_MSB 0 22236 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_WIDTH 1 22238 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_SET_MSK 0x00000001 22240 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_CLR_MSK 0xfffffffe 22242 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_RESET 0x0 22244 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_GET(value) (((value) & 0x00000001) >> 0) 22246 #define ALT_SYSMGR_PINMUX_GPLMUX51_SEL_SET(value) (((value) << 0) & 0x00000001) 22248 #ifndef __ASSEMBLY__ 22270 #define ALT_SYSMGR_PINMUX_GPLMUX51_OFST 0x2a0 22305 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_LSB 0 22307 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_MSB 0 22309 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_WIDTH 1 22311 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_SET_MSK 0x00000001 22313 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_CLR_MSK 0xfffffffe 22315 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_RESET 0x0 22317 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_GET(value) (((value) & 0x00000001) >> 0) 22319 #define ALT_SYSMGR_PINMUX_GPLMUX52_SEL_SET(value) (((value) << 0) & 0x00000001) 22321 #ifndef __ASSEMBLY__ 22343 #define ALT_SYSMGR_PINMUX_GPLMUX52_OFST 0x2a4 22378 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_LSB 0 22380 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_MSB 0 22382 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_WIDTH 1 22384 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_SET_MSK 0x00000001 22386 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_CLR_MSK 0xfffffffe 22388 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_RESET 0x0 22390 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_GET(value) (((value) & 0x00000001) >> 0) 22392 #define ALT_SYSMGR_PINMUX_GPLMUX53_SEL_SET(value) (((value) << 0) & 0x00000001) 22394 #ifndef __ASSEMBLY__ 22416 #define ALT_SYSMGR_PINMUX_GPLMUX53_OFST 0x2a8 22451 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_LSB 0 22453 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_MSB 0 22455 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_WIDTH 1 22457 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_SET_MSK 0x00000001 22459 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_CLR_MSK 0xfffffffe 22461 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_RESET 0x0 22463 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_GET(value) (((value) & 0x00000001) >> 0) 22465 #define ALT_SYSMGR_PINMUX_GPLMUX54_SEL_SET(value) (((value) << 0) & 0x00000001) 22467 #ifndef __ASSEMBLY__ 22489 #define ALT_SYSMGR_PINMUX_GPLMUX54_OFST 0x2ac 22524 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_LSB 0 22526 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_MSB 0 22528 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_WIDTH 1 22530 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_SET_MSK 0x00000001 22532 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_CLR_MSK 0xfffffffe 22534 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_RESET 0x0 22536 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_GET(value) (((value) & 0x00000001) >> 0) 22538 #define ALT_SYSMGR_PINMUX_GPLMUX55_SEL_SET(value) (((value) << 0) & 0x00000001) 22540 #ifndef __ASSEMBLY__ 22562 #define ALT_SYSMGR_PINMUX_GPLMUX55_OFST 0x2b0 22597 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_LSB 0 22599 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_MSB 0 22601 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_WIDTH 1 22603 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_SET_MSK 0x00000001 22605 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_CLR_MSK 0xfffffffe 22607 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_RESET 0x0 22609 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_GET(value) (((value) & 0x00000001) >> 0) 22611 #define ALT_SYSMGR_PINMUX_GPLMUX56_SEL_SET(value) (((value) << 0) & 0x00000001) 22613 #ifndef __ASSEMBLY__ 22635 #define ALT_SYSMGR_PINMUX_GPLMUX56_OFST 0x2b4 22670 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_LSB 0 22672 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_MSB 0 22674 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_WIDTH 1 22676 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_SET_MSK 0x00000001 22678 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_CLR_MSK 0xfffffffe 22680 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_RESET 0x0 22682 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_GET(value) (((value) & 0x00000001) >> 0) 22684 #define ALT_SYSMGR_PINMUX_GPLMUX57_SEL_SET(value) (((value) << 0) & 0x00000001) 22686 #ifndef __ASSEMBLY__ 22708 #define ALT_SYSMGR_PINMUX_GPLMUX57_OFST 0x2b8 22743 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_LSB 0 22745 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_MSB 0 22747 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_WIDTH 1 22749 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_SET_MSK 0x00000001 22751 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_CLR_MSK 0xfffffffe 22753 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_RESET 0x0 22755 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_GET(value) (((value) & 0x00000001) >> 0) 22757 #define ALT_SYSMGR_PINMUX_GPLMUX58_SEL_SET(value) (((value) << 0) & 0x00000001) 22759 #ifndef __ASSEMBLY__ 22781 #define ALT_SYSMGR_PINMUX_GPLMUX58_OFST 0x2bc 22816 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_LSB 0 22818 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_MSB 0 22820 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_WIDTH 1 22822 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_SET_MSK 0x00000001 22824 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_CLR_MSK 0xfffffffe 22826 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_RESET 0x0 22828 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_GET(value) (((value) & 0x00000001) >> 0) 22830 #define ALT_SYSMGR_PINMUX_GPLMUX59_SEL_SET(value) (((value) << 0) & 0x00000001) 22832 #ifndef __ASSEMBLY__ 22854 #define ALT_SYSMGR_PINMUX_GPLMUX59_OFST 0x2c0 22889 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_LSB 0 22891 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_MSB 0 22893 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_WIDTH 1 22895 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_SET_MSK 0x00000001 22897 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_CLR_MSK 0xfffffffe 22899 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_RESET 0x0 22901 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_GET(value) (((value) & 0x00000001) >> 0) 22903 #define ALT_SYSMGR_PINMUX_GPLMUX60_SEL_SET(value) (((value) << 0) & 0x00000001) 22905 #ifndef __ASSEMBLY__ 22927 #define ALT_SYSMGR_PINMUX_GPLMUX60_OFST 0x2c4 22962 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_LSB 0 22964 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_MSB 0 22966 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_WIDTH 1 22968 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_SET_MSK 0x00000001 22970 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_CLR_MSK 0xfffffffe 22972 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_RESET 0x0 22974 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_GET(value) (((value) & 0x00000001) >> 0) 22976 #define ALT_SYSMGR_PINMUX_GPLMUX61_SEL_SET(value) (((value) << 0) & 0x00000001) 22978 #ifndef __ASSEMBLY__ 23000 #define ALT_SYSMGR_PINMUX_GPLMUX61_OFST 0x2c8 23035 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_LSB 0 23037 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_MSB 0 23039 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_WIDTH 1 23041 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_SET_MSK 0x00000001 23043 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_CLR_MSK 0xfffffffe 23045 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_RESET 0x0 23047 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_GET(value) (((value) & 0x00000001) >> 0) 23049 #define ALT_SYSMGR_PINMUX_GPLMUX62_SEL_SET(value) (((value) << 0) & 0x00000001) 23051 #ifndef __ASSEMBLY__ 23073 #define ALT_SYSMGR_PINMUX_GPLMUX62_OFST 0x2cc 23108 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_LSB 0 23110 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_MSB 0 23112 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_WIDTH 1 23114 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_SET_MSK 0x00000001 23116 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_CLR_MSK 0xfffffffe 23118 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_RESET 0x0 23120 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_GET(value) (((value) & 0x00000001) >> 0) 23122 #define ALT_SYSMGR_PINMUX_GPLMUX63_SEL_SET(value) (((value) << 0) & 0x00000001) 23124 #ifndef __ASSEMBLY__ 23146 #define ALT_SYSMGR_PINMUX_GPLMUX63_OFST 0x2d0 23181 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_LSB 0 23183 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_MSB 0 23185 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_WIDTH 1 23187 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_SET_MSK 0x00000001 23189 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_CLR_MSK 0xfffffffe 23191 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_RESET 0x0 23193 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_GET(value) (((value) & 0x00000001) >> 0) 23195 #define ALT_SYSMGR_PINMUX_GPLMUX64_SEL_SET(value) (((value) << 0) & 0x00000001) 23197 #ifndef __ASSEMBLY__ 23219 #define ALT_SYSMGR_PINMUX_GPLMUX64_OFST 0x2d4 23254 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_LSB 0 23256 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_MSB 0 23258 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_WIDTH 1 23260 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_SET_MSK 0x00000001 23262 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_CLR_MSK 0xfffffffe 23264 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_RESET 0x0 23266 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_GET(value) (((value) & 0x00000001) >> 0) 23268 #define ALT_SYSMGR_PINMUX_GPLMUX65_SEL_SET(value) (((value) << 0) & 0x00000001) 23270 #ifndef __ASSEMBLY__ 23292 #define ALT_SYSMGR_PINMUX_GPLMUX65_OFST 0x2d8 23327 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_LSB 0 23329 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_MSB 0 23331 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_WIDTH 1 23333 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_SET_MSK 0x00000001 23335 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_CLR_MSK 0xfffffffe 23337 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_RESET 0x0 23339 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_GET(value) (((value) & 0x00000001) >> 0) 23341 #define ALT_SYSMGR_PINMUX_GPLMUX66_SEL_SET(value) (((value) << 0) & 0x00000001) 23343 #ifndef __ASSEMBLY__ 23365 #define ALT_SYSMGR_PINMUX_GPLMUX66_OFST 0x2dc 23400 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_LSB 0 23402 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_MSB 0 23404 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_WIDTH 1 23406 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_SET_MSK 0x00000001 23408 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_CLR_MSK 0xfffffffe 23410 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_RESET 0x0 23412 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_GET(value) (((value) & 0x00000001) >> 0) 23414 #define ALT_SYSMGR_PINMUX_GPLMUX67_SEL_SET(value) (((value) << 0) & 0x00000001) 23416 #ifndef __ASSEMBLY__ 23438 #define ALT_SYSMGR_PINMUX_GPLMUX67_OFST 0x2e0 23473 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_LSB 0 23475 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_MSB 0 23477 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_WIDTH 1 23479 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_SET_MSK 0x00000001 23481 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_CLR_MSK 0xfffffffe 23483 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_RESET 0x0 23485 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_GET(value) (((value) & 0x00000001) >> 0) 23487 #define ALT_SYSMGR_PINMUX_GPLMUX68_SEL_SET(value) (((value) << 0) & 0x00000001) 23489 #ifndef __ASSEMBLY__ 23511 #define ALT_SYSMGR_PINMUX_GPLMUX68_OFST 0x2e4 23546 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_LSB 0 23548 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_MSB 0 23550 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_WIDTH 1 23552 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_SET_MSK 0x00000001 23554 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_CLR_MSK 0xfffffffe 23556 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_RESET 0x0 23558 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_GET(value) (((value) & 0x00000001) >> 0) 23560 #define ALT_SYSMGR_PINMUX_GPLMUX69_SEL_SET(value) (((value) << 0) & 0x00000001) 23562 #ifndef __ASSEMBLY__ 23584 #define ALT_SYSMGR_PINMUX_GPLMUX69_OFST 0x2e8 23619 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_LSB 0 23621 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_MSB 0 23623 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_WIDTH 1 23625 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_SET_MSK 0x00000001 23627 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_CLR_MSK 0xfffffffe 23629 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_RESET 0x0 23631 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_GET(value) (((value) & 0x00000001) >> 0) 23633 #define ALT_SYSMGR_PINMUX_GPLMUX70_SEL_SET(value) (((value) << 0) & 0x00000001) 23635 #ifndef __ASSEMBLY__ 23657 #define ALT_SYSMGR_PINMUX_GPLMUX70_OFST 0x2ec 23690 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_LSB 0 23692 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_MSB 0 23694 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_WIDTH 1 23696 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_SET_MSK 0x00000001 23698 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_CLR_MSK 0xfffffffe 23700 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_RESET 0x0 23702 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 23704 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 23706 #ifndef __ASSEMBLY__ 23728 #define ALT_SYSMGR_PINMUX_NANDUSEFPGA_OFST 0x2f0 23761 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_LSB 0 23763 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_MSB 0 23765 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_WIDTH 1 23767 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_SET_MSK 0x00000001 23769 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_CLR_MSK 0xfffffffe 23771 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_RESET 0x0 23773 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 23775 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 23777 #ifndef __ASSEMBLY__ 23799 #define ALT_SYSMGR_PINMUX_RGMII1USEFPGA_OFST 0x2f8 23832 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_LSB 0 23834 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_MSB 0 23836 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_WIDTH 1 23838 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_SET_MSK 0x00000001 23840 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_CLR_MSK 0xfffffffe 23842 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_RESET 0x0 23844 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 23846 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 23848 #ifndef __ASSEMBLY__ 23870 #define ALT_SYSMGR_PINMUX_I2C0USEFPGA_OFST 0x304 23903 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_LSB 0 23905 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_MSB 0 23907 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_WIDTH 1 23909 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_SET_MSK 0x00000001 23911 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_CLR_MSK 0xfffffffe 23913 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_RESET 0x0 23915 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 23917 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 23919 #ifndef __ASSEMBLY__ 23941 #define ALT_SYSMGR_PINMUX_RGMII0USEFPGA_OFST 0x314 23974 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_LSB 0 23976 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_MSB 0 23978 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_WIDTH 1 23980 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_SET_MSK 0x00000001 23982 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_CLR_MSK 0xfffffffe 23984 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_RESET 0x0 23986 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 23988 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 23990 #ifndef __ASSEMBLY__ 24012 #define ALT_SYSMGR_PINMUX_I2C3USEFPGA_OFST 0x324 24045 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_LSB 0 24047 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_MSB 0 24049 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_WIDTH 1 24051 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_SET_MSK 0x00000001 24053 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_CLR_MSK 0xfffffffe 24055 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_RESET 0x0 24057 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 24059 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 24061 #ifndef __ASSEMBLY__ 24083 #define ALT_SYSMGR_PINMUX_I2C2USEFPGA_OFST 0x328 24116 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_LSB 0 24118 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_MSB 0 24120 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_WIDTH 1 24122 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_SET_MSK 0x00000001 24124 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_CLR_MSK 0xfffffffe 24126 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_RESET 0x0 24128 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 24130 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 24132 #ifndef __ASSEMBLY__ 24154 #define ALT_SYSMGR_PINMUX_I2C1USEFPGA_OFST 0x32c 24187 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_LSB 0 24189 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_MSB 0 24191 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_WIDTH 1 24193 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_SET_MSK 0x00000001 24195 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_CLR_MSK 0xfffffffe 24197 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_RESET 0x0 24199 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 24201 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 24203 #ifndef __ASSEMBLY__ 24225 #define ALT_SYSMGR_PINMUX_SPIM1USEFPGA_OFST 0x330 24258 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_LSB 0 24260 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_MSB 0 24262 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_WIDTH 1 24264 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_SET_MSK 0x00000001 24266 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_CLR_MSK 0xfffffffe 24268 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_RESET 0x0 24270 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_GET(value) (((value) & 0x00000001) >> 0) 24272 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_SEL_SET(value) (((value) << 0) & 0x00000001) 24274 #ifndef __ASSEMBLY__ 24296 #define ALT_SYSMGR_PINMUX_SPIM0USEFPGA_OFST 0x338 24298 #ifndef __ASSEMBLY__ 24311 volatile ALT_SYSMGR_PINMUX_EMACIO0_t EMACIO0;
24312 volatile ALT_SYSMGR_PINMUX_EMACIO1_t EMACIO1;
24313 volatile ALT_SYSMGR_PINMUX_EMACIO2_t EMACIO2;
24314 volatile ALT_SYSMGR_PINMUX_EMACIO3_t EMACIO3;
24315 volatile ALT_SYSMGR_PINMUX_EMACIO4_t EMACIO4;
24316 volatile ALT_SYSMGR_PINMUX_EMACIO5_t EMACIO5;
24317 volatile ALT_SYSMGR_PINMUX_EMACIO6_t EMACIO6;
24318 volatile ALT_SYSMGR_PINMUX_EMACIO7_t EMACIO7;
24319 volatile ALT_SYSMGR_PINMUX_EMACIO8_t EMACIO8;
24320 volatile ALT_SYSMGR_PINMUX_EMACIO9_t EMACIO9;
24321 volatile ALT_SYSMGR_PINMUX_EMACIO10_t EMACIO10;
24322 volatile ALT_SYSMGR_PINMUX_EMACIO11_t EMACIO11;
24323 volatile ALT_SYSMGR_PINMUX_EMACIO12_t EMACIO12;
24324 volatile ALT_SYSMGR_PINMUX_EMACIO13_t EMACIO13;
24325 volatile ALT_SYSMGR_PINMUX_EMACIO14_t EMACIO14;
24326 volatile ALT_SYSMGR_PINMUX_EMACIO15_t EMACIO15;
24327 volatile ALT_SYSMGR_PINMUX_EMACIO16_t EMACIO16;
24328 volatile ALT_SYSMGR_PINMUX_EMACIO17_t EMACIO17;
24329 volatile ALT_SYSMGR_PINMUX_EMACIO18_t EMACIO18;
24330 volatile ALT_SYSMGR_PINMUX_EMACIO19_t EMACIO19;
24331 volatile ALT_SYSMGR_PINMUX_FLSHIO0_t FLASHIO0;
24332 volatile ALT_SYSMGR_PINMUX_FLSHIO1_t FLASHIO1;
24333 volatile ALT_SYSMGR_PINMUX_FLSHIO2_t FLASHIO2;
24334 volatile ALT_SYSMGR_PINMUX_FLSHIO3_t FLASHIO3;
24335 volatile ALT_SYSMGR_PINMUX_FLSHIO4_t FLASHIO4;
24336 volatile ALT_SYSMGR_PINMUX_FLSHIO5_t FLASHIO5;
24337 volatile ALT_SYSMGR_PINMUX_FLSHIO6_t FLASHIO6;
24338 volatile ALT_SYSMGR_PINMUX_FLSHIO7_t FLASHIO7;
24339 volatile ALT_SYSMGR_PINMUX_FLSHIO8_t FLASHIO8;
24340 volatile ALT_SYSMGR_PINMUX_FLSHIO9_t FLASHIO9;
24341 volatile ALT_SYSMGR_PINMUX_FLSHIO10_t FLASHIO10;
24342 volatile ALT_SYSMGR_PINMUX_FLSHIO11_t FLASHIO11;
24343 volatile ALT_SYSMGR_PINMUX_GENERALIO0_t GENERALIO0;
24344 volatile ALT_SYSMGR_PINMUX_GENERALIO1_t GENERALIO1;
24345 volatile ALT_SYSMGR_PINMUX_GENERALIO2_t GENERALIO2;
24346 volatile ALT_SYSMGR_PINMUX_GENERALIO3_t GENERALIO3;
24347 volatile ALT_SYSMGR_PINMUX_GENERALIO4_t GENERALIO4;
24348 volatile ALT_SYSMGR_PINMUX_GENERALIO5_t GENERALIO5;
24349 volatile ALT_SYSMGR_PINMUX_GENERALIO6_t GENERALIO6;
24350 volatile ALT_SYSMGR_PINMUX_GENERALIO7_t GENERALIO7;
24351 volatile ALT_SYSMGR_PINMUX_GENERALIO8_t GENERALIO8;
24352 volatile ALT_SYSMGR_PINMUX_GENERALIO9_t GENERALIO9;
24353 volatile ALT_SYSMGR_PINMUX_GENERALIO10_t GENERALIO10;
24354 volatile ALT_SYSMGR_PINMUX_GENERALIO11_t GENERALIO11;
24355 volatile ALT_SYSMGR_PINMUX_GENERALIO12_t GENERALIO12;
24356 volatile ALT_SYSMGR_PINMUX_GENERALIO13_t GENERALIO13;
24357 volatile ALT_SYSMGR_PINMUX_GENERALIO14_t GENERALIO14;
24358 volatile ALT_SYSMGR_PINMUX_GENERALIO15_t GENERALIO15;
24359 volatile ALT_SYSMGR_PINMUX_GENERALIO16_t GENERALIO16;
24360 volatile ALT_SYSMGR_PINMUX_GENERALIO17_t GENERALIO17;
24361 volatile ALT_SYSMGR_PINMUX_GENERALIO18_t GENERALIO18;
24362 volatile ALT_SYSMGR_PINMUX_GENERALIO19_t GENERALIO19;
24363 volatile ALT_SYSMGR_PINMUX_GENERALIO20_t GENERALIO20;
24364 volatile ALT_SYSMGR_PINMUX_GENERALIO21_t GENERALIO21;
24365 volatile ALT_SYSMGR_PINMUX_GENERALIO22_t GENERALIO22;
24366 volatile ALT_SYSMGR_PINMUX_GENERALIO23_t GENERALIO23;
24367 volatile ALT_SYSMGR_PINMUX_GENERALIO24_t GENERALIO24;
24368 volatile ALT_SYSMGR_PINMUX_GENERALIO25_t GENERALIO25;
24369 volatile ALT_SYSMGR_PINMUX_GENERALIO26_t GENERALIO26;
24370 volatile ALT_SYSMGR_PINMUX_GENERALIO27_t GENERALIO27;
24371 volatile ALT_SYSMGR_PINMUX_GENERALIO28_t GENERALIO28;
24372 volatile ALT_SYSMGR_PINMUX_GENERALIO29_t GENERALIO29;
24373 volatile ALT_SYSMGR_PINMUX_GENERALIO30_t GENERALIO30;
24374 volatile ALT_SYSMGR_PINMUX_GENERALIO31_t GENERALIO31;
24375 volatile ALT_SYSMGR_PINMUX_MIXED1IO0_t MIXED1IO0;
24376 volatile ALT_SYSMGR_PINMUX_MIXED1IO1_t MIXED1IO1;
24377 volatile ALT_SYSMGR_PINMUX_MIXED1IO2_t MIXED1IO2;
24378 volatile ALT_SYSMGR_PINMUX_MIXED1IO3_t MIXED1IO3;
24379 volatile ALT_SYSMGR_PINMUX_MIXED1IO4_t MIXED1IO4;
24380 volatile ALT_SYSMGR_PINMUX_MIXED1IO5_t MIXED1IO5;
24381 volatile ALT_SYSMGR_PINMUX_MIXED1IO6_t MIXED1IO6;
24382 volatile ALT_SYSMGR_PINMUX_MIXED1IO7_t MIXED1IO7;
24383 volatile ALT_SYSMGR_PINMUX_MIXED1IO8_t MIXED1IO8;
24384 volatile ALT_SYSMGR_PINMUX_MIXED1IO9_t MIXED1IO9;
24385 volatile ALT_SYSMGR_PINMUX_MIXED1IO10_t MIXED1IO10;
24386 volatile ALT_SYSMGR_PINMUX_MIXED1IO11_t MIXED1IO11;
24387 volatile ALT_SYSMGR_PINMUX_MIXED1IO12_t MIXED1IO12;
24388 volatile ALT_SYSMGR_PINMUX_MIXED1IO13_t MIXED1IO13;
24389 volatile ALT_SYSMGR_PINMUX_MIXED1IO14_t MIXED1IO14;
24390 volatile ALT_SYSMGR_PINMUX_MIXED1IO15_t MIXED1IO15;
24391 volatile ALT_SYSMGR_PINMUX_MIXED1IO16_t MIXED1IO16;
24392 volatile ALT_SYSMGR_PINMUX_MIXED1IO17_t MIXED1IO17;
24393 volatile ALT_SYSMGR_PINMUX_MIXED1IO18_t MIXED1IO18;
24394 volatile ALT_SYSMGR_PINMUX_MIXED1IO19_t MIXED1IO19;
24395 volatile ALT_SYSMGR_PINMUX_MIXED1IO20_t MIXED1IO20;
24396 volatile ALT_SYSMGR_PINMUX_MIXED1IO21_t MIXED1IO21;
24397 volatile ALT_SYSMGR_PINMUX_MIXED2IO0_t MIXED2IO0;
24398 volatile ALT_SYSMGR_PINMUX_MIXED2IO1_t MIXED2IO1;
24399 volatile ALT_SYSMGR_PINMUX_MIXED2IO2_t MIXED2IO2;
24400 volatile ALT_SYSMGR_PINMUX_MIXED2IO3_t MIXED2IO3;
24401 volatile ALT_SYSMGR_PINMUX_MIXED2IO4_t MIXED2IO4;
24402 volatile ALT_SYSMGR_PINMUX_MIXED2IO5_t MIXED2IO5;
24403 volatile ALT_SYSMGR_PINMUX_MIXED2IO6_t MIXED2IO6;
24404 volatile ALT_SYSMGR_PINMUX_MIXED2IO7_t MIXED2IO7;
24405 volatile ALT_SYSMGR_PINMUX_GPLINMUX48_t GPLINMUX48;
24406 volatile ALT_SYSMGR_PINMUX_GPLINMUX49_t GPLINMUX49;
24407 volatile ALT_SYSMGR_PINMUX_GPLINMUX50_t GPLINMUX50;
24408 volatile ALT_SYSMGR_PINMUX_GPLINMUX51_t GPLINMUX51;
24409 volatile ALT_SYSMGR_PINMUX_GPLINMUX52_t GPLINMUX52;
24410 volatile ALT_SYSMGR_PINMUX_GPLINMUX53_t GPLINMUX53;
24411 volatile ALT_SYSMGR_PINMUX_GPLINMUX54_t GPLINMUX54;
24412 volatile ALT_SYSMGR_PINMUX_GPLINMUX55_t GPLINMUX55;
24413 volatile ALT_SYSMGR_PINMUX_GPLINMUX56_t GPLINMUX56;
24414 volatile ALT_SYSMGR_PINMUX_GPLINMUX57_t GPLINMUX57;
24415 volatile ALT_SYSMGR_PINMUX_GPLINMUX58_t GPLINMUX58;
24416 volatile ALT_SYSMGR_PINMUX_GPLINMUX59_t GPLINMUX59;
24417 volatile ALT_SYSMGR_PINMUX_GPLINMUX60_t GPLINMUX60;
24418 volatile ALT_SYSMGR_PINMUX_GPLINMUX61_t GPLINMUX61;
24419 volatile ALT_SYSMGR_PINMUX_GPLINMUX62_t GPLINMUX62;
24420 volatile ALT_SYSMGR_PINMUX_GPLINMUX63_t GPLINMUX63;
24421 volatile ALT_SYSMGR_PINMUX_GPLINMUX64_t GPLINMUX64;
24422 volatile ALT_SYSMGR_PINMUX_GPLINMUX65_t GPLINMUX65;
24423 volatile ALT_SYSMGR_PINMUX_GPLINMUX66_t GPLINMUX66;
24424 volatile ALT_SYSMGR_PINMUX_GPLINMUX67_t GPLINMUX67;
24425 volatile ALT_SYSMGR_PINMUX_GPLINMUX68_t GPLINMUX68;
24426 volatile ALT_SYSMGR_PINMUX_GPLINMUX69_t GPLINMUX69;
24427 volatile ALT_SYSMGR_PINMUX_GPLINMUX70_t GPLINMUX70;
24428 volatile ALT_SYSMGR_PINMUX_GPLMUX0_t GPLMUX0;
24429 volatile ALT_SYSMGR_PINMUX_GPLMUX1_t GPLMUX1;
24430 volatile ALT_SYSMGR_PINMUX_GPLMUX2_t GPLMUX2;
24431 volatile ALT_SYSMGR_PINMUX_GPLMUX3_t GPLMUX3;
24432 volatile ALT_SYSMGR_PINMUX_GPLMUX4_t GPLMUX4;
24433 volatile ALT_SYSMGR_PINMUX_GPLMUX5_t GPLMUX5;
24434 volatile ALT_SYSMGR_PINMUX_GPLMUX6_t GPLMUX6;
24435 volatile ALT_SYSMGR_PINMUX_GPLMUX7_t GPLMUX7;
24436 volatile ALT_SYSMGR_PINMUX_GPLMUX8_t GPLMUX8;
24437 volatile ALT_SYSMGR_PINMUX_GPLMUX9_t GPLMUX9;
24438 volatile ALT_SYSMGR_PINMUX_GPLMUX10_t GPLMUX10;
24439 volatile ALT_SYSMGR_PINMUX_GPLMUX11_t GPLMUX11;
24440 volatile ALT_SYSMGR_PINMUX_GPLMUX12_t GPLMUX12;
24441 volatile ALT_SYSMGR_PINMUX_GPLMUX13_t GPLMUX13;
24442 volatile ALT_SYSMGR_PINMUX_GPLMUX14_t GPLMUX14;
24443 volatile ALT_SYSMGR_PINMUX_GPLMUX15_t GPLMUX15;
24444 volatile ALT_SYSMGR_PINMUX_GPLMUX16_t GPLMUX16;
24445 volatile ALT_SYSMGR_PINMUX_GPLMUX17_t GPLMUX17;
24446 volatile ALT_SYSMGR_PINMUX_GPLMUX18_t GPLMUX18;
24447 volatile ALT_SYSMGR_PINMUX_GPLMUX19_t GPLMUX19;
24448 volatile ALT_SYSMGR_PINMUX_GPLMUX20_t GPLMUX20;
24449 volatile ALT_SYSMGR_PINMUX_GPLMUX21_t GPLMUX21;
24450 volatile ALT_SYSMGR_PINMUX_GPLMUX22_t GPLMUX22;
24451 volatile ALT_SYSMGR_PINMUX_GPLMUX23_t GPLMUX23;
24452 volatile ALT_SYSMGR_PINMUX_GPLMUX24_t GPLMUX24;
24453 volatile ALT_SYSMGR_PINMUX_GPLMUX25_t GPLMUX25;
24454 volatile ALT_SYSMGR_PINMUX_GPLMUX26_t GPLMUX26;
24455 volatile ALT_SYSMGR_PINMUX_GPLMUX27_t GPLMUX27;
24456 volatile ALT_SYSMGR_PINMUX_GPLMUX28_t GPLMUX28;
24457 volatile ALT_SYSMGR_PINMUX_GPLMUX29_t GPLMUX29;
24458 volatile ALT_SYSMGR_PINMUX_GPLMUX30_t GPLMUX30;
24459 volatile ALT_SYSMGR_PINMUX_GPLMUX31_t GPLMUX31;
24460 volatile ALT_SYSMGR_PINMUX_GPLMUX32_t GPLMUX32;
24461 volatile ALT_SYSMGR_PINMUX_GPLMUX33_t GPLMUX33;
24462 volatile ALT_SYSMGR_PINMUX_GPLMUX34_t GPLMUX34;
24463 volatile ALT_SYSMGR_PINMUX_GPLMUX35_t GPLMUX35;
24464 volatile ALT_SYSMGR_PINMUX_GPLMUX36_t GPLMUX36;
24465 volatile ALT_SYSMGR_PINMUX_GPLMUX37_t GPLMUX37;
24466 volatile ALT_SYSMGR_PINMUX_GPLMUX38_t GPLMUX38;
24467 volatile ALT_SYSMGR_PINMUX_GPLMUX39_t GPLMUX39;
24468 volatile ALT_SYSMGR_PINMUX_GPLMUX40_t GPLMUX40;
24469 volatile ALT_SYSMGR_PINMUX_GPLMUX41_t GPLMUX41;
24470 volatile ALT_SYSMGR_PINMUX_GPLMUX42_t GPLMUX42;
24471 volatile ALT_SYSMGR_PINMUX_GPLMUX43_t GPLMUX43;
24472 volatile ALT_SYSMGR_PINMUX_GPLMUX44_t GPLMUX44;
24473 volatile ALT_SYSMGR_PINMUX_GPLMUX45_t GPLMUX45;
24474 volatile ALT_SYSMGR_PINMUX_GPLMUX46_t GPLMUX46;
24475 volatile ALT_SYSMGR_PINMUX_GPLMUX47_t GPLMUX47;
24476 volatile ALT_SYSMGR_PINMUX_GPLMUX48_t GPLMUX48;
24477 volatile ALT_SYSMGR_PINMUX_GPLMUX49_t GPLMUX49;
24478 volatile ALT_SYSMGR_PINMUX_GPLMUX50_t GPLMUX50;
24479 volatile ALT_SYSMGR_PINMUX_GPLMUX51_t GPLMUX51;
24480 volatile ALT_SYSMGR_PINMUX_GPLMUX52_t GPLMUX52;
24481 volatile ALT_SYSMGR_PINMUX_GPLMUX53_t GPLMUX53;
24482 volatile ALT_SYSMGR_PINMUX_GPLMUX54_t GPLMUX54;
24483 volatile ALT_SYSMGR_PINMUX_GPLMUX55_t GPLMUX55;
24484 volatile ALT_SYSMGR_PINMUX_GPLMUX56_t GPLMUX56;
24485 volatile ALT_SYSMGR_PINMUX_GPLMUX57_t GPLMUX57;
24486 volatile ALT_SYSMGR_PINMUX_GPLMUX58_t GPLMUX58;
24487 volatile ALT_SYSMGR_PINMUX_GPLMUX59_t GPLMUX59;
24488 volatile ALT_SYSMGR_PINMUX_GPLMUX60_t GPLMUX60;
24489 volatile ALT_SYSMGR_PINMUX_GPLMUX61_t GPLMUX61;
24490 volatile ALT_SYSMGR_PINMUX_GPLMUX62_t GPLMUX62;
24491 volatile ALT_SYSMGR_PINMUX_GPLMUX63_t GPLMUX63;
24492 volatile ALT_SYSMGR_PINMUX_GPLMUX64_t GPLMUX64;
24493 volatile ALT_SYSMGR_PINMUX_GPLMUX65_t GPLMUX65;
24494 volatile ALT_SYSMGR_PINMUX_GPLMUX66_t GPLMUX66;
24495 volatile ALT_SYSMGR_PINMUX_GPLMUX67_t GPLMUX67;
24496 volatile ALT_SYSMGR_PINMUX_GPLMUX68_t GPLMUX68;
24497 volatile ALT_SYSMGR_PINMUX_GPLMUX69_t GPLMUX69;
24498 volatile ALT_SYSMGR_PINMUX_GPLMUX70_t GPLMUX70;
24499 volatile ALT_SYSMGR_PINMUX_NANDUSEFPGA_t NANDUSEFPGA;
24500 volatile uint32_t _pad_0x2f4_0x2f7;
24501 volatile ALT_SYSMGR_PINMUX_RGMII1USEFPGA_t RGMII1USEFPGA;
24502 volatile uint32_t _pad_0x2fc_0x303[2];
24503 volatile ALT_SYSMGR_PINMUX_I2C0USEFPGA_t I2C0USEFPGA;
24504 volatile uint32_t _pad_0x308_0x313[3];
24505 volatile ALT_SYSMGR_PINMUX_RGMII0USEFPGA_t RGMII0USEFPGA;
24506 volatile uint32_t _pad_0x318_0x323[3];
24507 volatile ALT_SYSMGR_PINMUX_I2C3USEFPGA_t I2C3USEFPGA;
24508 volatile ALT_SYSMGR_PINMUX_I2C2USEFPGA_t I2C2USEFPGA;
24509 volatile ALT_SYSMGR_PINMUX_I2C1USEFPGA_t I2C1USEFPGA;
24510 volatile ALT_SYSMGR_PINMUX_SPIM1USEFPGA_t SPIM1USEFPGA;
24511 volatile uint32_t _pad_0x334_0x337;
24512 volatile ALT_SYSMGR_PINMUX_SPIM0USEFPGA_t SPIM0USEFPGA;
24513 volatile uint32_t _pad_0x33c_0x400[49];
24521 volatile uint32_t EMACIO0;
24522 volatile uint32_t EMACIO1;
24523 volatile uint32_t EMACIO2;
24524 volatile uint32_t EMACIO3;
24525 volatile uint32_t EMACIO4;
24526 volatile uint32_t EMACIO5;
24527 volatile uint32_t EMACIO6;
24528 volatile uint32_t EMACIO7;
24529 volatile uint32_t EMACIO8;
24530 volatile uint32_t EMACIO9;
24531 volatile uint32_t EMACIO10;
24532 volatile uint32_t EMACIO11;
24533 volatile uint32_t EMACIO12;
24534 volatile uint32_t EMACIO13;
24535 volatile uint32_t EMACIO14;
24536 volatile uint32_t EMACIO15;
24537 volatile uint32_t EMACIO16;
24538 volatile uint32_t EMACIO17;
24539 volatile uint32_t EMACIO18;
24540 volatile uint32_t EMACIO19;
24541 volatile uint32_t FLASHIO0;
24542 volatile uint32_t FLASHIO1;
24543 volatile uint32_t FLASHIO2;
24544 volatile uint32_t FLASHIO3;
24545 volatile uint32_t FLASHIO4;
24546 volatile uint32_t FLASHIO5;
24547 volatile uint32_t FLASHIO6;
24548 volatile uint32_t FLASHIO7;
24549 volatile uint32_t FLASHIO8;
24550 volatile uint32_t FLASHIO9;
24551 volatile uint32_t FLASHIO10;
24552 volatile uint32_t FLASHIO11;
24553 volatile uint32_t GENERALIO0;
24554 volatile uint32_t GENERALIO1;
24555 volatile uint32_t GENERALIO2;
24556 volatile uint32_t GENERALIO3;
24557 volatile uint32_t GENERALIO4;
24558 volatile uint32_t GENERALIO5;
24559 volatile uint32_t GENERALIO6;
24560 volatile uint32_t GENERALIO7;
24561 volatile uint32_t GENERALIO8;
24562 volatile uint32_t GENERALIO9;
24563 volatile uint32_t GENERALIO10;
24564 volatile uint32_t GENERALIO11;
24565 volatile uint32_t GENERALIO12;
24566 volatile uint32_t GENERALIO13;
24567 volatile uint32_t GENERALIO14;
24568 volatile uint32_t GENERALIO15;
24569 volatile uint32_t GENERALIO16;
24570 volatile uint32_t GENERALIO17;
24571 volatile uint32_t GENERALIO18;
24572 volatile uint32_t GENERALIO19;
24573 volatile uint32_t GENERALIO20;
24574 volatile uint32_t GENERALIO21;
24575 volatile uint32_t GENERALIO22;
24576 volatile uint32_t GENERALIO23;
24577 volatile uint32_t GENERALIO24;
24578 volatile uint32_t GENERALIO25;
24579 volatile uint32_t GENERALIO26;
24580 volatile uint32_t GENERALIO27;
24581 volatile uint32_t GENERALIO28;
24582 volatile uint32_t GENERALIO29;
24583 volatile uint32_t GENERALIO30;
24584 volatile uint32_t GENERALIO31;
24585 volatile uint32_t MIXED1IO0;
24586 volatile uint32_t MIXED1IO1;
24587 volatile uint32_t MIXED1IO2;
24588 volatile uint32_t MIXED1IO3;
24589 volatile uint32_t MIXED1IO4;
24590 volatile uint32_t MIXED1IO5;
24591 volatile uint32_t MIXED1IO6;
24592 volatile uint32_t MIXED1IO7;
24593 volatile uint32_t MIXED1IO8;
24594 volatile uint32_t MIXED1IO9;
24595 volatile uint32_t MIXED1IO10;
24596 volatile uint32_t MIXED1IO11;
24597 volatile uint32_t MIXED1IO12;
24598 volatile uint32_t MIXED1IO13;
24599 volatile uint32_t MIXED1IO14;
24600 volatile uint32_t MIXED1IO15;
24601 volatile uint32_t MIXED1IO16;
24602 volatile uint32_t MIXED1IO17;
24603 volatile uint32_t MIXED1IO18;
24604 volatile uint32_t MIXED1IO19;
24605 volatile uint32_t MIXED1IO20;
24606 volatile uint32_t MIXED1IO21;
24607 volatile uint32_t MIXED2IO0;
24608 volatile uint32_t MIXED2IO1;
24609 volatile uint32_t MIXED2IO2;
24610 volatile uint32_t MIXED2IO3;
24611 volatile uint32_t MIXED2IO4;
24612 volatile uint32_t MIXED2IO5;
24613 volatile uint32_t MIXED2IO6;
24614 volatile uint32_t MIXED2IO7;
24615 volatile uint32_t GPLINMUX48;
24616 volatile uint32_t GPLINMUX49;
24617 volatile uint32_t GPLINMUX50;
24618 volatile uint32_t GPLINMUX51;
24619 volatile uint32_t GPLINMUX52;
24620 volatile uint32_t GPLINMUX53;
24621 volatile uint32_t GPLINMUX54;
24622 volatile uint32_t GPLINMUX55;
24623 volatile uint32_t GPLINMUX56;
24624 volatile uint32_t GPLINMUX57;
24625 volatile uint32_t GPLINMUX58;
24626 volatile uint32_t GPLINMUX59;
24627 volatile uint32_t GPLINMUX60;
24628 volatile uint32_t GPLINMUX61;
24629 volatile uint32_t GPLINMUX62;
24630 volatile uint32_t GPLINMUX63;
24631 volatile uint32_t GPLINMUX64;
24632 volatile uint32_t GPLINMUX65;
24633 volatile uint32_t GPLINMUX66;
24634 volatile uint32_t GPLINMUX67;
24635 volatile uint32_t GPLINMUX68;
24636 volatile uint32_t GPLINMUX69;
24637 volatile uint32_t GPLINMUX70;
24638 volatile uint32_t GPLMUX0;
24639 volatile uint32_t GPLMUX1;
24640 volatile uint32_t GPLMUX2;
24641 volatile uint32_t GPLMUX3;
24642 volatile uint32_t GPLMUX4;
24643 volatile uint32_t GPLMUX5;
24644 volatile uint32_t GPLMUX6;
24645 volatile uint32_t GPLMUX7;
24646 volatile uint32_t GPLMUX8;
24647 volatile uint32_t GPLMUX9;
24648 volatile uint32_t GPLMUX10;
24649 volatile uint32_t GPLMUX11;
24650 volatile uint32_t GPLMUX12;
24651 volatile uint32_t GPLMUX13;
24652 volatile uint32_t GPLMUX14;
24653 volatile uint32_t GPLMUX15;
24654 volatile uint32_t GPLMUX16;
24655 volatile uint32_t GPLMUX17;
24656 volatile uint32_t GPLMUX18;
24657 volatile uint32_t GPLMUX19;
24658 volatile uint32_t GPLMUX20;
24659 volatile uint32_t GPLMUX21;
24660 volatile uint32_t GPLMUX22;
24661 volatile uint32_t GPLMUX23;
24662 volatile uint32_t GPLMUX24;
24663 volatile uint32_t GPLMUX25;
24664 volatile uint32_t GPLMUX26;
24665 volatile uint32_t GPLMUX27;
24666 volatile uint32_t GPLMUX28;
24667 volatile uint32_t GPLMUX29;
24668 volatile uint32_t GPLMUX30;
24669 volatile uint32_t GPLMUX31;
24670 volatile uint32_t GPLMUX32;
24671 volatile uint32_t GPLMUX33;
24672 volatile uint32_t GPLMUX34;
24673 volatile uint32_t GPLMUX35;
24674 volatile uint32_t GPLMUX36;
24675 volatile uint32_t GPLMUX37;
24676 volatile uint32_t GPLMUX38;
24677 volatile uint32_t GPLMUX39;
24678 volatile uint32_t GPLMUX40;
24679 volatile uint32_t GPLMUX41;
24680 volatile uint32_t GPLMUX42;
24681 volatile uint32_t GPLMUX43;
24682 volatile uint32_t GPLMUX44;
24683 volatile uint32_t GPLMUX45;
24684 volatile uint32_t GPLMUX46;
24685 volatile uint32_t GPLMUX47;
24686 volatile uint32_t GPLMUX48;
24687 volatile uint32_t GPLMUX49;
24688 volatile uint32_t GPLMUX50;
24689 volatile uint32_t GPLMUX51;
24690 volatile uint32_t GPLMUX52;
24691 volatile uint32_t GPLMUX53;
24692 volatile uint32_t GPLMUX54;
24693 volatile uint32_t GPLMUX55;
24694 volatile uint32_t GPLMUX56;
24695 volatile uint32_t GPLMUX57;
24696 volatile uint32_t GPLMUX58;
24697 volatile uint32_t GPLMUX59;
24698 volatile uint32_t GPLMUX60;
24699 volatile uint32_t GPLMUX61;
24700 volatile uint32_t GPLMUX62;
24701 volatile uint32_t GPLMUX63;
24702 volatile uint32_t GPLMUX64;
24703 volatile uint32_t GPLMUX65;
24704 volatile uint32_t GPLMUX66;
24705 volatile uint32_t GPLMUX67;
24706 volatile uint32_t GPLMUX68;
24707 volatile uint32_t GPLMUX69;
24708 volatile uint32_t GPLMUX70;
24709 volatile uint32_t NANDUSEFPGA;
24710 volatile uint32_t _pad_0x2f4_0x2f7;
24711 volatile uint32_t RGMII1USEFPGA;
24712 volatile uint32_t _pad_0x2fc_0x303[2];
24713 volatile uint32_t I2C0USEFPGA;
24714 volatile uint32_t _pad_0x308_0x313[3];
24715 volatile uint32_t RGMII0USEFPGA;
24716 volatile uint32_t _pad_0x318_0x323[3];
24717 volatile uint32_t I2C3USEFPGA;
24718 volatile uint32_t I2C2USEFPGA;
24719 volatile uint32_t I2C1USEFPGA;
24720 volatile uint32_t SPIM1USEFPGA;
24721 volatile uint32_t _pad_0x334_0x337;
24722 volatile uint32_t SPIM0USEFPGA;
24723 volatile uint32_t _pad_0x33c_0x400[49];
24731 #ifndef __ASSEMBLY__ 24744 volatile ALT_SYSMGR_SILICONID1_t siliconid1;
24745 volatile ALT_SYSMGR_SILICONID2_t siliconid2;
24746 volatile uint32_t _pad_0x8_0xf[2];
24747 volatile ALT_SYSMGR_WDDBG_t wddbg;
24748 volatile ALT_SYSMGR_BOOT_t bootinfo;
24749 volatile ALT_SYSMGR_HPSINFO_t hpsinfo;
24750 volatile ALT_SYSMGR_PARITYINJ_t parityinj;
24751 volatile ALT_SYSMGR_FPGAINTF_t fpgaintfgrp;
24752 volatile ALT_SYSMGR_SCANMGR_t scanmgrgrp;
24753 volatile uint32_t _pad_0x34_0x3f[3];
24754 volatile ALT_SYSMGR_FRZCTL_t frzctrl;
24755 volatile ALT_SYSMGR_EMAC_t emacgrp;
24756 volatile ALT_SYSMGR_DMA_t dmagrp;
24757 volatile uint32_t _pad_0x78_0x7f[2];
24758 volatile ALT_SYSMGR_ISW_t iswgrp;
24759 volatile uint32_t _pad_0xa0_0xbf[8];
24760 volatile ALT_SYSMGR_ROMCODE_t romcodegrp;
24761 volatile ALT_SYSMGR_ROMHW_t romhwgrp;
24762 volatile uint32_t _pad_0x104_0x107;
24763 volatile ALT_SYSMGR_SDMMC_t sdmmcgrp;
24764 volatile ALT_SYSMGR_NAND_t nandgrp;
24765 volatile ALT_SYSMGR_USB_t usbgrp;
24766 volatile uint32_t _pad_0x11c_0x13f[9];
24767 volatile ALT_SYSMGR_ECC_t eccgrp;
24768 volatile uint32_t _pad_0x180_0x3ff[160];
24769 volatile ALT_SYSMGR_PINMUX_t pinmuxgrp;
24770 volatile uint32_t _pad_0x800_0x4000[3584];
24778 volatile uint32_t siliconid1;
24779 volatile uint32_t siliconid2;
24780 volatile uint32_t _pad_0x8_0xf[2];
24781 volatile uint32_t wddbg;
24782 volatile uint32_t bootinfo;
24783 volatile uint32_t hpsinfo;
24784 volatile uint32_t parityinj;
24785 volatile ALT_SYSMGR_FPGAINTF_raw_t fpgaintfgrp;
24786 volatile ALT_SYSMGR_SCANMGR_raw_t scanmgrgrp;
24787 volatile uint32_t _pad_0x34_0x3f[3];
24788 volatile ALT_SYSMGR_FRZCTL_raw_t frzctrl;
24789 volatile ALT_SYSMGR_EMAC_raw_t emacgrp;
24790 volatile ALT_SYSMGR_DMA_raw_t dmagrp;
24791 volatile uint32_t _pad_0x78_0x7f[2];
24792 volatile ALT_SYSMGR_ISW_raw_t iswgrp;
24793 volatile uint32_t _pad_0xa0_0xbf[8];
24794 volatile ALT_SYSMGR_ROMCODE_raw_t romcodegrp;
24795 volatile ALT_SYSMGR_ROMHW_raw_t romhwgrp;
24796 volatile uint32_t _pad_0x104_0x107;
24797 volatile ALT_SYSMGR_SDMMC_raw_t sdmmcgrp;
24798 volatile ALT_SYSMGR_NAND_raw_t nandgrp;
24799 volatile ALT_SYSMGR_USB_raw_t usbgrp;
24800 volatile uint32_t _pad_0x11c_0x13f[9];
24801 volatile ALT_SYSMGR_ECC_raw_t eccgrp;
24802 volatile uint32_t _pad_0x180_0x3ff[160];
24803 volatile ALT_SYSMGR_PINMUX_raw_t pinmuxgrp;
24804 volatile uint32_t _pad_0x800_0x4000[3584];
Definition: alt_sysmgr.h:22405
Definition: alt_sysmgr.h:15607
Definition: alt_sysmgr.h:2851
Definition: alt_sysmgr.h:14182
Definition: alt_sysmgr.h:19777
Definition: alt_sysmgr.h:21018
Definition: alt_sysmgr.h:16507
Definition: alt_sysmgr.h:22770
Definition: alt_sysmgr.h:18247
Definition: alt_sysmgr.h:15832
Definition: alt_sysmgr.h:13057
Definition: alt_sysmgr.h:21091
Definition: alt_sysmgr.h:5459
Definition: alt_sysmgr.h:22843
Definition: alt_sysmgr.h:10057
Definition: alt_sysmgr.h:4890
Definition: alt_sysmgr.h:15457
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Definition: alt_sysmgr.h:20872
Definition: alt_sysmgr.h:4391
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Definition: alt_sysmgr.h:6954
Definition: alt_sysmgr.h:12157
Definition: alt_sysmgr.h:22624
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Definition: alt_sysmgr.h:20945
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Definition: alt_sysmgr.h:6081
Definition: alt_sysmgr.h:15907
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Definition: alt_sysmgr.h:17959
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Definition: alt_sysmgr.h:21383
Definition: alt_sysmgr.h:18319
Definition: alt_sysmgr.h:15757
Definition: alt_sysmgr.h:14332
Definition: alt_sysmgr.h:10582
Definition: alt_sysmgr.h:6642
Definition: alt_sysmgr.h:19339
Definition: alt_sysmgr.h:21164
Definition: alt_sysmgr.h:9393
Definition: alt_sysmgr.h:18974
Definition: alt_sysmgr.h:18103
Definition: alt_sysmgr.h:15982
Definition: alt_sysmgr.h:14482
Definition: alt_sysmgr.h:21237
Definition: alt_sysmgr.h:5653
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Definition: alt_sysmgr.h:5175
Definition: alt_sysmgr.h:10507
Definition: alt_sysmgr.h:4491
Definition: alt_sysmgr.h:22186
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