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#define | ALT_L3_REMAP_MPUZERO_E_BOOTROM 0x0 |
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#define | ALT_L3_REMAP_MPUZERO_E_OCRAM 0x1 |
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#define | ALT_L3_REMAP_MPUZERO_LSB 0 |
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#define | ALT_L3_REMAP_MPUZERO_MSB 0 |
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#define | ALT_L3_REMAP_MPUZERO_WIDTH 1 |
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#define | ALT_L3_REMAP_MPUZERO_SET_MSK 0x00000001 |
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#define | ALT_L3_REMAP_MPUZERO_CLR_MSK 0xfffffffe |
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#define | ALT_L3_REMAP_MPUZERO_RESET 0x0 |
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#define | ALT_L3_REMAP_MPUZERO_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_REMAP_MPUZERO_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_REMAP_NONMPUZERO_E_SDRAM 0x0 |
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#define | ALT_L3_REMAP_NONMPUZERO_E_OCRAM 0x1 |
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#define | ALT_L3_REMAP_NONMPUZERO_LSB 1 |
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#define | ALT_L3_REMAP_NONMPUZERO_MSB 1 |
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#define | ALT_L3_REMAP_NONMPUZERO_WIDTH 1 |
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#define | ALT_L3_REMAP_NONMPUZERO_SET_MSK 0x00000002 |
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#define | ALT_L3_REMAP_NONMPUZERO_CLR_MSK 0xfffffffd |
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#define | ALT_L3_REMAP_NONMPUZERO_RESET 0x0 |
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#define | ALT_L3_REMAP_NONMPUZERO_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_REMAP_NONMPUZERO_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_REMAP_H2F_E_INVISIBLE 0x0 |
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#define | ALT_L3_REMAP_H2F_E_VISIBLE 0x1 |
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#define | ALT_L3_REMAP_H2F_LSB 3 |
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#define | ALT_L3_REMAP_H2F_MSB 3 |
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#define | ALT_L3_REMAP_H2F_WIDTH 1 |
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#define | ALT_L3_REMAP_H2F_SET_MSK 0x00000008 |
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#define | ALT_L3_REMAP_H2F_CLR_MSK 0xfffffff7 |
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#define | ALT_L3_REMAP_H2F_RESET 0x0 |
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#define | ALT_L3_REMAP_H2F_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_L3_REMAP_H2F_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_L3_REMAP_LWH2F_E_INVISIBLE 0x0 |
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#define | ALT_L3_REMAP_LWH2F_E_VISIBLE 0x1 |
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#define | ALT_L3_REMAP_LWH2F_LSB 4 |
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#define | ALT_L3_REMAP_LWH2F_MSB 4 |
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#define | ALT_L3_REMAP_LWH2F_WIDTH 1 |
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#define | ALT_L3_REMAP_LWH2F_SET_MSK 0x00000010 |
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#define | ALT_L3_REMAP_LWH2F_CLR_MSK 0xffffffef |
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#define | ALT_L3_REMAP_LWH2F_RESET 0x0 |
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#define | ALT_L3_REMAP_LWH2F_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_L3_REMAP_LWH2F_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_L3_REMAP_OFST 0x0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_LSB 0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_MSB 0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_WIDTH 1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_RESET 0x0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_L4MAIN_SPIS0_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_LSB 1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_MSB 1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_WIDTH 1 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_SET_MSK 0x00000002 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_CLR_MSK 0xfffffffd |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_RESET 0x0 |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_SEC_L4MAIN_SPIS1_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_LSB 2 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_MSB 2 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_WIDTH 1 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_SET_MSK 0x00000004 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_CLR_MSK 0xfffffffb |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_RESET 0x0 |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_L3_SEC_L4MAIN_DMASECURE_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_LSB 3 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_MSB 3 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_WIDTH 1 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_SET_MSK 0x00000008 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_CLR_MSK 0xfffffff7 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_RESET 0x0 |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_L3_SEC_L4MAIN_DMANONSECURE_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_L3_SEC_L4MAIN_OFST 0x0 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_LSB 0 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_MSB 0 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_L4SP_SDRREGS_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_SDRREGS_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_L4SP_SDRREGS_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_L4SP_SPTMR0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_LSB 1 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_MSB 1 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_SET_MSK 0x00000002 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_CLR_MSK 0xfffffffd |
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#define | ALT_L3_SEC_L4SP_SPTMR0_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_SPTMR0_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_SEC_L4SP_SPTMR0_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_SEC_L4SP_I2C0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_I2C0_LSB 2 |
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#define | ALT_L3_SEC_L4SP_I2C0_MSB 2 |
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#define | ALT_L3_SEC_L4SP_I2C0_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_I2C0_SET_MSK 0x00000004 |
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#define | ALT_L3_SEC_L4SP_I2C0_CLR_MSK 0xfffffffb |
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#define | ALT_L3_SEC_L4SP_I2C0_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C0_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_L3_SEC_L4SP_I2C0_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_L3_SEC_L4SP_I2C1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_I2C1_LSB 3 |
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#define | ALT_L3_SEC_L4SP_I2C1_MSB 3 |
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#define | ALT_L3_SEC_L4SP_I2C1_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_I2C1_SET_MSK 0x00000008 |
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#define | ALT_L3_SEC_L4SP_I2C1_CLR_MSK 0xfffffff7 |
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#define | ALT_L3_SEC_L4SP_I2C1_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C1_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_L3_SEC_L4SP_I2C1_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_L3_SEC_L4SP_I2C2_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C2_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_I2C2_LSB 4 |
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#define | ALT_L3_SEC_L4SP_I2C2_MSB 4 |
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#define | ALT_L3_SEC_L4SP_I2C2_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_I2C2_SET_MSK 0x00000010 |
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#define | ALT_L3_SEC_L4SP_I2C2_CLR_MSK 0xffffffef |
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#define | ALT_L3_SEC_L4SP_I2C2_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C2_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_L3_SEC_L4SP_I2C2_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_L3_SEC_L4SP_I2C3_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C3_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_I2C3_LSB 5 |
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#define | ALT_L3_SEC_L4SP_I2C3_MSB 5 |
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#define | ALT_L3_SEC_L4SP_I2C3_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_I2C3_SET_MSK 0x00000020 |
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#define | ALT_L3_SEC_L4SP_I2C3_CLR_MSK 0xffffffdf |
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#define | ALT_L3_SEC_L4SP_I2C3_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_I2C3_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_L3_SEC_L4SP_I2C3_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_L3_SEC_L4SP_UART0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_UART0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_UART0_LSB 6 |
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#define | ALT_L3_SEC_L4SP_UART0_MSB 6 |
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#define | ALT_L3_SEC_L4SP_UART0_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_UART0_SET_MSK 0x00000040 |
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#define | ALT_L3_SEC_L4SP_UART0_CLR_MSK 0xffffffbf |
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#define | ALT_L3_SEC_L4SP_UART0_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_UART0_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_L3_SEC_L4SP_UART0_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_L3_SEC_L4SP_UART1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_UART1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_UART1_LSB 7 |
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#define | ALT_L3_SEC_L4SP_UART1_MSB 7 |
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#define | ALT_L3_SEC_L4SP_UART1_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_UART1_SET_MSK 0x00000080 |
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#define | ALT_L3_SEC_L4SP_UART1_CLR_MSK 0xffffff7f |
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#define | ALT_L3_SEC_L4SP_UART1_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_UART1_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_L3_SEC_L4SP_UART1_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_L3_SEC_L4SP_CAN0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_CAN0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_CAN0_LSB 8 |
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#define | ALT_L3_SEC_L4SP_CAN0_MSB 8 |
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#define | ALT_L3_SEC_L4SP_CAN0_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_CAN0_SET_MSK 0x00000100 |
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#define | ALT_L3_SEC_L4SP_CAN0_CLR_MSK 0xfffffeff |
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#define | ALT_L3_SEC_L4SP_CAN0_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_CAN0_GET(value) (((value) & 0x00000100) >> 8) |
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#define | ALT_L3_SEC_L4SP_CAN0_SET(value) (((value) << 8) & 0x00000100) |
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#define | ALT_L3_SEC_L4SP_CAN1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_CAN1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_CAN1_LSB 9 |
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#define | ALT_L3_SEC_L4SP_CAN1_MSB 9 |
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#define | ALT_L3_SEC_L4SP_CAN1_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_CAN1_SET_MSK 0x00000200 |
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#define | ALT_L3_SEC_L4SP_CAN1_CLR_MSK 0xfffffdff |
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#define | ALT_L3_SEC_L4SP_CAN1_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_CAN1_GET(value) (((value) & 0x00000200) >> 9) |
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#define | ALT_L3_SEC_L4SP_CAN1_SET(value) (((value) << 9) & 0x00000200) |
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#define | ALT_L3_SEC_L4SP_SPTMR1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_LSB 10 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_MSB 10 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_WIDTH 1 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_SET_MSK 0x00000400 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_CLR_MSK 0xfffffbff |
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#define | ALT_L3_SEC_L4SP_SPTMR1_RESET 0x0 |
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#define | ALT_L3_SEC_L4SP_SPTMR1_GET(value) (((value) & 0x00000400) >> 10) |
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#define | ALT_L3_SEC_L4SP_SPTMR1_SET(value) (((value) << 10) & 0x00000400) |
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#define | ALT_L3_SEC_L4SP_OFST 0x4 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_LSB 0 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_MSB 0 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_L4MP_FPGAMGR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_L4MP_DAP_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_DAP_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_DAP_LSB 1 |
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#define | ALT_L3_SEC_L4MP_DAP_MSB 1 |
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#define | ALT_L3_SEC_L4MP_DAP_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_DAP_SET_MSK 0x00000002 |
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#define | ALT_L3_SEC_L4MP_DAP_CLR_MSK 0xfffffffd |
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#define | ALT_L3_SEC_L4MP_DAP_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_DAP_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_SEC_L4MP_DAP_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_SEC_L4MP_QSPI_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_QSPI_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_QSPI_LSB 2 |
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#define | ALT_L3_SEC_L4MP_QSPI_MSB 2 |
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#define | ALT_L3_SEC_L4MP_QSPI_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_QSPI_SET_MSK 0x00000004 |
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#define | ALT_L3_SEC_L4MP_QSPI_CLR_MSK 0xfffffffb |
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#define | ALT_L3_SEC_L4MP_QSPI_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_QSPI_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_L3_SEC_L4MP_QSPI_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_L3_SEC_L4MP_SDMMC_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_SDMMC_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_SDMMC_LSB 3 |
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#define | ALT_L3_SEC_L4MP_SDMMC_MSB 3 |
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#define | ALT_L3_SEC_L4MP_SDMMC_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_SDMMC_SET_MSK 0x00000008 |
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#define | ALT_L3_SEC_L4MP_SDMMC_CLR_MSK 0xfffffff7 |
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#define | ALT_L3_SEC_L4MP_SDMMC_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_SDMMC_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_L3_SEC_L4MP_SDMMC_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_L3_SEC_L4MP_EMAC0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_EMAC0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_EMAC0_LSB 4 |
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#define | ALT_L3_SEC_L4MP_EMAC0_MSB 4 |
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#define | ALT_L3_SEC_L4MP_EMAC0_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_EMAC0_SET_MSK 0x00000010 |
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#define | ALT_L3_SEC_L4MP_EMAC0_CLR_MSK 0xffffffef |
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#define | ALT_L3_SEC_L4MP_EMAC0_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_EMAC0_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_L3_SEC_L4MP_EMAC0_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_L3_SEC_L4MP_EMAC1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_EMAC1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_EMAC1_LSB 5 |
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#define | ALT_L3_SEC_L4MP_EMAC1_MSB 5 |
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#define | ALT_L3_SEC_L4MP_EMAC1_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_EMAC1_SET_MSK 0x00000020 |
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#define | ALT_L3_SEC_L4MP_EMAC1_CLR_MSK 0xffffffdf |
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#define | ALT_L3_SEC_L4MP_EMAC1_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_EMAC1_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_L3_SEC_L4MP_EMAC1_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_LSB 6 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_MSB 6 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_SET_MSK 0x00000040 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_CLR_MSK 0xffffffbf |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_L3_SEC_L4MP_ACPIDMAP_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_L3_SEC_L4MP_GPIO0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_GPIO0_LSB 7 |
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#define | ALT_L3_SEC_L4MP_GPIO0_MSB 7 |
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#define | ALT_L3_SEC_L4MP_GPIO0_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_GPIO0_SET_MSK 0x00000080 |
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#define | ALT_L3_SEC_L4MP_GPIO0_CLR_MSK 0xffffff7f |
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#define | ALT_L3_SEC_L4MP_GPIO0_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO0_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_L3_SEC_L4MP_GPIO0_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_L3_SEC_L4MP_GPIO1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_GPIO1_LSB 8 |
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#define | ALT_L3_SEC_L4MP_GPIO1_MSB 8 |
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#define | ALT_L3_SEC_L4MP_GPIO1_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_GPIO1_SET_MSK 0x00000100 |
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#define | ALT_L3_SEC_L4MP_GPIO1_CLR_MSK 0xfffffeff |
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#define | ALT_L3_SEC_L4MP_GPIO1_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO1_GET(value) (((value) & 0x00000100) >> 8) |
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#define | ALT_L3_SEC_L4MP_GPIO1_SET(value) (((value) << 8) & 0x00000100) |
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#define | ALT_L3_SEC_L4MP_GPIO2_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO2_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4MP_GPIO2_LSB 9 |
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#define | ALT_L3_SEC_L4MP_GPIO2_MSB 9 |
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#define | ALT_L3_SEC_L4MP_GPIO2_WIDTH 1 |
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#define | ALT_L3_SEC_L4MP_GPIO2_SET_MSK 0x00000200 |
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#define | ALT_L3_SEC_L4MP_GPIO2_CLR_MSK 0xfffffdff |
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#define | ALT_L3_SEC_L4MP_GPIO2_RESET 0x0 |
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#define | ALT_L3_SEC_L4MP_GPIO2_GET(value) (((value) & 0x00000200) >> 9) |
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#define | ALT_L3_SEC_L4MP_GPIO2_SET(value) (((value) << 9) & 0x00000200) |
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#define | ALT_L3_SEC_L4MP_OFST 0x8 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_LSB 0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_MSB 0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_L4OSC1_L4WD0_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_LSB 1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_MSB 1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_SET_MSK 0x00000002 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_CLR_MSK 0xfffffffd |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_SEC_L4OSC1_L4WD1_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_LSB 2 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_MSB 2 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_SET_MSK 0x00000004 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_CLR_MSK 0xfffffffb |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_L3_SEC_L4OSC1_CLKMGR_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_LSB 3 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_MSB 3 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_SET_MSK 0x00000008 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_CLR_MSK 0xfffffff7 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_L3_SEC_L4OSC1_RSTMGR_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_LSB 4 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_MSB 4 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_SET_MSK 0x00000010 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_CLR_MSK 0xffffffef |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_L3_SEC_L4OSC1_SYSMGR_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_LSB 5 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_MSB 5 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_SET_MSK 0x00000020 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_CLR_MSK 0xffffffdf |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR0_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_LSB 6 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_MSB 6 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_WIDTH 1 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_SET_MSK 0x00000040 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_CLR_MSK 0xffffffbf |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_RESET 0x0 |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_L3_SEC_L4OSC1_OSC1TMR1_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_L3_SEC_L4OSC1_OFST 0xc |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_LSB 0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_MSB 0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_WIDTH 1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_RESET 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_L4SPIM_SPIM0_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_LSB 1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_MSB 1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_WIDTH 1 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_SET_MSK 0x00000002 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_CLR_MSK 0xfffffffd |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_RESET 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_SEC_L4SPIM_SPIM1_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_E_SECURE 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_LSB 2 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_MSB 2 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_WIDTH 1 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_SET_MSK 0x00000004 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_CLR_MSK 0xfffffffb |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_RESET 0x0 |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_L3_SEC_L4SPIM_SCANMGR_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_L3_SEC_L4SPIM_OFST 0x10 |
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#define | ALT_L3_SEC_STM_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_STM_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_STM_S_LSB 0 |
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#define | ALT_L3_SEC_STM_S_MSB 0 |
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#define | ALT_L3_SEC_STM_S_WIDTH 1 |
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#define | ALT_L3_SEC_STM_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_STM_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_STM_S_RESET 0x0 |
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#define | ALT_L3_SEC_STM_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_STM_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_STM_OFST 0x14 |
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#define | ALT_L3_SEC_LWH2F_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_LWH2F_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_LWH2F_S_LSB 0 |
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#define | ALT_L3_SEC_LWH2F_S_MSB 0 |
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#define | ALT_L3_SEC_LWH2F_S_WIDTH 1 |
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#define | ALT_L3_SEC_LWH2F_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_LWH2F_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_LWH2F_S_RESET 0x0 |
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#define | ALT_L3_SEC_LWH2F_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_LWH2F_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_LWH2F_OFST 0x18 |
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#define | ALT_L3_SEC_USB1_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_USB1_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_USB1_S_LSB 0 |
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#define | ALT_L3_SEC_USB1_S_MSB 0 |
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#define | ALT_L3_SEC_USB1_S_WIDTH 1 |
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#define | ALT_L3_SEC_USB1_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_USB1_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_USB1_S_RESET 0x0 |
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#define | ALT_L3_SEC_USB1_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_USB1_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_USB1_OFST 0x20 |
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#define | ALT_L3_SEC_NANDDATA_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_NANDDATA_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_NANDDATA_S_LSB 0 |
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#define | ALT_L3_SEC_NANDDATA_S_MSB 0 |
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#define | ALT_L3_SEC_NANDDATA_S_WIDTH 1 |
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#define | ALT_L3_SEC_NANDDATA_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_NANDDATA_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_NANDDATA_S_RESET 0x0 |
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#define | ALT_L3_SEC_NANDDATA_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_NANDDATA_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_NANDDATA_OFST 0x24 |
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#define | ALT_L3_SEC_USB0_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_USB0_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_USB0_S_LSB 0 |
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#define | ALT_L3_SEC_USB0_S_MSB 0 |
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#define | ALT_L3_SEC_USB0_S_WIDTH 1 |
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#define | ALT_L3_SEC_USB0_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_USB0_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_USB0_S_RESET 0x0 |
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#define | ALT_L3_SEC_USB0_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_USB0_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_USB0_OFST 0x78 |
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#define | ALT_L3_SEC_NAND_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_NAND_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_NAND_S_LSB 0 |
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#define | ALT_L3_SEC_NAND_S_MSB 0 |
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#define | ALT_L3_SEC_NAND_S_WIDTH 1 |
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#define | ALT_L3_SEC_NAND_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_NAND_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_NAND_S_RESET 0x0 |
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#define | ALT_L3_SEC_NAND_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_NAND_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_NAND_OFST 0x7c |
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#define | ALT_L3_SEC_QSPIDATA_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_QSPIDATA_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_QSPIDATA_S_LSB 0 |
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#define | ALT_L3_SEC_QSPIDATA_S_MSB 0 |
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#define | ALT_L3_SEC_QSPIDATA_S_WIDTH 1 |
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#define | ALT_L3_SEC_QSPIDATA_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_QSPIDATA_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_QSPIDATA_S_RESET 0x0 |
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#define | ALT_L3_SEC_QSPIDATA_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_QSPIDATA_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_QSPIDATA_OFST 0x80 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_LSB 0 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_MSB 0 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_WIDTH 1 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_RESET 0x0 |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_FPGAMGRDATA_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_FPGAMGRDATA_OFST 0x84 |
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#define | ALT_L3_SEC_H2F_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_H2F_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_H2F_S_LSB 0 |
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#define | ALT_L3_SEC_H2F_S_MSB 0 |
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#define | ALT_L3_SEC_H2F_S_WIDTH 1 |
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#define | ALT_L3_SEC_H2F_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_H2F_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_H2F_S_RESET 0x0 |
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#define | ALT_L3_SEC_H2F_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_H2F_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_H2F_OFST 0x88 |
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#define | ALT_L3_SEC_ACP_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_ACP_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_ACP_S_LSB 0 |
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#define | ALT_L3_SEC_ACP_S_MSB 0 |
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#define | ALT_L3_SEC_ACP_S_WIDTH 1 |
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#define | ALT_L3_SEC_ACP_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_ACP_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_ACP_S_RESET 0x0 |
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#define | ALT_L3_SEC_ACP_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_ACP_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_ACP_OFST 0x8c |
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#define | ALT_L3_SEC_ROM_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_ROM_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_ROM_S_LSB 0 |
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#define | ALT_L3_SEC_ROM_S_MSB 0 |
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#define | ALT_L3_SEC_ROM_S_WIDTH 1 |
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#define | ALT_L3_SEC_ROM_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_ROM_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_ROM_S_RESET 0x0 |
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#define | ALT_L3_SEC_ROM_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_ROM_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_ROM_OFST 0x90 |
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#define | ALT_L3_SEC_OCRAM_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_OCRAM_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_OCRAM_S_LSB 0 |
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#define | ALT_L3_SEC_OCRAM_S_MSB 0 |
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#define | ALT_L3_SEC_OCRAM_S_WIDTH 1 |
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#define | ALT_L3_SEC_OCRAM_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_OCRAM_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_OCRAM_S_RESET 0x0 |
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#define | ALT_L3_SEC_OCRAM_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_OCRAM_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_OCRAM_OFST 0x94 |
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#define | ALT_L3_SEC_SDRDATA_S_E_SECURE 0x0 |
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#define | ALT_L3_SEC_SDRDATA_S_E_NONSECURE 0x1 |
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#define | ALT_L3_SEC_SDRDATA_S_LSB 0 |
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#define | ALT_L3_SEC_SDRDATA_S_MSB 0 |
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#define | ALT_L3_SEC_SDRDATA_S_WIDTH 1 |
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#define | ALT_L3_SEC_SDRDATA_S_SET_MSK 0x00000001 |
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#define | ALT_L3_SEC_SDRDATA_S_CLR_MSK 0xfffffffe |
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#define | ALT_L3_SEC_SDRDATA_S_RESET 0x0 |
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#define | ALT_L3_SEC_SDRDATA_S_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_SEC_SDRDATA_S_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_SEC_SDRDATA_OFST 0x98 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_LSB 0 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_MSB 7 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_WIDTH 8 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_RESET 0x4 |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_PERIPH_ID_4_PERIPH_ID_4_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_PERIPH_ID_4_OFST 0xfd0 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_LSB 0 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_MSB 7 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_WIDTH 8 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_RESET 0x1 |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_PERIPH_ID_0_PN7TO0_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_PERIPH_ID_0_OFST 0xfe0 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_LSB 0 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_MSB 7 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_WIDTH 8 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_RESET 0xb3 |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_PERIPH_ID_1_JEP3TO0_PN11TO8_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_PERIPH_ID_1_OFST 0xfe4 |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_LSB 0 |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_MSB 7 |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_WIDTH 8 |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_RESET 0x6b |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_PERIPH_ID_2_REV_JEPCODE_JEP6TO4_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_PERIPH_ID_2_OFST 0xfe8 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_LSB 0 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_MSB 3 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_WIDTH 4 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET_MSK 0x0000000f |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_CLR_MSK 0xfffffff0 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_RESET 0x0 |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_GET(value) (((value) & 0x0000000f) >> 0) |
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#define | ALT_L3_ID_PERIPH_ID_3_CUST_MOD_NUM_SET(value) (((value) << 0) & 0x0000000f) |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_LSB 4 |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_MSB 7 |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_WIDTH 4 |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_SET_MSK 0x000000f0 |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_CLR_MSK 0xffffff0f |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_RESET 0x0 |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_GET(value) (((value) & 0x000000f0) >> 4) |
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#define | ALT_L3_ID_PERIPH_ID_3_REV_AND_SET(value) (((value) << 4) & 0x000000f0) |
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#define | ALT_L3_ID_PERIPH_ID_3_OFST 0xfec |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_LSB 0 |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_MSB 7 |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_WIDTH 8 |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_RESET 0xd |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_COMP_ID_0_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_COMP_ID_0_OFST 0xff0 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_LSB 0 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_MSB 7 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_WIDTH 8 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_RESET 0xf0 |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_COMP_ID_1_GENIPCOMPCLS_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_COMP_ID_1_OFST 0xff4 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_LSB 0 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_MSB 7 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_WIDTH 8 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_RESET 0x5 |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_COMP_ID_2_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_COMP_ID_2_OFST 0xff8 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_LSB 0 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_MSB 7 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_WIDTH 8 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_SET_MSK 0x000000ff |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_CLR_MSK 0xffffff00 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_RESET 0xb1 |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_L3_ID_COMP_ID_3_PREAMBLE_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_L3_ID_COMP_ID_3_OFST 0xffc |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_E_MULT 0x0 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_E_SINGLE 0x1 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_LSB 0 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_MSB 0 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_WIDTH 1 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_SET_MSK 0x00000001 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_CLR_MSK 0xfffffffe |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_RESET 0x0 |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_FN_MOD_BM_ISS_RD_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_E_MULT 0x0 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_E_SINGLE 0x1 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_LSB 1 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_MSB 1 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_WIDTH 1 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_SET_MSK 0x00000002 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_CLR_MSK 0xfffffffd |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_RESET 0x0 |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_FN_MOD_BM_ISS_WR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_FN_MOD_BM_ISS_OFST 0x8 |
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#define | ALT_L3_FN_MOD_BM_ISS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_BM_ISS_OFST)) |
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#define | ALT_L3_FN_MOD_RD_E_MULT 0x0 |
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#define | ALT_L3_FN_MOD_RD_E_SINGLE 0x1 |
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#define | ALT_L3_FN_MOD_RD_LSB 0 |
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#define | ALT_L3_FN_MOD_RD_MSB 0 |
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#define | ALT_L3_FN_MOD_RD_WIDTH 1 |
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#define | ALT_L3_FN_MOD_RD_SET_MSK 0x00000001 |
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#define | ALT_L3_FN_MOD_RD_CLR_MSK 0xfffffffe |
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#define | ALT_L3_FN_MOD_RD_RESET 0x0 |
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#define | ALT_L3_FN_MOD_RD_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_FN_MOD_RD_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_FN_MOD_WR_E_MULT 0x0 |
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#define | ALT_L3_FN_MOD_WR_E_SINGLE 0x1 |
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#define | ALT_L3_FN_MOD_WR_LSB 1 |
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#define | ALT_L3_FN_MOD_WR_MSB 1 |
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#define | ALT_L3_FN_MOD_WR_WIDTH 1 |
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#define | ALT_L3_FN_MOD_WR_SET_MSK 0x00000002 |
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#define | ALT_L3_FN_MOD_WR_CLR_MSK 0xfffffffd |
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#define | ALT_L3_FN_MOD_WR_RESET 0x0 |
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#define | ALT_L3_FN_MOD_WR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_FN_MOD_WR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_FN_MOD_OFST 0x108 |
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#define | ALT_L3_FN_MOD_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_OFST)) |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_E_DIS 0x0 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_E_EN 0x1 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_LSB 0 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_MSB 0 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_WIDTH 1 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_SET_MSK 0x00000001 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_CLR_MSK 0xfffffffe |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_RESET 0x0 |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_AHB_CNTL_DECERR_EN_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_E_DIS 0x0 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_E_EN 0x1 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_LSB 1 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_MSB 1 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_WIDTH 1 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_SET_MSK 0x00000002 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_CLR_MSK 0xfffffffd |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_RESET 0x0 |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_AHB_CNTL_FORCE_INCR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_AHB_CNTL_OFST 0x44 |
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#define | ALT_L3_AHB_CNTL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_AHB_CNTL_OFST)) |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_LSB 0 |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_MSB 3 |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_WIDTH 4 |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_SET_MSK 0x0000000f |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_CLR_MSK 0xfffffff0 |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_RESET 0x4 |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_GET(value) (((value) & 0x0000000f) >> 0) |
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#define | ALT_L3_WR_TIDEMARK_LEVEL_SET(value) (((value) << 0) & 0x0000000f) |
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#define | ALT_L3_WR_TIDEMARK_OFST 0x40 |
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#define | ALT_L3_WR_TIDEMARK_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_TIDEMARK_OFST)) |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_E_ALTER 0x0 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_E_NOALTER 0x1 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_LSB 0 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_MSB 0 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_WIDTH 1 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_SET_MSK 0x00000001 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_CLR_MSK 0xfffffffe |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_RESET 0x0 |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_FN_MOD2_BYPASS_MERGE_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_FN_MOD2_OFST 0x24 |
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#define | ALT_L3_FN_MOD2_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD2_OFST)) |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_DEFAULT 0x0 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_E_SINGLES 0x1 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_LSB 0 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_MSB 0 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_WIDTH 1 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET_MSK 0x00000001 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_CLR_MSK 0xfffffffe |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_RESET 0x0 |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_L3_FN_MOD_AHB_RD_INCR_OVERRIDE_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_DEFAULT 0x0 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_E_SINGLES 0x1 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_LSB 1 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_MSB 1 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_WIDTH 1 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET_MSK 0x00000002 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_CLR_MSK 0xfffffffd |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_RESET 0x0 |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_L3_FN_MOD_AHB_WR_INCR_OVERRIDE_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_L3_FN_MOD_AHB_OFST 0x28 |
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#define | ALT_L3_FN_MOD_AHB_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_FN_MOD_AHB_OFST)) |
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#define | ALT_L3_RD_QOS_PRI_LSB 0 |
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#define | ALT_L3_RD_QOS_PRI_MSB 3 |
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#define | ALT_L3_RD_QOS_PRI_WIDTH 4 |
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#define | ALT_L3_RD_QOS_PRI_SET_MSK 0x0000000f |
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#define | ALT_L3_RD_QOS_PRI_CLR_MSK 0xfffffff0 |
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#define | ALT_L3_RD_QOS_PRI_RESET 0x0 |
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#define | ALT_L3_RD_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0) |
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#define | ALT_L3_RD_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f) |
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#define | ALT_L3_RD_QOS_OFST 0x100 |
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#define | ALT_L3_RD_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_RD_QOS_OFST)) |
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#define | ALT_L3_WR_QOS_PRI_LSB 0 |
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#define | ALT_L3_WR_QOS_PRI_MSB 3 |
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#define | ALT_L3_WR_QOS_PRI_WIDTH 4 |
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#define | ALT_L3_WR_QOS_PRI_SET_MSK 0x0000000f |
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#define | ALT_L3_WR_QOS_PRI_CLR_MSK 0xfffffff0 |
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#define | ALT_L3_WR_QOS_PRI_RESET 0x0 |
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#define | ALT_L3_WR_QOS_PRI_GET(value) (((value) & 0x0000000f) >> 0) |
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#define | ALT_L3_WR_QOS_PRI_SET(value) (((value) << 0) & 0x0000000f) |
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#define | ALT_L3_WR_QOS_OFST 0x104 |
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#define | ALT_L3_WR_QOS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_L3_WR_QOS_OFST)) |
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