|
|
#define | ALT_CLKMGR_CTL_SAFEMOD_LSB 0 |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_MSB 0 |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_CTL_SAFEMOD_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_LSB 2 |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_MSB 2 |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_CTL_ENSFMDWR_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_CTL_OFST 0x0 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_LSB 0 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_MSB 0 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_BYPASS_MAINPLL_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_LSB 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_MSB 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLL_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_EOSC1 0x0 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_E_SELECT_INPUT_MUX 0x1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_LSB 2 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_MSB 2 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_BYPASS_SDRPLLSRC_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_LSB 3 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_MSB 3 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLL_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_EOSC1 0x0 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_E_SELECT_INPUT_MUX 0x1 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_LSB 4 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_MSB 4 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_SET_MSK 0x00000010 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_CLR_MSK 0xffffffef |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_GET(value) (((value) & 0x00000010) >> 4) |
| |
|
#define | ALT_CLKMGR_BYPASS_PERPLLSRC_SET(value) (((value) << 4) & 0x00000010) |
| |
|
#define | ALT_CLKMGR_BYPASS_OFST 0x4 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_LSB 0 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_MSB 0 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_LSB 1 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_MSB 1 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_LSB 2 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_MSB 2 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLACHIEVED_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_LSB 3 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_MSB 3 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOST_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_LSB 4 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_MSB 4 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_SET_MSK 0x00000010 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_CLR_MSK 0xffffffef |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_GET(value) (((value) & 0x00000010) >> 4) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOST_SET(value) (((value) << 4) & 0x00000010) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_LSB 5 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_MSB 5 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_SET_MSK 0x00000020 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_CLR_MSK 0xffffffdf |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_GET(value) (((value) & 0x00000020) >> 5) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOST_SET(value) (((value) << 5) & 0x00000020) |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_LSB 6 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_MSB 6 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_SET_MSK 0x00000040 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_CLR_MSK 0xffffffbf |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_GET(value) (((value) & 0x00000040) >> 6) |
| |
|
#define | ALT_CLKMGR_INTER_MAINPLLLOCKED_SET(value) (((value) << 6) & 0x00000040) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_LSB 7 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_MSB 7 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_SET_MSK 0x00000080 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_CLR_MSK 0xffffff7f |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_GET(value) (((value) & 0x00000080) >> 7) |
| |
|
#define | ALT_CLKMGR_INTER_PERPLLLOCKED_SET(value) (((value) << 7) & 0x00000080) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_LSB 8 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_MSB 8 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_SET_MSK 0x00000100 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_CLR_MSK 0xfffffeff |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_GET(value) (((value) & 0x00000100) >> 8) |
| |
|
#define | ALT_CLKMGR_INTER_SDRPLLLOCKED_SET(value) (((value) << 8) & 0x00000100) |
| |
|
#define | ALT_CLKMGR_INTER_OFST 0x8 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_LSB 0 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_MSB 0 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLACHIEVED_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_LSB 1 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_MSB 1 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLACHIEVED_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_LSB 2 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_MSB 2 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLACHIEVED_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_LSB 3 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_MSB 3 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_INTREN_MAINPLLLOST_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_LSB 4 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_MSB 4 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_SET_MSK 0x00000010 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_CLR_MSK 0xffffffef |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_GET(value) (((value) & 0x00000010) >> 4) |
| |
|
#define | ALT_CLKMGR_INTREN_PERPLLLOST_SET(value) (((value) << 4) & 0x00000010) |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_LSB 5 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_MSB 5 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_SET_MSK 0x00000020 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_CLR_MSK 0xffffffdf |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_GET(value) (((value) & 0x00000020) >> 5) |
| |
|
#define | ALT_CLKMGR_INTREN_SDRPLLLOST_SET(value) (((value) << 5) & 0x00000020) |
| |
|
#define | ALT_CLKMGR_INTREN_OFST 0xc |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_LSB 0 |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_MSB 0 |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_DBCTL_STAYOSC1_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_LSB 1 |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_MSB 1 |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_DBCTL_ENSFMDWR_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_DBCTL_OFST 0x10 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_E_IDLE 0x0 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_E_BUSY 0x1 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_LSB 0 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_MSB 0 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_STAT_BUSY_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_STAT_OFST 0x14 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_MSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_BGPWRDN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_LSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_MSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_EN_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_LSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_MSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_PWRDN_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_LSB 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_MSB 15 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_WIDTH 13 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_SET_MSK 0x0000fff8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_CLR_MSK 0xffff0007 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_GET(value) (((value) & 0x0000fff8) >> 3) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_NUMER_SET(value) (((value) << 3) & 0x0000fff8) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_LSB 16 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_MSB 21 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_SET_MSK 0x003f0000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_CLR_MSK 0xffc0ffff |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_GET(value) (((value) & 0x003f0000) >> 16) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_DENOM_SET(value) (((value) << 16) & 0x003f0000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_LSB 24 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_MSB 24 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_SET_MSK 0x01000000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_CLR_MSK 0xfeffffff |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_GET(value) (((value) & 0x01000000) >> 24) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRSTALL_SET(value) (((value) << 24) & 0x01000000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_LSB 25 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_MSB 30 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_SET_MSK 0x7e000000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_CLR_MSK 0x81ffffff |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_GET(value) (((value) & 0x7e000000) >> 25) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OUTRST_SET(value) (((value) << 25) & 0x7e000000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_LSB 31 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_MSB 31 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_SET_MSK 0x80000000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_CLR_MSK 0x7fffffff |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_GET(value) (((value) & 0x80000000) >> 31) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_REGEXTSEL_SET(value) (((value) << 31) & 0x80000000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_VCO_OFST 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_MSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJEN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_LSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_MSB 12 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_SET_MSK 0x00001ffe |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_CLR_MSK 0xffffe001 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_GET(value) (((value) & 0x00001ffe) >> 1) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_BWADJ_SET(value) (((value) << 1) & 0x00001ffe) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_LSB 13 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_MSB 13 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_SET_MSK 0x00002000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_CLR_MSK 0xffffdfff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_GET(value) (((value) & 0x00002000) >> 13) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_FASTEN_SET(value) (((value) << 13) & 0x00002000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_LSB 14 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_MSB 14 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_SET_MSK 0x00004000 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_CLR_MSK 0xffffbfff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_GET(value) (((value) & 0x00004000) >> 14) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_SATEN_SET(value) (((value) << 14) & 0x00004000) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MISC_OFST 0x4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MPUCLK_OFST 0x8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINCLK_OFST 0xc |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGATCLK_OFST 0x10 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_RESET 0x3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINQSPICLK_OFST 0x14 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_RESET 0x3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINNANDSDMMCCLK_OFST 0x18 |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_RESET 0xf |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_MAINPLL_CFGS2FUSER0CLK_OFST 0x1c |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_MSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MAINCLK_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_LSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_MSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L3MPCLK_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_LSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_MSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4MPCLK_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_LSB 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_MSB 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_L4SPCLK_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_LSB 4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_MSB 4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_SET_MSK 0x00000010 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_CLR_MSK 0xffffffef |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_GET(value) (((value) & 0x00000010) >> 4) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGATCLK_SET(value) (((value) << 4) & 0x00000010) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_LSB 5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_MSB 5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_SET_MSK 0x00000020 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_CLR_MSK 0xffffffdf |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_GET(value) (((value) & 0x00000020) >> 5) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGCLK_SET(value) (((value) << 5) & 0x00000020) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_LSB 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_MSB 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_SET_MSK 0x00000040 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_CLR_MSK 0xffffffbf |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_GET(value) (((value) & 0x00000040) >> 6) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTRACECLK_SET(value) (((value) << 6) & 0x00000040) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_LSB 7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_MSB 7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_SET_MSK 0x00000080 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_CLR_MSK 0xffffff7f |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_GET(value) (((value) & 0x00000080) >> 7) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_DBGTMRCLK_SET(value) (((value) << 7) & 0x00000080) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_LSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_MSB 8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_SET_MSK 0x00000100 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_CLR_MSK 0xfffffeff |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_GET(value) (((value) & 0x00000100) >> 8) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_CFGCLK_SET(value) (((value) << 8) & 0x00000100) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_LSB 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_MSB 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_SET_MSK 0x00000200 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_CLR_MSK 0xfffffdff |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_GET(value) (((value) & 0x00000200) >> 9) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_S2FUSER0CLK_SET(value) (((value) << 9) & 0x00000200) |
| |
|
#define | ALT_CLKMGR_MAINPLL_EN_OFST 0x20 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_MSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_SET_MSK 0x00000003 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_CLR_MSK 0xfffffffc |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_GET(value) (((value) & 0x00000003) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3MPCLK_SET(value) (((value) << 0) & 0x00000003) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_LSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_MSB 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_SET_MSK 0x0000000c |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_CLR_MSK 0xfffffff3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_GET(value) (((value) & 0x0000000c) >> 2) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L3SPCLK_SET(value) (((value) << 2) & 0x0000000c) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_LSB 4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_MSB 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_SET_MSK 0x00000070 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_CLR_MSK 0xffffff8f |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_GET(value) (((value) & 0x00000070) >> 4) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4MPCLK_SET(value) (((value) << 4) & 0x00000070) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_LSB 7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_MSB 9 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_SET_MSK 0x00000380 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_CLR_MSK 0xfffffc7f |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_GET(value) (((value) & 0x00000380) >> 7) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_L4SPCLK_SET(value) (((value) << 7) & 0x00000380) |
| |
|
#define | ALT_CLKMGR_MAINPLL_MAINDIV_OFST 0x24 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_MSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_SET_MSK 0x00000003 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_CLR_MSK 0xfffffffc |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_GET(value) (((value) & 0x00000003) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGATCLK_SET(value) (((value) << 0) & 0x00000003) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_LSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_MSB 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_SET_MSK 0x0000000c |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_CLR_MSK 0xfffffff3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_GET(value) (((value) & 0x0000000c) >> 2) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_DBGCLK_SET(value) (((value) << 2) & 0x0000000c) |
| |
|
#define | ALT_CLKMGR_MAINPLL_DBGDIV_OFST 0x28 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_MSB 2 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_SET_MSK 0x00000007 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_CLR_MSK 0xfffffff8 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_GET(value) (((value) & 0x00000007) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_TRACECLK_SET(value) (((value) << 0) & 0x00000007) |
| |
|
#define | ALT_CLKMGR_MAINPLL_TRACEDIV_OFST 0x2c |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_E_MAINPLL 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_E_PERIPHPLL 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_MSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4MP_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_E_MAINPLL 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_E_PERIPHPLL 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_LSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_MSB 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_L4SP_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_MAINPLL_L4SRC_OFST 0x30 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_E_IDLE 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_E_ACK_RXD 0x1 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_LSB 0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_MSB 5 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_SET_MSK 0x0000003f |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_CLR_MSK 0xffffffc0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_GET(value) (((value) & 0x0000003f) >> 0) |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OUTRSTACK_SET(value) (((value) << 0) & 0x0000003f) |
| |
|
#define | ALT_CLKMGR_MAINPLL_STAT_OFST 0x34 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_MSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_BGPWRDN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_LSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_MSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_EN_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_LSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_MSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PWRDN_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_LSB 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_MSB 15 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_WIDTH 13 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_SET_MSK 0x0000fff8 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_CLR_MSK 0xffff0007 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_GET(value) (((value) & 0x0000fff8) >> 3) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_NUMER_SET(value) (((value) << 3) & 0x0000fff8) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_LSB 16 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_MSB 21 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_SET_MSK 0x003f0000 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_CLR_MSK 0xffc0ffff |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_GET(value) (((value) & 0x003f0000) >> 16) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_DENOM_SET(value) (((value) << 16) & 0x003f0000) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_E_EOSC1 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_E_EOSC2 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_E_F2S_PERIPH_REF 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_LSB 22 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_MSB 23 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_SET_MSK 0x00c00000 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_CLR_MSK 0xff3fffff |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_GET(value) (((value) & 0x00c00000) >> 22) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_PSRC_SET(value) (((value) << 22) & 0x00c00000) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_LSB 24 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_MSB 24 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_SET_MSK 0x01000000 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_CLR_MSK 0xfeffffff |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_GET(value) (((value) & 0x01000000) >> 24) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRSTALL_SET(value) (((value) << 24) & 0x01000000) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_LSB 25 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_MSB 30 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_SET_MSK 0x7e000000 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_CLR_MSK 0x81ffffff |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_GET(value) (((value) & 0x7e000000) >> 25) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OUTRST_SET(value) (((value) << 25) & 0x7e000000) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_LSB 31 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_MSB 31 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_SET_MSK 0x80000000 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_CLR_MSK 0x7fffffff |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_GET(value) (((value) & 0x80000000) >> 31) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_REGEXTSEL_SET(value) (((value) << 31) & 0x80000000) |
| |
|
#define | ALT_CLKMGR_PERPLL_VCO_OFST 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_MSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJEN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_LSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_MSB 12 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_SET_MSK 0x00001ffe |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_CLR_MSK 0xffffe001 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_GET(value) (((value) & 0x00001ffe) >> 1) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_BWADJ_SET(value) (((value) << 1) & 0x00001ffe) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_LSB 13 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_MSB 13 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_SET_MSK 0x00002000 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_CLR_MSK 0xffffdfff |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_GET(value) (((value) & 0x00002000) >> 13) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_FASTEN_SET(value) (((value) << 13) & 0x00002000) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_LSB 14 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_MSB 14 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_SET_MSK 0x00004000 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_CLR_MSK 0xffffbfff |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_GET(value) (((value) & 0x00004000) >> 14) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_SATEN_SET(value) (((value) << 14) & 0x00004000) |
| |
|
#define | ALT_CLKMGR_PERPLL_MISC_OFST 0x4 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC0CLK_OFST 0x8 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_EMAC1CLK_OFST 0xc |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERQSPICLK_OFST 0x10 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERNANDSDMMCCLK_OFST 0x14 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_PERBASECLK_OFST 0x18 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_PERPLL_S2FUSER1CLK_OFST 0x1c |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_MSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC0CLK_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_LSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_MSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_EMAC1CLK_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_LSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_MSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_USBCLK_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_LSB 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_MSB 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SPIMCLK_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_LSB 4 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_MSB 4 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_SET_MSK 0x00000010 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_CLR_MSK 0xffffffef |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_GET(value) (((value) & 0x00000010) >> 4) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN0CLK_SET(value) (((value) << 4) & 0x00000010) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_LSB 5 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_MSB 5 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_SET_MSK 0x00000020 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_CLR_MSK 0xffffffdf |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_GET(value) (((value) & 0x00000020) >> 5) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_CAN1CLK_SET(value) (((value) << 5) & 0x00000020) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_LSB 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_MSB 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_SET_MSK 0x00000040 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_CLR_MSK 0xffffffbf |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_GET(value) (((value) & 0x00000040) >> 6) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_GPIOCLK_SET(value) (((value) << 6) & 0x00000040) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_LSB 7 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_MSB 7 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_SET_MSK 0x00000080 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_CLR_MSK 0xffffff7f |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_GET(value) (((value) & 0x00000080) >> 7) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_S2FUSER1CLK_SET(value) (((value) << 7) & 0x00000080) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_LSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_SET_MSK 0x00000100 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_CLR_MSK 0xfffffeff |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_GET(value) (((value) & 0x00000100) >> 8) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_SDMMCCLK_SET(value) (((value) << 8) & 0x00000100) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_LSB 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_MSB 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_SET_MSK 0x00000200 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_CLR_MSK 0xfffffdff |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_GET(value) (((value) & 0x00000200) >> 9) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDXCLK_SET(value) (((value) << 9) & 0x00000200) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_LSB 10 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_MSB 10 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_SET_MSK 0x00000400 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_CLR_MSK 0xfffffbff |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_GET(value) (((value) & 0x00000400) >> 10) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_NANDCLK_SET(value) (((value) << 10) & 0x00000400) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_LSB 11 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_MSB 11 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_SET_MSK 0x00000800 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_CLR_MSK 0xfffff7ff |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_GET(value) (((value) & 0x00000800) >> 11) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_QSPICLK_SET(value) (((value) << 11) & 0x00000800) |
| |
|
#define | ALT_CLKMGR_PERPLL_EN_OFST 0x20 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_MSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_SET_MSK 0x00000007 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_CLR_MSK 0xfffffff8 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_GET(value) (((value) & 0x00000007) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_USBCLK_SET(value) (((value) << 0) & 0x00000007) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_LSB 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_MSB 5 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_SET_MSK 0x00000038 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_CLR_MSK 0xffffffc7 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_GET(value) (((value) & 0x00000038) >> 3) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_SPIMCLK_SET(value) (((value) << 3) & 0x00000038) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_LSB 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_MSB 8 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_SET_MSK 0x000001c0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_CLR_MSK 0xfffffe3f |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_GET(value) (((value) & 0x000001c0) >> 6) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN0CLK_SET(value) (((value) << 6) & 0x000001c0) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_DIV1 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_DIV2 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_DIV4 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_DIV8 0x3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_DIV16 0x4 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_RSVD_1 0x5 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_RSVD_2 0x6 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_E_RSVD_3 0x7 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_LSB 9 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_MSB 11 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_WIDTH 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_SET_MSK 0x00000e00 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_CLR_MSK 0xfffff1ff |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_GET(value) (((value) & 0x00000e00) >> 9) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_CAN1CLK_SET(value) (((value) << 9) & 0x00000e00) |
| |
|
#define | ALT_CLKMGR_PERPLL_DIV_OFST 0x24 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_MSB 23 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_WIDTH 24 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET_MSK 0x00ffffff |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_CLR_MSK 0xff000000 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_GET(value) (((value) & 0x00ffffff) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET(value) (((value) << 0) & 0x00ffffff) |
| |
|
#define | ALT_CLKMGR_PERPLL_GPIODIV_OFST 0x28 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_E_F2S_PERIPH_REF_CLK 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_E_MAIN_NAND_CLK 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_E_PERIPH_NAND_CLK 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_MSB 1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_SET_MSK 0x00000003 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_CLR_MSK 0xfffffffc |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_GET(value) (((value) & 0x00000003) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_SDMMC_SET(value) (((value) << 0) & 0x00000003) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_E_F2S_PERIPH_REF_CLK 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_E_MAIN_NAND_CLK 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_E_PERIPH_NAND_CLK 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_LSB 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_MSB 3 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_SET_MSK 0x0000000c |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_CLR_MSK 0xfffffff3 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_GET(value) (((value) & 0x0000000c) >> 2) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_NAND_SET(value) (((value) << 2) & 0x0000000c) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_E_F2S_PERIPH_REF_CLK 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_E_MAIN_QSPI_CLK 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_E_PERIPH_QSPI_CLK 0x2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_LSB 4 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_MSB 5 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_SET_MSK 0x00000030 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_CLR_MSK 0xffffffcf |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_GET(value) (((value) & 0x00000030) >> 4) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_QSPI_SET(value) (((value) << 4) & 0x00000030) |
| |
|
#define | ALT_CLKMGR_PERPLL_SRC_OFST 0x2c |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_E_IDLE 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_E_ACK_RXD 0x1 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_LSB 0 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_MSB 5 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_SET_MSK 0x0000003f |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_CLR_MSK 0xffffffc0 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_GET(value) (((value) & 0x0000003f) >> 0) |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OUTRSTACK_SET(value) (((value) << 0) & 0x0000003f) |
| |
|
#define | ALT_CLKMGR_PERPLL_STAT_OFST 0x30 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_MSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_BGPWRDN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_LSB 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_MSB 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_EN_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_LSB 2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_MSB 2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_PWRDN_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_LSB 3 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_MSB 15 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_WIDTH 13 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_SET_MSK 0x0000fff8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_CLR_MSK 0xffff0007 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_GET(value) (((value) & 0x0000fff8) >> 3) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_NUMER_SET(value) (((value) << 3) & 0x0000fff8) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_LSB 16 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_MSB 21 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_SET_MSK 0x003f0000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_CLR_MSK 0xffc0ffff |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_GET(value) (((value) & 0x003f0000) >> 16) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_DENOM_SET(value) (((value) << 16) & 0x003f0000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_E_EOSC1 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_E_EOSC2 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_E_F2S_SDRAM_REF 0x2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_LSB 22 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_MSB 23 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_WIDTH 2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_SET_MSK 0x00c00000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_CLR_MSK 0xff3fffff |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_GET(value) (((value) & 0x00c00000) >> 22) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_SSRC_SET(value) (((value) << 22) & 0x00c00000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_LSB 24 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_MSB 24 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_SET_MSK 0x01000000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_CLR_MSK 0xfeffffff |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_GET(value) (((value) & 0x01000000) >> 24) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRSTALL_SET(value) (((value) << 24) & 0x01000000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_LSB 25 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_MSB 30 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_SET_MSK 0x7e000000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_CLR_MSK 0x81ffffff |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_GET(value) (((value) & 0x7e000000) >> 25) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OUTRST_SET(value) (((value) << 25) & 0x7e000000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_LSB 31 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_MSB 31 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_SET_MSK 0x80000000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_CLR_MSK 0x7fffffff |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_GET(value) (((value) & 0x80000000) >> 31) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_REGEXTSEL_SET(value) (((value) << 31) & 0x80000000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_VCO_OFST 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_MSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJEN_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_LSB 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_MSB 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_SET_MSK 0x00001ffe |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_CLR_MSK 0xffffe001 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_GET(value) (((value) & 0x00001ffe) >> 1) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_BWADJ_SET(value) (((value) << 1) & 0x00001ffe) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_LSB 13 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_MSB 13 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_SET_MSK 0x00002000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_CLR_MSK 0xffffdfff |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_GET(value) (((value) & 0x00002000) >> 13) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_FASTEN_SET(value) (((value) << 13) & 0x00002000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_LSB 14 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_MSB 14 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_SET_MSK 0x00004000 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_CLR_MSK 0xffffbfff |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_GET(value) (((value) & 0x00004000) >> 14) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_SATEN_SET(value) (((value) << 14) & 0x00004000) |
| |
|
#define | ALT_CLKMGR_SDRPLL_CTL_OFST 0x4 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_LSB 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_MSB 20 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_SET_MSK 0x001ffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_CLR_MSK 0xffe001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_GET(value) (((value) & 0x001ffe00) >> 9) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_PHASE_SET(value) (((value) << 9) & 0x001ffe00) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQSCLK_OFST 0x8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_LSB 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_MSB 20 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_SET_MSK 0x001ffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_CLR_MSK 0xffe001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_GET(value) (((value) & 0x001ffe00) >> 9) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_PHASE_SET(value) (((value) << 9) & 0x001ffe00) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDR2XDQSCLK_OFST 0xc |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_LSB 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_MSB 20 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_SET_MSK 0x001ffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_CLR_MSK 0xffe001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_GET(value) (((value) & 0x001ffe00) >> 9) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_PHASE_SET(value) (((value) << 9) & 0x001ffe00) |
| |
|
#define | ALT_CLKMGR_SDRPLL_DDRDQCLK_OFST 0x10 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_MSB 8 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_WIDTH 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_SET_MSK 0x000001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_CLR_MSK 0xfffffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_GET(value) (((value) & 0x000001ff) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_CNT_SET(value) (((value) << 0) & 0x000001ff) |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_LSB 9 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_MSB 20 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_WIDTH 12 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_SET_MSK 0x001ffe00 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_CLR_MSK 0xffe001ff |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_GET(value) (((value) & 0x001ffe00) >> 9) |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_PHASE_SET(value) (((value) << 9) & 0x001ffe00) |
| |
|
#define | ALT_CLKMGR_SDRPLL_S2FUSER2CLK_OFST 0x14 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_MSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_SET_MSK 0x00000001 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_CLR_MSK 0xfffffffe |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_GET(value) (((value) & 0x00000001) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQSCLK_SET(value) (((value) << 0) & 0x00000001) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_LSB 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_MSB 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_SET_MSK 0x00000002 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_CLR_MSK 0xfffffffd |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_GET(value) (((value) & 0x00000002) >> 1) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDR2XDQSCLK_SET(value) (((value) << 1) & 0x00000002) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_LSB 2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_MSB 2 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_SET_MSK 0x00000004 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_CLR_MSK 0xfffffffb |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_GET(value) (((value) & 0x00000004) >> 2) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_DDRDQCLK_SET(value) (((value) << 2) & 0x00000004) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_LSB 3 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_MSB 3 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_WIDTH 1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_SET_MSK 0x00000008 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_CLR_MSK 0xfffffff7 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_RESET 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_GET(value) (((value) & 0x00000008) >> 3) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_S2FUSER2CLK_SET(value) (((value) << 3) & 0x00000008) |
| |
|
#define | ALT_CLKMGR_SDRPLL_EN_OFST 0x18 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_E_IDLE 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_E_ACK_RXD 0x1 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_LSB 0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_MSB 5 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_WIDTH 6 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_SET_MSK 0x0000003f |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_CLR_MSK 0xffffffc0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_RESET 0x0 |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_GET(value) (((value) & 0x0000003f) >> 0) |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OUTRSTACK_SET(value) (((value) << 0) & 0x0000003f) |
| |
|
#define | ALT_CLKMGR_SDRPLL_STAT_OFST 0x1c |
| |
1.8.13