RTEMS CPU Kit with SuperCore
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#include <avr/iocanxx.h>
Go to the source code of this file.
Macros | |
#define | SPM_PAGESIZE 256 |
#define | RAMEND 0x10FF /* Last On-Chip SRAM Location */ |
#define | XRAMEND 0xFFFF |
#define | E2END 0x07FF |
#define | E2PAGESIZE 8 |
#define | FLASHEND 0xFFFF |
#define | FUSE_MEMORY_SIZE 3 |
#define | FUSE_CKSEL0 (unsigned char)~_BV(0) |
#define | FUSE_CKSEL1 (unsigned char)~_BV(1) |
#define | FUSE_CKSEL2 (unsigned char)~_BV(2) |
#define | FUSE_CKSEL3 (unsigned char)~_BV(3) |
#define | FUSE_SUT0 (unsigned char)~_BV(4) |
#define | FUSE_SUT1 (unsigned char)~_BV(5) |
#define | FUSE_CKOUT (unsigned char)~_BV(6) |
#define | FUSE_CKDIV8 (unsigned char)~_BV(7) |
#define | LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) |
#define | FUSE_BOOTRST (unsigned char)~_BV(0) |
#define | FUSE_BOOTSZ0 (unsigned char)~_BV(1) |
#define | FUSE_BOOTSZ1 (unsigned char)~_BV(2) |
#define | FUSE_EESAVE (unsigned char)~_BV(3) |
#define | FUSE_WDTON (unsigned char)~_BV(4) |
#define | FUSE_SPIEN (unsigned char)~_BV(5) |
#define | FUSE_JTAGEN (unsigned char)~_BV(6) |
#define | FUSE_OCDEN (unsigned char)~_BV(7) |
#define | HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) |
#define | FUSE_BODLEVEL0 (unsigned char)~_BV(1) |
#define | FUSE_BODLEVEL1 (unsigned char)~_BV(2) |
#define | FUSE_BODLEVEL2 (unsigned char)~_BV(3) |
#define | EFUSE_DEFAULT (0xFF) |
#define | __LOCK_BITS_EXIST |
#define | __BOOT_LOCK_BITS_0_EXIST |
#define | __BOOT_LOCK_BITS_1_EXIST |
#define | SIGNATURE_0 0x1E |
#define | SIGNATURE_1 0x96 |
#define | SIGNATURE_2 0x81 |