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RTEMS 6.1
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RTEMS 6.1
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Universal Synchronous Asynchronous Receiver Transmitter. More...
#include <stm32h723xx.h>
Data Fields | |
| __IO uint32_t | CR1 |
| __IO uint32_t | CR2 |
| __IO uint32_t | CR3 |
| __IO uint32_t | BRR |
| __IO uint32_t | GTPR |
| __IO uint32_t | RTOR |
| __IO uint32_t | RQR |
| __IO uint32_t | ISR |
| __IO uint32_t | ICR |
| __IO uint32_t | RDR |
| __IO uint32_t | TDR |
| __IO uint32_t | PRESC |
Universal Synchronous Asynchronous Receiver Transmitter.
| __IO uint32_t USART_TypeDef::BRR |
USART Baud rate register, Address offset: 0x0C
| __IO uint32_t USART_TypeDef::CR1 |
USART Control register 1, Address offset: 0x00
| __IO uint32_t USART_TypeDef::CR2 |
USART Control register 2, Address offset: 0x04
| __IO uint32_t USART_TypeDef::CR3 |
USART Control register 3, Address offset: 0x08
| __IO uint32_t USART_TypeDef::GTPR |
USART Guard time and prescaler register, Address offset: 0x10
| __IO uint32_t USART_TypeDef::ICR |
USART Interrupt flag Clear register, Address offset: 0x20
| __IO uint32_t USART_TypeDef::ISR |
USART Interrupt and status register, Address offset: 0x1C
| __IO uint32_t USART_TypeDef::PRESC |
USART clock Prescaler register, Address offset: 0x2C
| __IO uint32_t USART_TypeDef::RDR |
USART Receive Data register, Address offset: 0x24
| __IO uint32_t USART_TypeDef::RQR |
USART Request register, Address offset: 0x18
| __IO uint32_t USART_TypeDef::RTOR |
USART Receiver Time Out register, Address offset: 0x14
| __IO uint32_t USART_TypeDef::TDR |
USART Transmit Data register, Address offset: 0x28
1.9.6