RTEMS 6.1
Loading...
Searching...
No Matches
Data Fields
DFSDM_Channel_TypeDef Struct Reference
CMSIS_Device » Stm32h723xx | CMSIS_Device » Stm32h725xx | CMSIS_Device » Stm32h730xx | CMSIS_Device » Stm32h730xxQ | CMSIS_Device » Stm32h733xx | CMSIS_Device » Stm32h735xx | CMSIS_Device » Stm32h742xx | CMSIS_Device » Stm32h743xx | CMSIS_Device » Stm32h745xg | CMSIS_Device » Stm32h745xx | CMSIS_Device » Stm32h747xg | CMSIS_Device » Stm32h747xx | CMSIS_Device » Stm32h750xx | CMSIS_Device » Stm32h753xx | CMSIS_Device » Stm32h755xx | CMSIS_Device » Stm32h757xx | CMSIS_Device » Stm32h7a3xx | CMSIS_Device » Stm32h7a3xxq | CMSIS_Device » Stm32h7b0xx | CMSIS_Device » Stm32h7b0xxQ | CMSIS_Device » Stm32h7b3xx | CMSIS_Device » Stm32h7b3xxq » Peripheral_registers_structures

DFSDM channel configuration registers. More...

#include <stm32h723xx.h>

Data Fields

__IO uint32_t CHCFGR1
 
__IO uint32_t CHCFGR2
 
__IO uint32_t CHAWSCDR
 
__IO uint32_t CHWDATAR
 
__IO uint32_t CHDATINR
 
__IO uint32_t CHDLYR
 

Detailed Description

DFSDM channel configuration registers.

Field Documentation

◆ CHAWSCDR

__IO uint32_t DFSDM_Channel_TypeDef::CHAWSCDR

DFSDM channel analog watchdog and short circuit detector register, Address offset: 0x08

◆ CHCFGR1

__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR1

DFSDM channel configuration register1, Address offset: 0x00

◆ CHCFGR2

__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR2

DFSDM channel configuration register2, Address offset: 0x04

◆ CHDATINR

__IO uint32_t DFSDM_Channel_TypeDef::CHDATINR

DFSDM channel data input register, Address offset: 0x10

◆ CHDLYR

__IO uint32_t DFSDM_Channel_TypeDef::CHDLYR

DFSDM channel delay register, Address offset: 0x14

◆ CHWDATAR

__IO uint32_t DFSDM_Channel_TypeDef::CHWDATAR

DFSDM channel watchdog filter data register, Address offset: 0x0C

The documentation for this struct was generated from the following files:
Generated by doxygen 1.9.6