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RTEMS 6.1
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Macros | |
| #define | RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
| #define | RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
| #define | RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
| #define | RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
| #define RCC_PLL1VCIRANGE_0 RCC_PLLCFGR_PLL1RGE_0 |
Clock range frequency between 1 and 2 MHz
| #define RCC_PLL1VCIRANGE_1 RCC_PLLCFGR_PLL1RGE_1 |
Clock range frequency between 2 and 4 MHz
| #define RCC_PLL1VCIRANGE_2 RCC_PLLCFGR_PLL1RGE_2 |
Clock range frequency between 4 and 8 MHz
| #define RCC_PLL1VCIRANGE_3 RCC_PLLCFGR_PLL1RGE_3 |
Clock range frequency between 8 and 16 MHz